net: phy: micrel: Add support for lan9645x internal phy
LAN9645X is a family of switch chips with 5 internal copper phys. The internal PHY is based on parts of LAN8832. This is a low-power, single port triple-speed (10BASE-T/100BASE-TX/1000BASE-T) ethernet physical layer transceiver (PHY) that supports transmission and reception of data on standard CAT-5, as well as CAT-5e and CAT-6 Unshielded Twisted Pair (UTP) cables. Add support for the internal PHY of the lan9645x chip family. Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Daniel Machon <daniel.machon@microchip.com> Signed-off-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260226-phy_micrel_add_support_for_lan9645x_internal_phy-v3-1-1fe82379962b@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>master
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fd6dad4e1a
commit
11c0663a59
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@ -6523,6 +6523,142 @@ static void lan8842_get_phy_stats(struct phy_device *phydev,
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stats->tx_errors = priv->phy_stats.tx_errors;
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}
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#define LAN9645X_CTRL_REG 0x1f
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#define LAN9645X_CTRL_REG_SW_SOFT_RST BIT(1)
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#define LAN9645X_DAC_ICAS_AMP_POWER_DOWN 0x47
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#define LAN9645X_BTRX_QBIAS_POWER_DOWN 0x46
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#define LAN9645X_TX_LOW_I_CH_CD_POWER_MGMT 0x45
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#define LAN9645X_TX_LOW_I_CH_B_POWER_MGMT 0x44
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#define LAN9645X_TX_LOW_I_CH_A_POWER_MGMT 0x43
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static const struct lanphy_reg_data force_dac_tx_errata[] = {
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/* Force channel A/B/C/D TX on */
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{ LAN8814_PAGE_POWER_REGS,
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LAN9645X_DAC_ICAS_AMP_POWER_DOWN,
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0 },
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/* Force channel A/B/C/D QBias on */
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{ LAN8814_PAGE_POWER_REGS,
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LAN9645X_BTRX_QBIAS_POWER_DOWN,
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0xaa },
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/* Tx low I on channel C/D overwrite */
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{ LAN8814_PAGE_POWER_REGS,
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LAN9645X_TX_LOW_I_CH_CD_POWER_MGMT,
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0xbfff },
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/* Channel B low I overwrite */
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{ LAN8814_PAGE_POWER_REGS,
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LAN9645X_TX_LOW_I_CH_B_POWER_MGMT,
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0xabbf },
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/* Channel A low I overwrite */
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{ LAN8814_PAGE_POWER_REGS,
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LAN9645X_TX_LOW_I_CH_A_POWER_MGMT,
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0xbd3f },
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};
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static int lan9645x_config_init(struct phy_device *phydev)
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{
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int ret;
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/* Apply erratas from previous generations. */
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ret = lan8842_erratas(phydev);
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if (ret < 0)
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return ret;
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/* Apply errata for an issue where bringing a port down, can cause a few
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* CRC errors for traffic flowing through adjacent ports.
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*/
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return lanphy_write_reg_data(phydev, force_dac_tx_errata,
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ARRAY_SIZE(force_dac_tx_errata));
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}
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static int lan9645x_suspend(struct phy_device *phydev)
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{
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int ret, val;
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/* Force link down before software power down (SPD), by doing software
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* soft reset. This resets the PHY, but keeps all register configuration
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* intact. The bit self clears.
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*
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* This is needed as a workaround for an issue where performing SPD on a
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* port can bring adjacent ports down, when there is traffic flowing
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* through the ports.
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*/
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ret = phy_set_bits(phydev, LAN9645X_CTRL_REG,
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LAN9645X_CTRL_REG_SW_SOFT_RST);
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if (ret)
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return ret;
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ret = phy_read_poll_timeout(phydev, LAN9645X_CTRL_REG, val,
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!(val & LAN9645X_CTRL_REG_SW_SOFT_RST),
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3000, 100000, true);
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if (ret)
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return ret;
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return genphy_suspend(phydev);
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}
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static int lan9645x_config_intr(struct phy_device *phydev)
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{
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int err;
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/* enable / disable interrupts */
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
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/* This is an internal PHY of lan9645x and is not possible to
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* change the polarity of irq sources in the OIC (CPU_INTR)
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* found in lan9645x. Therefore change the polarity of the
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* interrupt in the PHY from being active low instead of active
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* high.
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*/
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err = phy_write(phydev, LAN8804_CONTROL,
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LAN8804_CONTROL_INTR_POLARITY);
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if (err)
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return err;
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/* By default interrupt buffer is open-drain in which case the
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* interrupt can be active only low. Therefore change the
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* interrupt buffer to be push-pull to be able to change
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* interrupt polarity.
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*/
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err = phy_write(phydev, LAN8804_OUTPUT_CONTROL,
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LAN8804_OUTPUT_CONTROL_INTR_BUFFER);
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if (err)
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return err;
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err = lan8814_ack_interrupt(phydev);
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if (err)
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return err;
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err = phy_write(phydev, LAN8814_INTC,
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LAN8814_INT_LINK | LAN8814_INT_FLF);
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} else {
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err = phy_write(phydev, LAN8814_INTC, 0);
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if (err)
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return err;
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err = lan8814_ack_interrupt(phydev);
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}
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return err;
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}
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static irqreturn_t lan9645x_handle_interrupt(struct phy_device *phydev)
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{
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int status;
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status = phy_read(phydev, LAN8814_INTS);
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if (status < 0) {
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phy_error(phydev);
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return IRQ_NONE;
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}
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if (status & (LAN8814_INT_LINK | LAN8814_INT_FLF)) {
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phy_trigger_machine(phydev);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static struct phy_driver ksphy_driver[] = {
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{
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PHY_ID_MATCH_MODEL(PHY_ID_KS8737),
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@ -6761,6 +6897,21 @@ static struct phy_driver ksphy_driver[] = {
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.set_tunable = lan8842_set_tunable,
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.cable_test_start = lan8814_cable_test_start,
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.cable_test_get_status = ksz886x_cable_test_get_status,
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}, {
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PHY_ID_MATCH_MODEL(PHY_ID_LAN9645X),
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.name = "Microchip LAN9645X Gigabit PHY",
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.config_init = lan9645x_config_init,
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.driver_data = &ksz9021_type,
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.probe = kszphy_probe,
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.soft_reset = genphy_soft_reset,
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.suspend = lan9645x_suspend,
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.resume = genphy_resume,
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.config_intr = lan9645x_config_intr,
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.handle_interrupt = lan9645x_handle_interrupt,
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.get_tunable = lan8842_get_tunable,
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.set_tunable = lan8842_set_tunable,
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.get_phy_stats = lan8842_get_phy_stats,
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.update_stats = lan8842_update_stats,
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}, {
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PHY_ID_MATCH_MODEL(PHY_ID_KSZ9131),
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.name = "Microchip KSZ9131 Gigabit PHY",
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@ -6859,6 +7010,7 @@ static const struct mdio_device_id __maybe_unused micrel_tbl[] = {
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{ PHY_ID_MATCH_MODEL(PHY_ID_LAN8804) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_LAN8841) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_LAN8842) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_LAN9645X) },
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{ }
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};
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@ -33,6 +33,7 @@
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#define PHY_ID_LAN8804 0x00221670
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#define PHY_ID_LAN8841 0x00221650
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#define PHY_ID_LAN8842 0x002216C0
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#define PHY_ID_LAN9645X 0x002216D0
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#define PHY_ID_KSZ886X 0x00221430
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#define PHY_ID_KSZ8863 0x00221435
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