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net/mlx5: Introduce indirect-sw-encap ICM properties 

Add new fields for device memory capabilities, in order to support
creation of new ICM memory type of SW encap.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Link: https://lore.kernel.org/r/107cca7dd6a932a1704abf6ebd1b801105546a8e.1701871118.git.leon@kernel.org
Signed-off-by: Leon Romanovsky <leon@kernel.org>
pull/477/merge
Shun Hao 2023-12-06 16:01:34 +02:00 committed by Leon Romanovsky
parent a39b6ac378
commit 1ca51628e7
1 changed files with 7 additions and 2 deletions
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9
include/linux/mlx5/mlx5_ifc.h
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@ -1193,7 +1193,8 @@ struct mlx5_ifc_device_mem_cap_bits {
u8 log_sw_icm_alloc_granularity[0x6];
u8 log_steering_sw_icm_size[0x8];
u8 reserved_at_120[0x18];
u8 log_indirect_encap_sw_icm_size[0x8];
u8 reserved_at_128[0x10];
u8 log_header_modify_pattern_sw_icm_size[0x8];
u8 header_modify_sw_icm_start_address[0x40];
@ -1204,7 +1205,11 @@ struct mlx5_ifc_device_mem_cap_bits {
u8 memic_operations[0x20];
u8 reserved_at_220[0x5e0];
u8 reserved_at_220[0x20];
u8 indirect_encap_sw_icm_start_address[0x40];
u8 reserved_at_280[0x580];
};
struct mlx5_ifc_device_event_cap_bits {