dt-bindings: mmc: drop unneeded quotes
Cleanup by removing unneeded quotes from refs and redundant blank lines. No functional impact except adjusting to preferred coding style. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> # for Renesas controllers Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230120085722.171965-1-krzysztof.kozlowski@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>pull/938/head
parent
c6ecb0f849
commit
1e52a7e679
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 MMC Controller
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic Meson SDHC controller
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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maintainers:
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- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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@ -1,8 +1,8 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/mmc/arasan,sdhci.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/mmc/arasan,sdhci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Arasan SDHCI Controller
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@ -10,7 +10,7 @@ maintainers:
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- Adrian Hunter <adrian.hunter@intel.com>
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allOf:
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- $ref: "mmc-controller.yaml#"
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- $ref: mmc-controller.yaml#
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- if:
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properties:
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compatible:
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@ -36,43 +36,43 @@ properties:
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cdns,phy-input-delay-sd-highspeed:
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description: Value of the delay in the input path for SD high-speed timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-legacy:
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description: Value of the delay in the input path for legacy timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-sd-uhs-sdr12:
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description: Value of the delay in the input path for SD UHS SDR12 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-sd-uhs-sdr25:
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description: Value of the delay in the input path for SD UHS SDR25 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-sd-uhs-sdr50:
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description: Value of the delay in the input path for SD UHS SDR50 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-sd-uhs-ddr50:
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description: Value of the delay in the input path for SD UHS DDR50 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-mmc-highspeed:
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description: Value of the delay in the input path for MMC high-speed timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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@ -83,7 +83,7 @@ properties:
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# Each delay property represents the fraction of the clock period.
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# The approximate delay value will be
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# (<delay property value>/128)*sdmclk_clock_period.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x1f
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@ -91,7 +91,7 @@ properties:
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description: |
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Value of the delay introduced on the sdclk output for all modes except
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HS200, HS400 and HS400_ES.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x7f
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@ -99,7 +99,7 @@ properties:
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description: |
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Value of the delay introduced on the sdclk output for HS200, HS400 and
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HS400_ES speed modes.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x7f
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@ -107,7 +107,7 @@ properties:
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description: |
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Value of the delay introduced on the dat_strobe input used in
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HS400 / HS400_ES speed modes.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0x7f
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@ -10,7 +10,7 @@ maintainers:
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- Shawn Guo <shawnguo@kernel.org>
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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description: |
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The Enhanced Secure Digital Host Controller on Freescale i.MX family
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@ -112,7 +112,7 @@ properties:
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default: 0
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voltage-ranges:
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$ref: '/schemas/types.yaml#/definitions/uint32-matrix'
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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description: |
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Specify the voltage range in case there are software transparent level
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shifters on the outputs of the controller. Two cells are required, first
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@ -10,7 +10,7 @@ maintainers:
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- Markus Pargmann <mpa@pengutronix.de>
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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properties:
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compatible:
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip Sparx5 Mobile Storage Host Controller
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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maintainers:
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- Lars Povlsen <lars.povlsen@microchip.com>
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@ -35,7 +35,7 @@ properties:
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microchip,clock-delay:
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description: Delay clock to card to meet setup time requirements.
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Each step increase by 1.25ns.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 1
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maximum: 15
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@ -10,7 +10,7 @@ maintainers:
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- Ulf Hansson <ulf.hansson@linaro.org>
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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- $ref: /schemas/spi/spi-peripheral-props.yaml
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description: |
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@ -17,7 +17,7 @@ description: |
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and the properties used by the mxsmmc driver.
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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properties:
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compatible:
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@ -83,7 +83,7 @@ properties:
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maxItems: 1
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operating-points-v2:
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$ref: "/schemas/types.yaml#/definitions/phandle"
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$ref: /schemas/types.yaml#/definitions/phandle
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power-domains:
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items:
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@ -100,53 +100,53 @@ properties:
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The DQS trim values are only used on controllers which support HS400
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timing. Only SDMMC4 on Tegra210 and Tegra186 supports HS400.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,default-trim:
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description: Specify the default outbound clock trimmer value.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,dqs-trim:
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description: Specify DQS trim value for HS400 timing.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-down-offset-1v8:
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description: Specify drive strength calibration offsets for 1.8 V
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signaling modes.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-down-offset-1v8-timeout:
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description: Specify drive strength used as a fallback in case the
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automatic calibration times out on a 1.8 V signaling mode.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-down-offset-3v3:
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description: Specify drive strength calibration offsets for 3.3 V
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signaling modes.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-down-offset-3v3-timeout:
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description: Specify drive strength used as a fallback in case the
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automatic calibration times out on a 3.3 V signaling mode.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-down-offset-sdr104:
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description: Specify drive strength calibration offsets for SDR104 mode.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-down-offset-hs400:
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description: Specify drive strength calibration offsets for HS400 mode.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-up-offset-1v8:
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description: Specify drive strength calibration offsets for 1.8 V
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signaling modes.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-up-offset-1v8-timeout:
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description: Specify drive strength used as a fallback in case the
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automatic calibration times out on a 1.8 V signaling mode.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-up-offset-3v3:
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description: Specify drive strength calibration offsets for 3.3 V
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@ -158,25 +158,25 @@ properties:
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refer to the reference manual of the SoC for correct values. The SDR104
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and HS400 timing specific values are used in corresponding modes if
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specified.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-up-offset-3v3-timeout:
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description: Specify drive strength used as a fallback in case the
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automatic calibration times out on a 3.3 V signaling mode.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-up-offset-sdr104:
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description: Specify drive strength calibration offsets for SDR104 mode.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,pad-autocal-pull-up-offset-hs400:
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description: Specify drive strength calibration offsets for HS400 mode.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,only-1-8v:
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description: The presence of this property indicates that the controller
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operates at a 1.8 V fixed I/O voltage.
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$ref: "/schemas/types.yaml#/definitions/flag"
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$ref: /schemas/types.yaml#/definitions/flag
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required:
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- compatible
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@ -187,7 +187,7 @@ required:
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- reset-names
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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- if:
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properties:
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compatible:
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Actions Semi Owl SoCs SD/MMC/SDIO controller
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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maintainers:
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- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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@ -10,7 +10,7 @@ maintainers:
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- Wolfram Sang <wsa+renesas@sang-engineering.com>
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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properties:
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compatible:
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@ -1,8 +1,8 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas SDHI SD/MMC controller
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@ -112,7 +112,7 @@ properties:
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max-frequency: true
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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- if:
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properties:
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@ -14,7 +14,7 @@ description:
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file and the Rockchip specific extensions.
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allOf:
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- $ref: "synopsys-dw-mshc-common.yaml#"
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- $ref: synopsys-dw-mshc-common.yaml#
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maintainers:
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- Heiko Stuebner <heiko@sntech.de>
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@ -112,7 +112,7 @@ required:
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- samsung,dw-mshc-sdr-timing
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allOf:
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- $ref: "synopsys-dw-mshc-common.yaml#"
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- $ref: synopsys-dw-mshc-common.yaml#
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- if:
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properties:
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compatible:
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@ -12,7 +12,7 @@ maintainers:
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- Li-hao Kuo <lhjeff911@gmail.com>
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allOf:
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- $ref: "mmc-controller.yaml"
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- $ref: mmc-controller.yaml
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properties:
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compatible:
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys Designware Mobile Storage Host Controller Common Properties
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allOf:
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- $ref: "mmc-controller.yaml#"
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- $ref: mmc-controller.yaml#
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|
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maintainers:
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- Ulf Hansson <ulf.hansson@linaro.org>
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Loading…
Reference in New Issue