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MFD for v6.17 

- New Support & Features
   * Add extensive support for the Analog Devices ADP5589 I/O expander, including
     core MFD, GPIO, PWM, and a new keypad matrix input driver. This also adds
     support for handling various events including GPI, keypad, reset and unlock
     ev ents.
   * Add support for the TI TPS652G1 PMIC, a stripped-down version of the TPS65224,
     including core MFD, PFSM, pinctrl, and GPIO support.
   * Add support for the Apple Silicon System Management Controller (SMC), including
     the core MFD driver which handles the RTKit-based protocol, a new GPIO driver
     for PMU GPIOs, and a new reboot/power-off driver.
 
 - Improvements & Fixes
   * Dynamically add ADP5585 sub-devices based on device tree properties.
   * Move ADP5585 oscillator control from the child PWM driver to the main MFD
     driver to better handle shared resources.
   * Add support for a hardware reset pin and VDD regulator to the ADP5585 driver.
   * Update the TPS65219 MFD cell's GPIO compatible string for the TPS65214 to
     reflect hardware capabilities correctly.
   * Separate the ChromeOS EC charge-control probing from the USB-PD subsystem,
     allowing it to probe independently based on the dedicated EC_FEATURE_CHARGER.
   * Fix an interrupt naming typo in the MT6370 driver.
   * Fix RK806 PMIC reset behavior by allowing the reset mode to be customized via a
     new device tree property.
   * Fix AXP20X regulator cell ID conflicts for secondary PMICs on boards without an
     IRQ line connected.
   * Fix MT6397 keypad sub-device creation to use specific names instead of a
     generic one, ensuring correct driver binding.
   * Fix a build warning in the stm32-timers driver by adding a missing include for
     export.h.
 
 - Cleanups & Refactoring
   * Refactor the ADP5585 driver to simplify how regmap defaults are handled, making
     it easier to add new chip variants.
   * Introduce per-chip register map structures for the ADP5585/ADP5589 family to
     handle differences between the devices.
   * Convert several drivers to use dev_fwnode() instead of of_fwnode_handle().
   * Make various static structures const in the cs40l50, rohm-bd71828, tps65219,
     and twl6040 drivers.
   * Remove redundant pm_runtime_mark_last_busy() calls from several drivers.
   * Alphabetize Kconfig entries for Cirrus Logic and Maxim drivers.
   * Remove unused fields from the 'tps65219' struct.
   * Update several MFD-related headers to follow the 'Include What You Use' (IWYU)
     principle.
 
 - Removals
   * Remove the old, platform-data-based adp5589-keys input driver, which is now
     superseded by the new MFD-based adp5585-keys driver.
   * Remove the unused twl6030_mmc_card_detect() functions and associated header
     declarations.
   * Remove the now unused pcf50633/core.h header file.
   * Remove the fsl,imx8qxp-csr device tree binding, which was being used
     incorrectly.
 
 - Device Tree Bindings Updates
   * Add support for the Analog Devices ADP5589 I/O expander to the adi,adp5585.yaml
     binding.
   * Add new properties to the adi,adp5585.yaml binding for input events, including
     keypad pins, unlock events, and reset events.
   * Add a reset-gpios property to the adi,adp5585.yaml binding.
   * Add the TI TPS652G1 PMIC to the ti,tps6594.yaml binding.
   * Add new bindings for the Apple Mac System Management Controller (SMC) and its
     sub-devices: apple,smc.yaml, apple,smc-gpio.yaml, and apple,smc-reboot.yaml.
   * Convert the Freescale MXS LRADC binding (mxs-lradc) to YAML schema format.
   * Convert and combine the NXP LPC1850 CREG, DMAMUX, and USB OTG PHY bindings into
     a single YAML schema file.
   * Convert the TI TPS65910 binding to YAML schema format.
   * Add a comment to the samsung,s2mps11.yaml binding to clarify the use of 'oneOf'
     for interrupt properties.
   * Add the rockchip,reset-mode property to the rockchip,rk806.yaml binding to
     allow customization of the PMIC's reset behavior.
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Merge tag 'mfd-next-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Support & Features:

   - Add extensive support for the Analog Devices ADP5589 I/O expander,
     including core MFD, GPIO, PWM, and a new keypad matrix input
     driver. This also adds support for handling various events
     including GPI, keypad, reset and unlock ev ents

   - Add support for the TI TPS652G1 PMIC, a stripped-down version of
     the TPS65224, including core MFD, PFSM, pinctrl, and GPIO support

   - Add support for the Apple Silicon System Management Controller
     (SMC), including the core MFD driver which handles the RTKit-based
     protocol, a new GPIO driver for PMU GPIOs, and a new
     reboot/power-off driver.

  Improvements & Fixes:

   - Dynamically add ADP5585 sub-devices based on device tree properties

   - Move ADP5585 oscillator control from the child PWM driver to the
     main MFD driver to better handle shared resources

   - Add support for a hardware reset pin and VDD regulator to the
     ADP5585 driver

   - Update the TPS65219 MFD cell's GPIO compatible string for the
     TPS65214 to reflect hardware capabilities correctly

   - Separate the ChromeOS EC charge-control probing from the USB-PD
     subsystem, allowing it to probe independently based on the
     dedicated EC_FEATURE_CHARGER

   - Fix an interrupt naming typo in the MT6370 driver

   - Fix RK806 PMIC reset behavior by allowing the reset mode to be
     customized via a new device tree property

   - Fix AXP20X regulator cell ID conflicts for secondary PMICs on
     boards without an IRQ line connected

   - Fix MT6397 keypad sub-device creation to use specific names instead
     of a generic one, ensuring correct driver binding

   - Fix a build warning in the stm32-timers driver by adding a missing
     include for export.h.

  Cleanups & Refactoring:

   - Refactor the ADP5585 driver to simplify how regmap defaults are
     handled, making it easier to add new chip variants

   - Introduce per-chip register map structures for the ADP5585/ADP5589
     family to handle differences between the devices

   - Convert several drivers to use dev_fwnode() instead of
     of_fwnode_handle()

   - Make various static structures const in the cs40l50, rohm-bd71828,
     tps65219, and twl6040 drivers

   - Remove redundant pm_runtime_mark_last_busy() calls from several
     drivers

   - Alphabetize Kconfig entries for Cirrus Logic and Maxim drivers

   - Remove unused fields from the 'tps65219' struct

   - Update several MFD-related headers to follow the 'Include What You
     Use' (IWYU) principle.

  Removals:

   - Remove the old, platform-data-based adp5589-keys input driver,
     which is now superseded by the new MFD-based adp5585-keys driver

   - Remove the unused twl6030_mmc_card_detect() functions and
     associated header declarations

   - Remove the now unused pcf50633/core.h header file

   - Remove the fsl,imx8qxp-csr device tree binding, which was being
     used incorrectly.

  Device Tree Bindings Updates:

   - Add support for the Analog Devices ADP5589 I/O expander to the
     adi,adp5585.yaml binding

   - Add new properties to the adi,adp5585.yaml binding for input
     events, including keypad pins, unlock events, and reset events

   - Add a reset-gpios property to the adi,adp5585.yaml binding

   - Add the TI TPS652G1 PMIC to the ti,tps6594.yaml binding

   - Add new bindings for the Apple Mac System Management Controller
     (SMC) and its sub-devices: apple,smc.yaml, apple,smc-gpio.yaml, and
     apple,smc-reboot.yaml

   - Convert the Freescale MXS LRADC binding (mxs-lradc) to YAML schema
     format

   - Convert and combine the NXP LPC1850 CREG, DMAMUX, and USB OTG PHY
     bindings into a single YAML schema file

   - Convert the TI TPS65910 binding to YAML schema format

   - Add a comment to the samsung,s2mps11.yaml binding to clarify the
     use of 'oneOf' for interrupt properties

   - Add the rockchip,reset-mode property to the rockchip,rk806.yaml
     binding to allow customization of the PMIC's reset behavior"

* tag 'mfd-next-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (28 commits)
  mfd: dt-bindings: Convert TPS65910 to DT schema
  mfd: Minor Cirrus/Maxim Kconfig order fixes
  mfd: Remove redundant pm_runtime_mark_last_busy() calls
  mfd: mt6397: Do not use generic name for keypad sub-devices
  mfd: axp20x: Set explicit ID for regulator cell if no IRQ line is present
  mfd: mt6370: Fix the interrupt naming typo
  mfd: rk8xx-core: Allow to customize RK806 reset mode
  dt-bindings: mfd: rk806: Allow to customize PMIC reset mode
  mfd: syscon: atmel-smc: Don't use "proxy" headers
  mfd: madera: Don't use "proxy" headers
  mfd: wm8350-core: Don't use "proxy" headers
  dt-bindings: mfd: samsung,s2mps11: Add comment about interrupts properties
  mfd: davinci_voicecodec: Don't use "proxy" headers
  mfd: pcf50633: Remove the header file core.h
  mfd: tps65219: Remove another unused field from 'struct tps65219'
  mfd: tps65219: Remove an unused field from 'struct tps65219'
  mfd: tps65219: Constify struct regmap_irq_sub_irq_map and tps65219_chip_data
  mfd: rohm-bd71828: Constify some structures
  dt-bindings: mfd: fsl,imx8qxp-csr: Remove binding documentation
  mfd: axp20x: Set explicit ID for AXP313 regulator
  ...
pull/1310/head
Linus Torvalds 2025-07-31 11:50:25 -07:00
parent cfc6d74523 006aa8f57f
commit 24e5c3241a
46 changed files with 779 additions and 1024 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml
View File

@ -103,11 +103,14 @@ examples:
clock-names = "msi", "ahb";
power-domains = <&pd IMX_SC_R_DC_0>;
syscon@56221000 {
compatible = "fsl,imx8qxp-mipi-lvds-csr", "syscon", "simple-mfd";
bus@56221000 {
compatible = "simple-pm-bus", "syscon";
reg = <0x56221000 0x1000>;
clocks = <&mipi_lvds_0_di_mipi_lvds_regs_lpcg IMX_LPCG_CLK_4>;
clock-names = "ipg";
#address-cells = <1>;
#size-cells = <1>;
ranges;
pxl2dpi {
compatible = "fsl,imx8qxp-pxl2dpi";

52
Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt
View File

@ -1,52 +0,0 @@
* NXP LPC1850 CREG clocks
The NXP LPC18xx/43xx CREG (Configuration Registers) block contains
control registers for two low speed clocks. One of the clocks is a
32 kHz oscillator driver with power up/down and clock gating. Next
is a fixed divider that creates a 1 kHz clock from the 32 kHz osc.
These clocks are used by the RTC and the Event Router peripherals.
The 32 kHz can also be routed to other peripherals to enable low
power modes.
This binding uses the common clock binding:
Documentation/devicetree/bindings/clock/clock-bindings.txt
Required properties:
- compatible:
Should be "nxp,lpc1850-creg-clk"
- #clock-cells:
Shall have value <1>.
- clocks:
Shall contain a phandle to the fixed 32 kHz crystal.
The creg-clk node must be a child of the creg syscon node.
The following clocks are available from the clock node.
Clock ID Name
0 1 kHz clock
1 32 kHz Oscillator
Example:
soc {
creg: syscon@40043000 {
compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd";
reg = <0x40043000 0x1000>;
creg_clk: clock-controller {
compatible = "nxp,lpc1850-creg-clk";
clocks = <&xtal32>;
#clock-cells = <1>;
};
...
};
rtc: rtc@40046000 {
...
clocks = <&creg_clk 0>, <&ccu1 CLK_CPU_BUS>;
clock-names = "rtc", "reg";
...
};
};

54
Documentation/devicetree/bindings/dma/lpc1850-dmamux.txt
View File

@ -1,54 +0,0 @@
NXP LPC18xx/43xx DMA MUX (DMA request router)
Required properties:
- compatible: "nxp,lpc1850-dmamux"
- reg: Memory map for accessing module
- #dma-cells: Should be set to <3>.
* 1st cell contain the master dma request signal
* 2nd cell contain the mux value (0-3) for the peripheral
* 3rd cell contain either 1 or 2 depending on the AHB
master used.
- dma-requests: Number of DMA requests for the mux
- dma-masters: phandle pointing to the DMA controller
The DMA controller node need to have the following poroperties:
- dma-requests: Number of DMA requests the controller can handle
Example:
dmac: dma@40002000 {
compatible = "nxp,lpc1850-gpdma", "arm,pl080", "arm,primecell";
arm,primecell-periphid = <0x00041080>;
reg = <0x40002000 0x1000>;
interrupts = <2>;
clocks = <&ccu1 CLK_CPU_DMA>;
clock-names = "apb_pclk";
#dma-cells = <2>;
dma-channels = <8>;
dma-requests = <16>;
lli-bus-interface-ahb1;
lli-bus-interface-ahb2;
mem-bus-interface-ahb1;
mem-bus-interface-ahb2;
memcpy-burst-size = <256>;
memcpy-bus-width = <32>;
};
dmamux: dma-mux {
compatible = "nxp,lpc1850-dmamux";
#dma-cells = <3>;
dma-requests = <64>;
dma-masters = <&dmac>;
};
uart0: serial@40081000 {
compatible = "nxp,lpc1850-uart", "ns16550a";
reg = <0x40081000 0x1000>;
reg-shift = <2>;
interrupts = <24>;
clocks = <&ccu2 CLK_APB0_UART0>, <&ccu1 CLK_CPU_UART0>;
clock-names = "uartclk", "reg";
dmas = <&dmamux 1 1 2
&dmamux 2 1 2>;
dma-names = "tx", "rx";
};

192
Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml
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@ -1,192 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/fsl,imx8qxp-csr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX8qm/qxp Control and Status Registers Module
maintainers:
- Liu Ying <victor.liu@nxp.com>
description: |
As a system controller, the Freescale i.MX8qm/qxp Control and Status
Registers(CSR) module represents a set of miscellaneous registers of a
specific subsystem. It may provide control and/or status report interfaces
to a mix of standalone hardware devices within that subsystem. One typical
use-case is for some other nodes to acquire a reference to the syscon node
by phandle, and the other typical use-case is that the operating system
should consider all subnodes of the CSR module as separate child devices.
properties:
$nodename:
pattern: "^syscon@[0-9a-f]+$"
compatible:
items:
- enum:
- fsl,imx8qxp-mipi-lvds-csr
- fsl,imx8qm-lvds-csr
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: ipg
patternProperties:
"^(ldb|phy|pxl2dpi)$":
type: object
description: The possible child devices of the CSR module.
required:
- compatible
- reg
- clocks
- clock-names
allOf:
- if:
properties:
compatible:
contains:
const: fsl,imx8qxp-mipi-lvds-csr
then:
required:
- pxl2dpi
- ldb
- if:
properties:
compatible:
contains:
const: fsl,imx8qm-lvds-csr
then:
required:
- phy
- ldb
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx8-lpcg.h>
#include <dt-bindings/firmware/imx/rsrc.h>
mipi_lvds_0_csr: syscon@56221000 {
compatible = "fsl,imx8qxp-mipi-lvds-csr", "syscon", "simple-mfd";
reg = <0x56221000 0x1000>;
clocks = <&mipi_lvds_0_di_mipi_lvds_regs_lpcg IMX_LPCG_CLK_4>;
clock-names = "ipg";
mipi_lvds_0_pxl2dpi: pxl2dpi {
compatible = "fsl,imx8qxp-pxl2dpi";
fsl,sc-resource = <IMX_SC_R_MIPI_0>;
power-domains = <&pd IMX_SC_R_MIPI_0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
mipi_lvds_0_pxl2dpi_dc0_pixel_link0: endpoint@0 {
reg = <0>;
remote-endpoint = <&dc0_pixel_link0_mipi_lvds_0_pxl2dpi>;
};
mipi_lvds_0_pxl2dpi_dc0_pixel_link1: endpoint@1 {
reg = <1>;
remote-endpoint = <&dc0_pixel_link1_mipi_lvds_0_pxl2dpi>;
};
};
port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi>;
};
mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1: endpoint@1 {
reg = <1>;
remote-endpoint = <&mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi>;
};
};
};
};
mipi_lvds_0_ldb: ldb {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx8qxp-ldb";
clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2>,
<&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>;
clock-names = "pixel", "bypass";
power-domains = <&pd IMX_SC_R_LVDS_0>;
channel@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
phys = <&mipi_lvds_0_phy>;
phy-names = "lvds_phy";
port@0 {
reg = <0>;
mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi: endpoint {
remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0>;
};
};
port@1 {
reg = <1>;
/* ... */
};
};
channel@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
phys = <&mipi_lvds_0_phy>;
phy-names = "lvds_phy";
port@0 {
reg = <0>;
mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi: endpoint {
remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1>;
};
};
port@1 {
reg = <1>;
/* ... */
};
};
};
};
mipi_lvds_0_phy: phy@56228300 {
compatible = "fsl,imx8qxp-mipi-dphy";
reg = <0x56228300 0x100>;
clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_PHY>;
clock-names = "phy_ref";
#phy-cells = <0>;
fsl,syscon = <&mipi_lvds_0_csr>;
power-domains = <&pd IMX_SC_R_MIPI_0>;
};

45
Documentation/devicetree/bindings/mfd/mxs-lradc.txt
View File

@ -1,45 +0,0 @@
* Freescale MXS LRADC device driver
Required properties:
- compatible: Should be "fsl,imx23-lradc" for i.MX23 SoC and "fsl,imx28-lradc"
for i.MX28 SoC
- reg: Address and length of the register set for the device
- interrupts: Should contain the LRADC interrupts
Optional properties:
- fsl,lradc-touchscreen-wires: Number of wires used to connect the touchscreen
to LRADC. Valid value is either 4 or 5. If this
property is not present, then the touchscreen is
disabled. 5 wires is valid for i.MX28 SoC only.
- fsl,ave-ctrl: number of samples per direction to calculate an average value.
Allowed value is 1 ... 32, default is 4
- fsl,ave-delay: delay between consecutive samples. Allowed value is
2 ... 2048. It is used if 'fsl,ave-ctrl' > 1, counts at
2 kHz and its default is 2 (= 1 ms)
- fsl,settling: delay between plate switch to next sample. Allowed value is
1 ... 2047. It counts at 2 kHz and its default is
10 (= 5 ms)
Example for i.MX23 SoC:
lradc@80050000 {
compatible = "fsl,imx23-lradc";
reg = <0x80050000 0x2000>;
interrupts = <36 37 38 39 40 41 42 43 44>;
fsl,lradc-touchscreen-wires = <4>;
fsl,ave-ctrl = <4>;
fsl,ave-delay = <2>;
fsl,settling = <10>;
};
Example for i.MX28 SoC:
lradc@80050000 {
compatible = "fsl,imx28-lradc";
reg = <0x80050000 0x2000>;
interrupts = <10 14 15 16 17 18 19 20 21 22 23 24 25>;
fsl,lradc-touchscreen-wires = <5>;
fsl,ave-ctrl = <4>;
fsl,ave-delay = <2>;
fsl,settling = <10>;
};

134
Documentation/devicetree/bindings/mfd/mxs-lradc.yaml Normal file
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@ -0,0 +1,134 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/mxs-lradc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale MXS Low-Resolution ADC (LRADC)
maintainers:
- Dario Binacchi <dario.binacchi@amarulasolutions.com>
description:
The LRADC provides 16 physical channels of 12-bit resolution for
analog-to-digital conversion and includes an integrated 4-wire/5-wire
touchscreen controller.
properties:
compatible:
items:
- enum:
- fsl,imx23-lradc
- fsl,imx28-lradc
reg:
maxItems: 1
clocks:
minItems: 1
interrupts:
minItems: 9
maxItems: 13
fsl,lradc-touchscreen-wires:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [4, 5]
description: >
Number of wires used to connect the touchscreen to LRADC.
If this property is not present, then the touchscreen is disabled.
fsl,ave-ctrl:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
maximum: 32
default: 4
description:
Number of samples per direction to calculate an average value.
fsl,ave-delay:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 2
maximum: 2048
default: 2
description: >
Delay between consecutive samples.
It is used if 'fsl,ave-ctrl' > 1, counts at 2 kHz and its default value (2)
is 1 ms.
fsl,settling:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
maximum: 2047
default: 10
description: >
Delay between plate switch to next sample.
It counts at 2 kHz and its default (10) is 5 ms.
"#io-channel-cells":
const: 1
required:
- compatible
- reg
- clocks
- interrupts
if:
properties:
compatible:
contains:
enum:
- fsl,imx23-lradc
then:
properties:
interrupts:
items:
- description: channel 0
- description: channel 1
- description: channel 2
- description: channel 3
- description: channel 4
- description: channel 5
- description: touchscreen
- description: channel 6
- description: channel 7
fsl,lradc-touchscreen-wires:
const: 4
else:
properties:
interrupts:
items:
- description: threshold 0
- description: threshold 1
- description: channel 0
- description: channel 1
- description: channel 2
- description: channel 3
- description: channel 4
- description: channel 5
- description: button 0
- description: button 1
- description: touchscreen
- description: channel 6
- description: channel 7
additionalProperties: false
examples:
- |
lradc@80050000 {
compatible = "fsl,imx23-lradc";
reg = <0x80050000 0x2000>;
interrupts = <36>, <37>, <38>, <39>, <40>,
<41>, <42>, <43>, <44>;
clocks = <&clks 26>;
#io-channel-cells = <1>;
fsl,lradc-touchscreen-wires = <4>;
fsl,ave-ctrl = <4>;
fsl,ave-delay = <2>;
fsl,settling = <10>;
};

148
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@ -0,0 +1,148 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/nxp,lpc1850-creg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: The NXP LPC18xx/43xx CREG (Configuration Registers) block
maintainers:
- Frank Li <Frank.Li@nxp.com>
properties:
compatible:
items:
- enum:
- nxp,lpc1850-creg
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
clock-controller:
type: object
description:
The NXP LPC18xx/43xx CREG (Configuration Registers) block contains
control registers for two low speed clocks. One of the clocks is a
32 kHz oscillator driver with power up/down and clock gating. Next
is a fixed divider that creates a 1 kHz clock from the 32 kHz osc.
These clocks are used by the RTC and the Event Router peripherals.
The 32 kHz can also be routed to other peripherals to enable low
power modes.
properties:
compatible:
const: nxp,lpc1850-creg-clk
clocks:
maxItems: 1
'#clock-cells':
const: 1
description: |
0 1 kHz clock
1 32 kHz Oscillator
required:
- compatible
- clocks
- '#clock-cells'
additionalProperties: false
phy:
type: object
description: the internal USB OTG PHY in NXP LPC18xx and LPC43xx SoCs
properties:
compatible:
const: nxp,lpc1850-usb-otg-phy
clocks:
maxItems: 1
'#phy-cells':
const: 0
required:
- compatible
- clocks
- '#phy-cells'
additionalProperties: false
dma-mux:
type: object
description: NXP LPC18xx/43xx DMA MUX (DMA request router)
properties:
compatible:
const: nxp,lpc1850-dmamux
'#dma-cells':
const: 3
description: |
Should be set to <3>.
* 1st cell contain the master dma request signal
* 2nd cell contain the mux value (0-3) for the peripheral
* 3rd cell contain either 1 or 2 depending on the AHB master used.
dma-requests:
$ref: /schemas/types.yaml#/definitions/uint32
maximum: 64
description: Number of DMA requests the controller can handle
dma-masters:
$ref: /schemas/types.yaml#/definitions/phandle
description: phandle pointing to the DMA controller
required:
- compatible
- '#dma-cells'
- dma-masters
additionalProperties: false
required:
- compatible
- reg
- clocks
- resets
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/lpc18xx-ccu.h>
syscon@40043000 {
compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd";
reg = <0x40043000 0x1000>;
clocks = <&ccu1 CLK_CPU_CREG>;
resets = <&rgu 5>;
clock-controller {
compatible = "nxp,lpc1850-creg-clk";
clocks = <&xtal32>;
#clock-cells = <1>;
};
phy {
compatible = "nxp,lpc1850-usb-otg-phy";
clocks = <&ccu1 CLK_USB0>;
#phy-cells = <0>;
};
dma-mux {
compatible = "nxp,lpc1850-dmamux";
#dma-cells = <3>;
dma-requests = <64>;
dma-masters = <&dmac>;
};
};

21
Documentation/devicetree/bindings/mfd/rockchip,rk806.yaml
View File

@ -31,6 +31,27 @@ properties:
system-power-controller: true
rockchip,reset-mode:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2]
description:
Mode to use when a reset of the PMIC is triggered.
The reset can be triggered either programmatically, via one of
the PWRCTRL pins (provided additional configuration) or
asserting RESETB pin low.
The following modes are supported
- 0; restart PMU,
- 1; reset all power off reset registers and force state to
switch to ACTIVE mode,
- 2; same as mode 1 and also pull RESETB pin down for 5ms,
For example, some hardware may require a full restart (mode 0)
in order to function properly as regulators are shortly
interrupted in this mode.
vcc1-supply:
description:
The input supply for dcdc-reg1.

3
Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml
View File

@ -81,6 +81,9 @@ allOf:
samsung,s2mps11-acokb-ground: false
samsung,s2mps11-wrstbi-ground: false
# oneOf is required, because dtschema's fixups.py doesn't handle this
# nesting here. Its special treatment to allow either interrupt property
# when only one is specified in the binding works at the top level only.
oneOf:
- required: [interrupts]
- required: [interrupts-extended]

318
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@ -0,0 +1,318 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/ti,tps65910.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI TPS65910 Power Management Integrated Circuit
maintainers:
- Shree Ramamoorthy <s-ramamoorthy@ti.com>
description:
TPS65910 device is a Power Management IC that provides 3 step-down converters,
1 stepup converter, and 8 LDOs. The device contains an embedded power controller (EPC),
1 GPIO, and an RTC.
properties:
compatible:
enum:
- ti,tps65910
- ti,tps65911
reg:
description: I2C slave address
maxItems: 1
gpio-controller: true
'#gpio-cells':
const: 2
description: |
The first cell is the GPIO number.
The second cell is used to specify additional options <unused>.
interrupts:
maxItems: 1
interrupt-controller: true
'#interrupt-cells':
description: Specifies the IRQ number and flags
const: 2
ti,vmbch-threshold:
description: |
(TPS65911) Main battery charged threshold comparator.
See VMBCH_VSEL in TPS65910 datasheet.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3]
ti,vmbch2-threshold:
description: |
(TPS65911) Main battery discharged threshold comparator.
See VMBCH_VSEL in TPS65910 datasheet.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3]
ti,en-ck32k-xtal:
type: boolean
description: Enable external 32-kHz crystal oscillator.
ti,en-gpio-sleep:
description: |
Enable sleep control for gpios.
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 9
maxItems: 9
items:
minimum: 0
maximum: 1
ti,system-power-controller:
type: boolean
description: Identify whether or not this pmic controls the system power
ti,sleep-enable:
type: boolean
description: Enable SLEEP state.
ti,sleep-keep-therm:
type: boolean
description: Keep thermal monitoring on in sleep state.
ti,sleep-keep-ck32k:
type: boolean
description: Keep the 32KHz clock output on in sleep state.
ti,sleep-keep-hsclk:
type: boolean
description: Keep high speed internal clock on in sleep state.
regulators:
type: object
additionalProperties: false
description: List of regulators provided by this controller.
patternProperties:
"^(vrtc|vio|vpll|vdac|vmmc|vbb|vddctrl)$":
type: object
$ref: /schemas/regulator/regulator.yaml#
properties:
ti,regulator-ext-sleep-control:
description: |
Enable external sleep control through external inputs:
[0 (not enabled), 1 (EN1), 2 (EN2) or 4(EN3)].
If this property is not defined, it defaults to 0 (not enabled).
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 4, 8]
unevaluatedProperties: false
"^(vdd[1-3]|vaux([1-2]|33)|vdig[1-2])$":
type: object
$ref: /schemas/regulator/regulator.yaml#
properties:
ti,regulator-ext-sleep-control:
description: |
Enable external sleep control through external inputs:
[0 (not enabled), 1 (EN1), 2 (EN2) or 4(EN3)].
If this property is not defined, it defaults to 0 (not enabled).
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 4, 8]
unevaluatedProperties: false
"^ldo[1-8]$":
type: object
$ref: /schemas/regulator/regulator.yaml#
properties:
ti,regulator-ext-sleep-control:
description: |
Enable external sleep control through external inputs:
[0 (not enabled), 1 (EN1), 2 (EN2) or 4(EN3)].
If this property is not defined, it defaults to 0 (not enabled).
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 4, 8]
unevaluatedProperties: false
patternProperties:
"^(vcc(io|[1-7])-supply)$":
description: |
Input voltage supply phandle for regulators.
These entries are required if PMIC regulators are enabled, or else it
can cause the regulator registration to fail.
If some input supply is powered through battery or always-on supply, then
it is also required to have these parameters with the proper node handle for always-on
power supply.
tps65910:
vcc1-supply: VDD1 input.
vcc2-supply: VDD2 input.
vcc3-supply: VAUX33 and VMMC input.
vcc4-supply: VAUX1 and VAUX2 input.
vcc5-supply: VPLL and VDAC input.
vcc6-supply: VDIG1 and VDIG2 input.
vcc7-supply: VRTC and VBB input.
vccio-supply: VIO input.
tps65911:
vcc1-supply: VDD1 input.
vcc2-supply: VDD2 input.
vcc3-supply: LDO6, LDO7 and LDO8 input.
vcc4-supply: LDO5 input.
vcc5-supply: LDO3 and LDO4 input.
vcc6-supply: LDO1 and LDO2 input.
vcc7-supply: VRTC input.
vccio-supply: VIO input.
required:
- compatible
- reg
- interrupts
- interrupt-controller
- '#interrupt-cells'
- gpio-controller
- '#gpio-cells'
- regulators
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- ti,tps65910
then:
properties:
regulators:
patternProperties:
"^(ldo[1-8]|vddctrl)$": false
- if:
properties:
compatible:
contains:
enum:
- ti,tps65911
then:
properties:
regulators:
patternProperties:
"^(vdd3|vaux([1-2]|33)|vdig[1-2])$": false
"^(vpll|vdac|vmmc|vbb)$": false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
pmic: tps65910@2d {
compatible = "ti,tps65910";
reg = <0x2d>;
interrupt-parent = <&intc>;
interrupts = < 0 118 0x04 >;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
ti,system-power-controller;
ti,vmbch-threshold = <0>;
ti,vmbch2-threshold = <0>;
ti,en-ck32k-xtal;
ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>;
vcc1-supply = <&reg_parent>;
vcc2-supply = <&some_reg>;
vcc3-supply = <&vbat>;
vcc4-supply = <&vbat>;
vcc5-supply = <&vbat>;
vcc6-supply = <&vbat>;
vcc7-supply = <&vbat>;
vccio-supply = <&vbat>;
regulators {
vio_reg: vio {
regulator-name = "vio";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vdd1_reg: vdd1 {
regulator-name = "vdd1";
regulator-min-microvolt = < 600000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
ti,regulator-ext-sleep-control = <0>;
};
vdd2_reg: vdd2 {
regulator-name = "vdd2";
regulator-min-microvolt = < 600000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
};
vdd3_reg: vdd3 {
regulator-name = "vdd3";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdig1_reg: vdig1 {
regulator-name = "vdig1";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <2700000>;
regulator-always-on;
};
vdig2_reg: vdig2 {
regulator-name = "vdig2";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vpll_reg: vpll {
regulator-name = "vpll";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
vdac_reg: vdac {
regulator-name = "vdac";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
};
vaux1_reg: vaux1 {
regulator-name = "vaux1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
};
vaux2_reg: vaux2 {
regulator-name = "vaux2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vaux33_reg: vaux33 {
regulator-name = "vaux33";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vmmc_reg: vmmc {
regulator-name = "vmmc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
};
};
};

205
Documentation/devicetree/bindings/mfd/tps65910.txt
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@ -1,205 +0,0 @@
TPS65910 Power Management Integrated Circuit
Required properties:
- compatible: "ti,tps65910" or "ti,tps65911"
- reg: I2C slave address
- interrupts: the interrupt outputs of the controller
- #gpio-cells: number of cells to describe a GPIO, this should be 2.
The first cell is the GPIO number.
The second cell is used to specify additional options <unused>.
- gpio-controller: mark the device as a GPIO controller
- #interrupt-cells: the number of cells to describe an IRQ, this should be 2.
The first cell is the IRQ number.
The second cell is the flags, encoded as the trigger masks from
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
- regulators: This is the list of child nodes that specify the regulator
initialization data for defined regulators. Not all regulators for the given
device need to be present. The definition for each of these nodes is defined
using the standard binding for regulators found at
Documentation/devicetree/bindings/regulator/regulator.txt.
The regulator is matched with the regulator-compatible.
The valid regulator-compatible values are:
tps65910: vrtc, vio, vdd1, vdd2, vdd3, vdig1, vdig2, vpll, vdac, vaux1,
vaux2, vaux33, vmmc, vbb
tps65911: vrtc, vio, vdd1, vdd2, vddctrl, ldo1, ldo2, ldo3, ldo4, ldo5,
ldo6, ldo7, ldo8
- xxx-supply: Input voltage supply regulator.
These entries are required if regulators are enabled for a device. Missing these
properties can cause the regulator registration to fail.
If some of input supply is powered through battery or always-on supply then
also it is require to have these parameters with proper node handle of always
on power supply.
tps65910:
vcc1-supply: VDD1 input.
vcc2-supply: VDD2 input.
vcc3-supply: VAUX33 and VMMC input.
vcc4-supply: VAUX1 and VAUX2 input.
vcc5-supply: VPLL and VDAC input.
vcc6-supply: VDIG1 and VDIG2 input.
vcc7-supply: VRTC and VBB input.
vccio-supply: VIO input.
tps65911:
vcc1-supply: VDD1 input.
vcc2-supply: VDD2 input.
vcc3-supply: LDO6, LDO7 and LDO8 input.
vcc4-supply: LDO5 input.
vcc5-supply: LDO3 and LDO4 input.
vcc6-supply: LDO1 and LDO2 input.
vcc7-supply: VRTC input.
vccio-supply: VIO input.
Optional properties:
- ti,vmbch-threshold: (tps65911) main battery charged threshold
comparator. (see VMBCH_VSEL in TPS65910 datasheet)
- ti,vmbch2-threshold: (tps65911) main battery discharged threshold
comparator. (see VMBCH_VSEL in TPS65910 datasheet)
- ti,en-ck32k-xtal: enable external 32-kHz crystal oscillator (see CK32K_CTRL
in TPS6591X datasheet)
- ti,en-gpio-sleep: enable sleep control for gpios
There should be 9 entries here, one for each gpio.
- ti,system-power-controller: Telling whether or not this pmic is controlling
the system power.
- ti,sleep-enable: Enable SLEEP state.
- ti,sleep-keep-therm: Keep thermal monitoring on in sleep state.
- ti,sleep-keep-ck32k: Keep the 32KHz clock output on in sleep state.
- ti,sleep-keep-hsclk: Keep high speed internal clock on in sleep state.
Regulator Optional properties:
- ti,regulator-ext-sleep-control: enable external sleep
control through external inputs [0 (not enabled), 1 (EN1), 2 (EN2) or 4(EN3)]
If this property is not defined, it defaults to 0 (not enabled).
Example:
pmu: tps65910@d2 {
compatible = "ti,tps65910";
reg = <0xd2>;
interrupt-parent = <&intc>;
interrupts = < 0 118 0x04 >;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
ti,system-power-controller;
ti,vmbch-threshold = 0;
ti,vmbch2-threshold = 0;
ti,en-ck32k-xtal;
ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>;
vcc1-supply = <&reg_parent>;
vcc2-supply = <&some_reg>;
vcc3-supply = <...>;
vcc4-supply = <...>;
vcc5-supply = <...>;
vcc6-supply = <...>;
vcc7-supply = <...>;
vccio-supply = <...>;
regulators {
#address-cells = <1>;
#size-cells = <0>;
vdd1_reg: regulator@0 {
regulator-compatible = "vdd1";
reg = <0>;
regulator-min-microvolt = < 600000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
ti,regulator-ext-sleep-control = <0>;
};
vdd2_reg: regulator@1 {
regulator-compatible = "vdd2";
reg = <1>;
regulator-min-microvolt = < 600000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
ti,regulator-ext-sleep-control = <4>;
};
vddctrl_reg: regulator@2 {
regulator-compatible = "vddctrl";
reg = <2>;
regulator-min-microvolt = < 600000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
regulator-boot-on;
ti,regulator-ext-sleep-control = <0>;
};
vio_reg: regulator@3 {
regulator-compatible = "vio";
reg = <3>;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
ti,regulator-ext-sleep-control = <1>;
};
ldo1_reg: regulator@4 {
regulator-compatible = "ldo1";
reg = <4>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3300000>;
ti,regulator-ext-sleep-control = <0>;
};
ldo2_reg: regulator@5 {
regulator-compatible = "ldo2";
reg = <5>;
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
ti,regulator-ext-sleep-control = <0>;
};
ldo3_reg: regulator@6 {
regulator-compatible = "ldo3";
reg = <6>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3300000>;
ti,regulator-ext-sleep-control = <0>;
};
ldo4_reg: regulator@7 {
regulator-compatible = "ldo4";
reg = <7>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
ti,regulator-ext-sleep-control = <0>;
};
ldo5_reg: regulator@8 {
regulator-compatible = "ldo5";
reg = <8>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3300000>;
ti,regulator-ext-sleep-control = <0>;
};
ldo6_reg: regulator@9 {
regulator-compatible = "ldo6";
reg = <9>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
ti,regulator-ext-sleep-control = <0>;
};
ldo7_reg: regulator@10 {
regulator-compatible = "ldo7";
reg = <10>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
ti,regulator-ext-sleep-control = <1>;
};
ldo8_reg: regulator@11 {
regulator-compatible = "ldo8";
reg = <11>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
ti,regulator-ext-sleep-control = <1>;
};
};
};

26
Documentation/devicetree/bindings/phy/phy-lpc18xx-usb-otg.txt
View File

@ -1,26 +0,0 @@
NXP LPC18xx/43xx internal USB OTG PHY binding
---------------------------------------------
This file contains documentation for the internal USB OTG PHY found
in NXP LPC18xx and LPC43xx SoCs.
Required properties:
- compatible : must be "nxp,lpc1850-usb-otg-phy"
- clocks : must be exactly one entry
See: Documentation/devicetree/bindings/clock/clock-bindings.txt
- #phy-cells : must be 0 for this phy
See: Documentation/devicetree/bindings/phy/phy-bindings.txt
The phy node must be a child of the creg syscon node.
Example:
creg: syscon@40043000 {
compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd";
reg = <0x40043000 0x1000>;
usb0_otg_phy: phy {
compatible = "nxp,lpc1850-usb-otg-phy";
clocks = <&ccu1 CLK_USB0>;
#phy-cells = <0>;
};
};

96
drivers/mfd/Kconfig
View File

@ -261,6 +261,36 @@ config MFD_CROS_EC_DEV
To compile this driver as a module, choose M here: the module will be
called cros-ec-dev.
config MFD_CS40L50_CORE
tristate
select MFD_CORE
select FW_CS_DSP
select REGMAP_IRQ
config MFD_CS40L50_I2C
tristate "Cirrus Logic CS40L50 (I2C)"
select REGMAP_I2C
select MFD_CS40L50_CORE
depends on I2C
help
Select this to support the Cirrus Logic CS40L50 Haptic
Driver over I2C.
This driver can be built as a module. If built as a module it will be
called "cs40l50-i2c".
config MFD_CS40L50_SPI
tristate "Cirrus Logic CS40L50 (SPI)"
select REGMAP_SPI
select MFD_CS40L50_CORE
depends on SPI
help
Select this to support the Cirrus Logic CS40L50 Haptic
Driver over SPI.
This driver can be built as a module. If built as a module it will be
called "cs40l50-spi".
config MFD_CS42L43
tristate
select MFD_CORE
@ -285,6 +315,14 @@ config MFD_CS42L43_SDW
Select this to support the Cirrus Logic CS42L43 PC CODEC with
headphone and class D speaker drivers over SoundWire.
config MFD_LOCHNAGAR
bool "Cirrus Logic Lochnagar Audio Development Board"
select MFD_CORE
select REGMAP_I2C
depends on I2C=y && OF
help
Support for Cirrus Logic Lochnagar audio development board.
config MFD_MACSMC
tristate "Apple Silicon System Management Controller (SMC)"
depends on ARCH_APPLE || COMPILE_TEST
@ -332,16 +370,6 @@ config MFD_MADERA_SPI
Support for the Cirrus Logic Madera platform audio SoC
core functionality controlled via SPI.
config MFD_MAX5970
tristate "Maxim 5970/5978 power switch and monitor"
depends on I2C && OF
select MFD_SIMPLE_MFD_I2C
help
This driver controls a Maxim 5970/5978 switch via I2C bus.
The MAX5970/5978 is a smart switch with no output regulation, but
fault protection and voltage and current monitoring capabilities.
Also it supports upto 4 indication leds.
config MFD_CS47L15
bool "Cirrus Logic CS47L15"
select PINCTRL_CS47L15
@ -848,6 +876,16 @@ config MFD_88PM886_PMIC
This includes the I2C driver and the core APIs _only_, you have to
select individual components like onkey under the corresponding menus.
config MFD_MAX5970
tristate "Maxim 5970/5978 power switch and monitor"
depends on I2C && OF
select MFD_SIMPLE_MFD_I2C
help
This driver controls a Maxim 5970/5978 switch via I2C bus.
The MAX5970/5978 is a smart switch with no output regulation, but
fault protection and voltage and current monitoring capabilities.
Also it supports upto 4 indication leds.
config MFD_MAX14577
tristate "Maxim Semiconductor MAX14577/77836 MUIC + Charger Support"
depends on I2C
@ -1970,14 +2008,6 @@ config MFD_VX855
VIA VX855/VX875 south bridge. You will need to enable the vx855_spi
and/or vx855_gpio drivers for this to do anything useful.
config MFD_LOCHNAGAR
bool "Cirrus Logic Lochnagar Audio Development Board"
select MFD_CORE
select REGMAP_I2C
depends on I2C=y && OF
help
Support for Cirrus Logic Lochnagar audio development board.
config MFD_ARIZONA
select REGMAP
select REGMAP_IRQ
@ -2335,36 +2365,6 @@ config MCP_UCB1200_TS
endmenu
config MFD_CS40L50_CORE
tristate
select MFD_CORE
select FW_CS_DSP
select REGMAP_IRQ
config MFD_CS40L50_I2C
tristate "Cirrus Logic CS40L50 (I2C)"
select REGMAP_I2C
select MFD_CS40L50_CORE
depends on I2C
help
Select this to support the Cirrus Logic CS40L50 Haptic
Driver over I2C.
This driver can be built as a module. If built as a module it will be
called "cs40l50-i2c".
config MFD_CS40L50_SPI
tristate "Cirrus Logic CS40L50 (SPI)"
select REGMAP_SPI
select MFD_CS40L50_CORE
depends on SPI
help
Select this to support the Cirrus Logic CS40L50 Haptic
Driver over SPI.
This driver can be built as a module. If built as a module it will be
called "cs40l50-spi".
config MFD_VEXPRESS_SYSREG
tristate "Versatile Express System Registers"
depends on VEXPRESS_CONFIG && GPIOLIB

3
drivers/mfd/ab8500-core.c
View File

@ -580,8 +580,7 @@ static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
num_irqs = AB8500_NR_IRQS;
/* If ->irq_base is zero this will give a linear mapping */
ab8500->domain = irq_domain_create_simple(of_fwnode_handle(ab8500->dev->of_node),
num_irqs, 0,
ab8500->domain = irq_domain_create_simple(dev_fwnode(ab8500->dev), num_irqs, 0,
&ab8500_irq_ops, ab8500);
if (!ab8500->domain) {

1
drivers/mfd/arizona-irq.c
View File

@ -152,7 +152,6 @@ static irqreturn_t arizona_irq_thread(int irq, void *data)
}
} while (poll);
pm_runtime_mark_last_busy(arizona->dev);
pm_runtime_put_autosuspend(arizona->dev);
return IRQ_HANDLED;

9
drivers/mfd/atmel-smc.c
View File

@ -8,9 +8,16 @@
* Author: Boris Brezillon <boris.brezillon@free-electrons.com>
*/
#include <linux/mfd/syscon/atmel-smc.h>
#include <linux/bits.h>
#include <linux/err.h>
#include <linux/export.h>
#include <linux/mod_devicetable.h>
#include <linux/of.h>
#include <linux/regmap.h>
#include <linux/string.h>
#include <linux/mfd/syscon/atmel-smc.h>
/**
* atmel_smc_cs_conf_init - initialize a SMC CS conf
* @conf: the SMC CS conf to initialize

8
drivers/mfd/axp20x.c
View File

@ -1053,7 +1053,8 @@ static const struct mfd_cell axp152_cells[] = {
};
static struct mfd_cell axp313a_cells[] = {
MFD_CELL_NAME("axp20x-regulator"),
/* AXP323 is sometimes paired with AXP717 as sub-PMIC */
MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1),
MFD_CELL_RES("axp313a-pek", axp313a_pek_resources),
};
@ -1230,9 +1231,8 @@ static const struct mfd_cell axp15060_cells[] = {
/* For boards that don't have IRQ line connected to SOC. */
static const struct mfd_cell axp_regulator_only_cells[] = {
{
.name = "axp20x-regulator",
},
/* PMIC without IRQ line may be secondary PMIC */
MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1),
};
static int axp20x_power_off(struct sys_off_data *data)

10
drivers/mfd/cros_ec_dev.c
View File

@ -87,7 +87,6 @@ static const struct mfd_cell cros_ec_sensorhub_cells[] = {
};
static const struct mfd_cell cros_usbpd_charger_cells[] = {
{ .name = "cros-charge-control", },
{ .name = "cros-usbpd-charger", },
{ .name = "cros-usbpd-logger", },
};
@ -112,6 +111,10 @@ static const struct mfd_cell cros_ec_ucsi_cells[] = {
{ .name = "cros_ec_ucsi", },
};
static const struct mfd_cell cros_ec_charge_control_cells[] = {
{ .name = "cros-charge-control", },
};
static const struct cros_feature_to_cells cros_subdevices[] = {
{
.id = EC_FEATURE_CEC,
@ -148,6 +151,11 @@ static const struct cros_feature_to_cells cros_subdevices[] = {
.mfd_cells = cros_ec_keyboard_leds_cells,
.num_cells = ARRAY_SIZE(cros_ec_keyboard_leds_cells),
},
{
.id = EC_FEATURE_CHARGER,
.mfd_cells = cros_ec_charge_control_cells,
.num_cells = ARRAY_SIZE(cros_ec_charge_control_cells),
},
};
static const struct mfd_cell cros_ec_platform_cells[] = {

3
drivers/mfd/cs40l50-core.c
View File

@ -52,7 +52,7 @@ static const struct regmap_irq cs40l50_reg_irqs[] = {
CS40L50_GLOBAL_ERROR_MASK),
};
static struct regmap_irq_chip cs40l50_irq_chip = {
static const struct regmap_irq_chip cs40l50_irq_chip = {
.name = "cs40l50",
.status_base = CS40L50_IRQ1_INT_1,
.mask_base = CS40L50_IRQ1_MASK_1,
@ -531,7 +531,6 @@ int cs40l50_probe(struct cs40l50 *cs40l50)
if (ret)
return dev_err_probe(dev, ret, "Failed to request %s\n", CS40L50_FW);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return 0;

1
drivers/mfd/cs42l43.c
View File

@ -962,7 +962,6 @@ static void cs42l43_boot_work(struct work_struct *work)
goto err;
}
pm_runtime_mark_last_busy(cs42l43->dev);
pm_runtime_put_autosuspend(cs42l43->dev);
return;

4
drivers/mfd/fsl-imx25-tsadc.c
View File

@ -71,8 +71,8 @@ static int mx25_tsadc_setup_irq(struct platform_device *pdev,
if (irq < 0)
return irq;
tsadc->domain = irq_domain_create_simple(of_fwnode_handle(dev->of_node), 2, 0,
&mx25_tsadc_domain_ops, tsadc);
tsadc->domain = irq_domain_create_simple(dev_fwnode(dev), 2, 0, &mx25_tsadc_domain_ops,
tsadc);
if (!tsadc->domain) {
dev_err(dev, "Failed to add irq domain\n");
return -ENOMEM;

2
drivers/mfd/lp8788-irq.c
View File

@ -161,7 +161,7 @@ int lp8788_irq_init(struct lp8788 *lp, int irq)
return -ENOMEM;
irqd->lp = lp;
irqd->domain = irq_domain_create_linear(of_fwnode_handle(lp->dev->of_node), LP8788_INT_MAX,
irqd->domain = irq_domain_create_linear(dev_fwnode(lp->dev), LP8788_INT_MAX,
&lp8788_domain_ops, irqd);
if (!irqd->domain) {
dev_err(lp->dev, "failed to add irq domain err\n");

3
drivers/mfd/mt6358-irq.c
View File

@ -272,8 +272,7 @@ int mt6358_irq_init(struct mt6397_chip *chip)
irqd->pmic_ints[i].en_reg_shift * j, 0);
}
chip->irq_domain = irq_domain_create_linear(of_fwnode_handle(chip->dev->of_node),
irqd->num_pmic_irqs,
chip->irq_domain = irq_domain_create_linear(dev_fwnode(chip->dev), irqd->num_pmic_irqs,
&mt6358_irq_domain_ops, chip);
if (!chip->irq_domain) {
dev_err(chip->dev, "Could not create IRQ domain\n");

2
drivers/mfd/mt6370.c
View File

@ -95,7 +95,7 @@ static const struct regmap_irq mt6370_irqs[] = {
REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED1_SHORT, 8),
REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED2_STRB, 8),
REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED1_STRB, 8),
REGMAP_IRQ_REG_LINE(mT6370_IRQ_FLED2_STRB_TO, 8),
REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED2_STRB_TO, 8),
REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED1_STRB_TO, 8),
REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED2_TOR, 8),
REGMAP_IRQ_REG_LINE(MT6370_IRQ_FLED1_TOR, 8),

2
drivers/mfd/mt6370.h
View File

@ -69,7 +69,7 @@
#define MT6370_IRQ_FLED1_SHORT 79
#define MT6370_IRQ_FLED2_STRB 80
#define MT6370_IRQ_FLED1_STRB 81
#define mT6370_IRQ_FLED2_STRB_TO 82
#define MT6370_IRQ_FLED2_STRB_TO 82
#define MT6370_IRQ_FLED1_STRB_TO 83
#define MT6370_IRQ_FLED2_TOR 84
#define MT6370_IRQ_FLED1_TOR 85

12
drivers/mfd/mt6397-core.c
View File

@ -136,7 +136,7 @@ static const struct mfd_cell mt6323_devs[] = {
.name = "mt6323-led",
.of_compatible = "mediatek,mt6323-led"
}, {
.name = "mtk-pmic-keys",
.name = "mt6323-keys",
.num_resources = ARRAY_SIZE(mt6323_keys_resources),
.resources = mt6323_keys_resources,
.of_compatible = "mediatek,mt6323-keys"
@ -153,7 +153,7 @@ static const struct mfd_cell mt6328_devs[] = {
.name = "mt6328-regulator",
.of_compatible = "mediatek,mt6328-regulator"
}, {
.name = "mtk-pmic-keys",
.name = "mt6328-keys",
.num_resources = ARRAY_SIZE(mt6328_keys_resources),
.resources = mt6328_keys_resources,
.of_compatible = "mediatek,mt6328-keys"
@ -175,7 +175,7 @@ static const struct mfd_cell mt6357_devs[] = {
.name = "mt6357-sound",
.of_compatible = "mediatek,mt6357-sound"
}, {
.name = "mtk-pmic-keys",
.name = "mt6357-keys",
.num_resources = ARRAY_SIZE(mt6357_keys_resources),
.resources = mt6357_keys_resources,
.of_compatible = "mediatek,mt6357-keys"
@ -196,7 +196,7 @@ static const struct mfd_cell mt6331_mt6332_devs[] = {
.name = "mt6332-regulator",
.of_compatible = "mediatek,mt6332-regulator"
}, {
.name = "mtk-pmic-keys",
.name = "mt6331-keys",
.num_resources = ARRAY_SIZE(mt6331_keys_resources),
.resources = mt6331_keys_resources,
.of_compatible = "mediatek,mt6331-keys"
@ -240,7 +240,7 @@ static const struct mfd_cell mt6359_devs[] = {
},
{ .name = "mt6359-sound", },
{
.name = "mtk-pmic-keys",
.name = "mt6359-keys",
.num_resources = ARRAY_SIZE(mt6359_keys_resources),
.resources = mt6359_keys_resources,
.of_compatible = "mediatek,mt6359-keys"
@ -272,7 +272,7 @@ static const struct mfd_cell mt6397_devs[] = {
.name = "mt6397-pinctrl",
.of_compatible = "mediatek,mt6397-pinctrl",
}, {
.name = "mtk-pmic-keys",
.name = "mt6397-keys",
.num_resources = ARRAY_SIZE(mt6397_keys_resources),
.resources = mt6397_keys_resources,
.of_compatible = "mediatek,mt6397-keys"

4
drivers/mfd/mt6397-irq.c
View File

@ -216,8 +216,8 @@ int mt6397_irq_init(struct mt6397_chip *chip)
regmap_write(chip->regmap, chip->int_con[2], 0x0);
chip->pm_nb.notifier_call = mt6397_irq_pm_notifier;
chip->irq_domain = irq_domain_create_linear(of_fwnode_handle(chip->dev->of_node),
MT6397_IRQ_NR, &mt6397_irq_domain_ops, chip);
chip->irq_domain = irq_domain_create_linear(dev_fwnode(chip->dev), MT6397_IRQ_NR,
&mt6397_irq_domain_ops, chip);
if (!chip->irq_domain) {
dev_err(chip->dev, "could not create irq domain\n");
return -ENOMEM;

4
drivers/mfd/qcom-pm8xxx.c
View File

@ -559,8 +559,8 @@ static int pm8xxx_probe(struct platform_device *pdev)
chip->pm_irq_data = data;
spin_lock_init(&chip->pm_irq_lock);
chip->irqdomain = irq_domain_create_linear(of_fwnode_handle(pdev->dev.of_node),
data->num_irqs, &pm8xxx_irq_domain_ops, chip);
chip->irqdomain = irq_domain_create_linear(dev_fwnode(&pdev->dev), data->num_irqs,
&pm8xxx_irq_domain_ops, chip);
if (!chip->irqdomain)
return -ENODEV;

12
drivers/mfd/rk8xx-core.c
View File

@ -10,6 +10,7 @@
* Author: Wadim Egorov <w.egorov@phytec.de>
*/
#include <linux/bitfield.h>
#include <linux/interrupt.h>
#include <linux/mfd/rk808.h>
#include <linux/mfd/core.h>
@ -699,6 +700,7 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap
const struct mfd_cell *cells;
int dual_support = 0;
int nr_pre_init_regs;
u32 rst_fun = 0;
int nr_cells;
int ret;
int i;
@ -726,6 +728,16 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap
cells = rk806s;
nr_cells = ARRAY_SIZE(rk806s);
dual_support = IRQF_SHARED;
ret = device_property_read_u32(dev, "rockchip,reset-mode", &rst_fun);
if (ret)
break;
ret = regmap_update_bits(rk808->regmap, RK806_SYS_CFG3, RK806_RST_FUN_MSK,
FIELD_PREP(RK806_RST_FUN_MSK, rst_fun));
if (ret)
return dev_err_probe(dev, ret,
"Failed to configure requested restart/reset behavior\n");
break;
case RK808_ID:
rk808->regmap_irq_chip = &rk808_irq_chip;

12
drivers/mfd/rohm-bd71828.c
View File

@ -25,7 +25,7 @@ static struct gpio_keys_button button = {
.type = EV_KEY,
};
static struct gpio_keys_platform_data bd71828_powerkey_data = {
static const struct gpio_keys_platform_data bd71828_powerkey_data = {
.buttons = &button,
.nbuttons = 1,
.name = "bd71828-pwrkey",
@ -43,7 +43,7 @@ static const struct resource bd71828_rtc_irqs[] = {
DEFINE_RES_IRQ_NAMED(BD71828_INT_RTC2, "bd70528-rtc-alm-2"),
};
static struct resource bd71815_power_irqs[] = {
static const struct resource bd71815_power_irqs[] = {
DEFINE_RES_IRQ_NAMED(BD71815_INT_DCIN_RMV, "bd71815-dcin-rmv"),
DEFINE_RES_IRQ_NAMED(BD71815_INT_CLPS_OUT, "bd71815-clps-out"),
DEFINE_RES_IRQ_NAMED(BD71815_INT_CLPS_IN, "bd71815-clps-in"),
@ -93,7 +93,7 @@ static struct resource bd71815_power_irqs[] = {
DEFINE_RES_IRQ_NAMED(BD71815_INT_TEMP_BAT_HI_DET, "bd71815-bat-hi-det"),
};
static struct mfd_cell bd71815_mfd_cells[] = {
static const struct mfd_cell bd71815_mfd_cells[] = {
{ .name = "bd71815-pmic", },
{ .name = "bd71815-clk", },
{ .name = "bd71815-gpo", },
@ -109,7 +109,7 @@ static struct mfd_cell bd71815_mfd_cells[] = {
},
};
static struct mfd_cell bd71828_mfd_cells[] = {
static const struct mfd_cell bd71828_mfd_cells[] = {
{ .name = "bd71828-pmic", },
{ .name = "bd71828-gpio", },
{ .name = "bd71828-led", .of_compatible = "rohm,bd71828-leds" },
@ -223,7 +223,7 @@ static unsigned int bit5_offsets[] = {3}; /* VSYS IRQ */
static unsigned int bit6_offsets[] = {1, 2}; /* DCIN IRQ */
static unsigned int bit7_offsets[] = {0}; /* BUCK IRQ */
static struct regmap_irq_sub_irq_map bd718xx_sub_irq_offsets[] = {
static const struct regmap_irq_sub_irq_map bd718xx_sub_irq_offsets[] = {
REGMAP_IRQ_MAIN_REG_OFFSET(bit0_offsets),
REGMAP_IRQ_MAIN_REG_OFFSET(bit1_offsets),
REGMAP_IRQ_MAIN_REG_OFFSET(bit2_offsets),
@ -493,7 +493,7 @@ static int bd71828_i2c_probe(struct i2c_client *i2c)
const struct regmap_config *regmap_config;
const struct regmap_irq_chip *irqchip;
unsigned int chip_type;
struct mfd_cell *mfd;
const struct mfd_cell *mfd;
int cells;
int button_irq;
int clkmode_reg;

1
drivers/mfd/stm32-timers.c
View File

@ -5,6 +5,7 @@
*/
#include <linux/bitfield.h>
#include <linux/export.h>
#include <linux/mfd/stm32-timers.h>
#include <linux/module.h>
#include <linux/of_platform.h>

5
drivers/mfd/stmfx.c
View File

@ -269,9 +269,8 @@ static int stmfx_irq_init(struct i2c_client *client)
u32 irqoutpin = 0, irqtrigger;
int ret;
stmfx->irq_domain = irq_domain_create_simple(of_fwnode_handle(stmfx->dev->of_node),
STMFX_REG_IRQ_SRC_MAX, 0,
&stmfx_irq_ops, stmfx);
stmfx->irq_domain = irq_domain_create_simple(dev_fwnode(stmfx->dev), STMFX_REG_IRQ_SRC_MAX,
0, &stmfx_irq_ops, stmfx);
if (!stmfx->irq_domain) {
dev_err(stmfx->dev, "Failed to create IRQ domain\n");
return -EINVAL;

4
drivers/mfd/tps65217.c
View File

@ -158,8 +158,8 @@ static int tps65217_irq_init(struct tps65217 *tps, int irq)
tps65217_set_bits(tps, TPS65217_REG_INT, TPS65217_INT_MASK,
TPS65217_INT_MASK, TPS65217_PROTECT_NONE);
tps->irq_domain = irq_domain_create_linear(of_fwnode_handle(tps->dev->of_node),
TPS65217_NUM_IRQ, &tps65217_irq_domain_ops, tps);
tps->irq_domain = irq_domain_create_linear(dev_fwnode(tps->dev), TPS65217_NUM_IRQ,
&tps65217_irq_domain_ops, tps);
if (!tps->irq_domain) {
dev_err(tps->dev, "Could not create IRQ domain\n");
return -ENOMEM;

17
drivers/mfd/tps65219.c
View File

@ -190,7 +190,7 @@ static const struct resource tps65219_regulator_resources[] = {
static const struct mfd_cell tps65214_cells[] = {
MFD_CELL_RES("tps65214-regulator", tps65214_regulator_resources),
MFD_CELL_NAME("tps65215-gpio"),
MFD_CELL_NAME("tps65214-gpio"),
};
static const struct mfd_cell tps65215_cells[] = {
@ -238,7 +238,7 @@ static unsigned int tps65214_bit4_offsets[] = { TPS65214_REG_INT_BUCK_3_POS };
static unsigned int tps65214_bit5_offsets[] = { TPS65214_REG_INT_LDO_1_2_POS };
static unsigned int tps65214_bit7_offsets[] = { TPS65214_REG_INT_PB_POS };
static struct regmap_irq_sub_irq_map tps65219_sub_irq_offsets[] = {
static const struct regmap_irq_sub_irq_map tps65219_sub_irq_offsets[] = {
REGMAP_IRQ_MAIN_REG_OFFSET(bit0_offsets),
REGMAP_IRQ_MAIN_REG_OFFSET(bit1_offsets),
REGMAP_IRQ_MAIN_REG_OFFSET(bit2_offsets),
@ -249,7 +249,7 @@ static struct regmap_irq_sub_irq_map tps65219_sub_irq_offsets[] = {
REGMAP_IRQ_MAIN_REG_OFFSET(bit7_offsets),
};
static struct regmap_irq_sub_irq_map tps65215_sub_irq_offsets[] = {
static const struct regmap_irq_sub_irq_map tps65215_sub_irq_offsets[] = {
REGMAP_IRQ_MAIN_REG_OFFSET(bit0_offsets),
REGMAP_IRQ_MAIN_REG_OFFSET(bit1_offsets),
REGMAP_IRQ_MAIN_REG_OFFSET(bit2_offsets),
@ -260,7 +260,7 @@ static struct regmap_irq_sub_irq_map tps65215_sub_irq_offsets[] = {
REGMAP_IRQ_MAIN_REG_OFFSET(bit7_offsets),
};
static struct regmap_irq_sub_irq_map tps65214_sub_irq_offsets[] = {
static const struct regmap_irq_sub_irq_map tps65214_sub_irq_offsets[] = {
REGMAP_IRQ_MAIN_REG_OFFSET(tps65214_bit0_offsets),
REGMAP_IRQ_MAIN_REG_OFFSET(tps65214_bit1_offsets),
REGMAP_IRQ_MAIN_REG_OFFSET(tps65214_bit2_offsets),
@ -455,7 +455,7 @@ struct tps65219_chip_data {
int n_cells;
};
static struct tps65219_chip_data chip_info_table[] = {
static const struct tps65219_chip_data chip_info_table[] = {
[TPS65214] = {
.irq_chip = &tps65214_irq_chip,
.cells = tps65214_cells,
@ -476,7 +476,8 @@ static struct tps65219_chip_data chip_info_table[] = {
static int tps65219_probe(struct i2c_client *client)
{
struct tps65219 *tps;
struct tps65219_chip_data *pmic;
const struct tps65219_chip_data *pmic;
unsigned int chip_id;
bool pwr_button;
int ret;
@ -487,8 +488,8 @@ static int tps65219_probe(struct i2c_client *client)
i2c_set_clientdata(client, tps);
tps->dev = &client->dev;
tps->chip_id = (uintptr_t)i2c_get_match_data(client);
pmic = &chip_info_table[tps->chip_id];
chip_id = (uintptr_t)i2c_get_match_data(client);
pmic = &chip_info_table[chip_id];
tps->regmap = devm_regmap_init_i2c(client, &tps65219_regmap_config);
if (IS_ERR(tps->regmap)) {

6
drivers/mfd/tps6586x.c
View File

@ -363,9 +363,9 @@ static int tps6586x_irq_init(struct tps6586x *tps6586x, int irq,
new_irq_base = 0;
}
tps6586x->irq_domain = irq_domain_create_simple(of_fwnode_handle(tps6586x->dev->of_node),
irq_num, new_irq_base, &tps6586x_domain_ops,
tps6586x);
tps6586x->irq_domain = irq_domain_create_simple(dev_fwnode(tps6586x->dev), irq_num,
new_irq_base, &tps6586x_domain_ops,
tps6586x);
if (!tps6586x->irq_domain) {
dev_err(tps6586x->dev, "Failed to create IRQ domain\n");
return -ENOMEM;

79
drivers/mfd/twl6030-irq.c
View File

@ -256,80 +256,6 @@ int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
}
EXPORT_SYMBOL(twl6030_interrupt_mask);
int twl6030_mmc_card_detect_config(void)
{
int ret;
u8 reg_val = 0;
/* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
REG_INT_MSK_LINE_B);
twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
REG_INT_MSK_STS_B);
/*
* Initially Configuring MMC_CTRL for receiving interrupts &
* Card status on TWL6030 for MMC1
*/
ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL);
if (ret < 0) {
pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
return ret;
}
reg_val &= ~VMMC_AUTO_OFF;
reg_val |= SW_FC;
ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
if (ret < 0) {
pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
return ret;
}
/* Configuring PullUp-PullDown register */
ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val,
TWL6030_CFG_INPUT_PUPD3);
if (ret < 0) {
pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
ret);
return ret;
}
reg_val &= ~(MMC_PU | MMC_PD);
ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
TWL6030_CFG_INPUT_PUPD3);
if (ret < 0) {
pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
ret);
return ret;
}
return irq_find_mapping(twl6030_irq->irq_domain,
MMCDETECT_INTR_OFFSET);
}
EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
int twl6030_mmc_card_detect(struct device *dev, int slot)
{
int ret = -EIO;
u8 read_reg = 0;
struct platform_device *pdev = to_platform_device(dev);
if (pdev->id) {
/* TWL6030 provide's Card detect support for
* only MMC1 controller.
*/
pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__);
return ret;
}
/*
* BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
* 0 - Card not present ,1 - Card present
*/
ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
TWL6030_MMCCTRL);
if (ret >= 0)
ret = read_reg & STS_MMC;
return ret;
}
EXPORT_SYMBOL(twl6030_mmc_card_detect);
static int twl6030_irq_map(struct irq_domain *d, unsigned int virq,
irq_hw_number_t hwirq)
{
@ -410,9 +336,8 @@ int twl6030_init_irq(struct device *dev, int irq_num)
atomic_set(&twl6030_irq->wakeirqs, 0);
twl6030_irq->irq_mapping_tbl = of_id->data;
twl6030_irq->irq_domain =
irq_domain_create_linear(of_fwnode_handle(dev->of_node), nr_irqs,
&twl6030_irq_domain_ops, twl6030_irq);
twl6030_irq->irq_domain = irq_domain_create_linear(dev_fwnode(dev), nr_irqs,
&twl6030_irq_domain_ops, twl6030_irq);
if (!twl6030_irq->irq_domain) {
dev_err(dev, "Can't add irq_domain\n");
return -ENOMEM;

2
drivers/mfd/twl6040.c
View File

@ -69,7 +69,7 @@ static const struct reg_default twl6040_defaults[] = {
{ 0x2E, 0x00 }, /* REG_STATUS (ro) */
};
static struct reg_sequence twl6040_patch[] = {
static const struct reg_sequence twl6040_patch[] = {
/*
* Select I2C bus access to dual access registers
* Interrupt register is cleared on read

10
drivers/mfd/wm831x-irq.c
View File

@ -587,13 +587,11 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq)
}
if (irq_base)
domain = irq_domain_create_legacy(of_fwnode_handle(wm831x->dev->of_node),
ARRAY_SIZE(wm831x_irqs), irq_base, 0,
&wm831x_irq_domain_ops, wm831x);
domain = irq_domain_create_legacy(dev_fwnode(wm831x->dev), ARRAY_SIZE(wm831x_irqs),
irq_base, 0, &wm831x_irq_domain_ops, wm831x);
else
domain = irq_domain_create_linear(of_fwnode_handle(wm831x->dev->of_node),
ARRAY_SIZE(wm831x_irqs), &wm831x_irq_domain_ops,
wm831x);
domain = irq_domain_create_linear(dev_fwnode(wm831x->dev), ARRAY_SIZE(wm831x_irqs),
&wm831x_irq_domain_ops, wm831x);
if (!domain) {
dev_warn(wm831x->dev, "Failed to allocate IRQ domain\n");

8
include/linux/mfd/davinci_voicecodec.h
View File

@ -10,11 +10,13 @@
#ifndef __LINUX_MFD_DAVINCI_VOICECODEC_H_
#define __LINUX_MFD_DAVINCI_VOICECODEC_H_
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/bits.h>
#include <linux/mfd/core.h>
#include <linux/platform_data/edma.h>
#include <linux/types.h>
struct clk;
struct device;
struct platform_device;
struct regmap;
/*

3
include/linux/mfd/madera/pdata.h
View File

@ -8,10 +8,11 @@
#ifndef MADERA_PDATA_H
#define MADERA_PDATA_H
#include <linux/kernel.h>
#include <linux/regulator/arizona-ldo1.h>
#include <linux/regulator/arizona-micsupp.h>
#include <linux/regulator/machine.h>
#include <linux/types.h>
#include <sound/madera-pdata.h>
#define MADERA_MAX_MICBIAS 4

229
include/linux/mfd/pcf50633/core.h
View File

@ -1,229 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* core.h -- Core driver for NXP PCF50633
*
* (C) 2006-2008 by Openmoko, Inc.
* All rights reserved.
*/
#ifndef __LINUX_MFD_PCF50633_CORE_H
#define __LINUX_MFD_PCF50633_CORE_H
#include <linux/i2c.h>
#include <linux/workqueue.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/pm.h>
#include <linux/power_supply.h>
struct pcf50633;
struct regmap;
#define PCF50633_NUM_REGULATORS 11
struct pcf50633_platform_data {
struct regulator_init_data reg_init_data[PCF50633_NUM_REGULATORS];
char **batteries;
int num_batteries;
/*
* Should be set accordingly to the reference resistor used, see
* I_{ch(ref)} charger reference current in the pcf50633 User
* Manual.
*/
int charger_reference_current_ma;
/* Callbacks */
void (*probe_done)(struct pcf50633 *);
void (*mbc_event_callback)(struct pcf50633 *, int);
void (*regulator_registered)(struct pcf50633 *, int);
void (*force_shutdown)(struct pcf50633 *);
u8 resumers[5];
};
struct pcf50633_irq {
void (*handler) (int, void *);
void *data;
};
int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
void (*handler) (int, void *), void *data);
int pcf50633_free_irq(struct pcf50633 *pcf, int irq);
int pcf50633_irq_mask(struct pcf50633 *pcf, int irq);
int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq);
int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq);
int pcf50633_read_block(struct pcf50633 *, u8 reg,
int nr_regs, u8 *data);
int pcf50633_write_block(struct pcf50633 *pcf, u8 reg,
int nr_regs, u8 *data);
u8 pcf50633_reg_read(struct pcf50633 *, u8 reg);
int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val);
int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val);
int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 bits);
/* Interrupt registers */
#define PCF50633_REG_INT1 0x02
#define PCF50633_REG_INT2 0x03
#define PCF50633_REG_INT3 0x04
#define PCF50633_REG_INT4 0x05
#define PCF50633_REG_INT5 0x06
#define PCF50633_REG_INT1M 0x07
#define PCF50633_REG_INT2M 0x08
#define PCF50633_REG_INT3M 0x09
#define PCF50633_REG_INT4M 0x0a
#define PCF50633_REG_INT5M 0x0b
enum {
/* Chip IRQs */
PCF50633_IRQ_ADPINS,
PCF50633_IRQ_ADPREM,
PCF50633_IRQ_USBINS,
PCF50633_IRQ_USBREM,
PCF50633_IRQ_RESERVED1,
PCF50633_IRQ_RESERVED2,
PCF50633_IRQ_ALARM,
PCF50633_IRQ_SECOND,
PCF50633_IRQ_ONKEYR,
PCF50633_IRQ_ONKEYF,
PCF50633_IRQ_EXTON1R,
PCF50633_IRQ_EXTON1F,
PCF50633_IRQ_EXTON2R,
PCF50633_IRQ_EXTON2F,
PCF50633_IRQ_EXTON3R,
PCF50633_IRQ_EXTON3F,
PCF50633_IRQ_BATFULL,
PCF50633_IRQ_CHGHALT,
PCF50633_IRQ_THLIMON,
PCF50633_IRQ_THLIMOFF,
PCF50633_IRQ_USBLIMON,
PCF50633_IRQ_USBLIMOFF,
PCF50633_IRQ_ADCRDY,
PCF50633_IRQ_ONKEY1S,
PCF50633_IRQ_LOWSYS,
PCF50633_IRQ_LOWBAT,
PCF50633_IRQ_HIGHTMP,
PCF50633_IRQ_AUTOPWRFAIL,
PCF50633_IRQ_DWN1PWRFAIL,
PCF50633_IRQ_DWN2PWRFAIL,
PCF50633_IRQ_LEDPWRFAIL,
PCF50633_IRQ_LEDOVP,
PCF50633_IRQ_LDO1PWRFAIL,
PCF50633_IRQ_LDO2PWRFAIL,
PCF50633_IRQ_LDO3PWRFAIL,
PCF50633_IRQ_LDO4PWRFAIL,
PCF50633_IRQ_LDO5PWRFAIL,
PCF50633_IRQ_LDO6PWRFAIL,
PCF50633_IRQ_HCLDOPWRFAIL,
PCF50633_IRQ_HCLDOOVL,
/* Always last */
PCF50633_NUM_IRQ,
};
struct pcf50633 {
struct device *dev;
struct regmap *regmap;
struct pcf50633_platform_data *pdata;
int irq;
struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ];
struct work_struct irq_work;
struct workqueue_struct *work_queue;
struct mutex lock;
u8 mask_regs[5];
u8 suspend_irq_masks[5];
u8 resume_reason[5];
int is_suspended;
int onkey1s_held;
struct platform_device *rtc_pdev;
struct platform_device *mbc_pdev;
struct platform_device *adc_pdev;
struct platform_device *input_pdev;
struct platform_device *bl_pdev;
struct platform_device *regulator_pdev[PCF50633_NUM_REGULATORS];
};
enum pcf50633_reg_int1 {
PCF50633_INT1_ADPINS = 0x01, /* Adapter inserted */
PCF50633_INT1_ADPREM = 0x02, /* Adapter removed */
PCF50633_INT1_USBINS = 0x04, /* USB inserted */
PCF50633_INT1_USBREM = 0x08, /* USB removed */
/* reserved */
PCF50633_INT1_ALARM = 0x40, /* RTC alarm time is reached */
PCF50633_INT1_SECOND = 0x80, /* RTC periodic second interrupt */
};
enum pcf50633_reg_int2 {
PCF50633_INT2_ONKEYR = 0x01, /* ONKEY rising edge */
PCF50633_INT2_ONKEYF = 0x02, /* ONKEY falling edge */
PCF50633_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */
PCF50633_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */
PCF50633_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */
PCF50633_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */
PCF50633_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */
PCF50633_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */
};
enum pcf50633_reg_int3 {
PCF50633_INT3_BATFULL = 0x01, /* Battery full */
PCF50633_INT3_CHGHALT = 0x02, /* Charger halt */
PCF50633_INT3_THLIMON = 0x04,
PCF50633_INT3_THLIMOFF = 0x08,
PCF50633_INT3_USBLIMON = 0x10,
PCF50633_INT3_USBLIMOFF = 0x20,
PCF50633_INT3_ADCRDY = 0x40, /* ADC result ready */
PCF50633_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */
};
enum pcf50633_reg_int4 {
PCF50633_INT4_LOWSYS = 0x01,
PCF50633_INT4_LOWBAT = 0x02,
PCF50633_INT4_HIGHTMP = 0x04,
PCF50633_INT4_AUTOPWRFAIL = 0x08,
PCF50633_INT4_DWN1PWRFAIL = 0x10,
PCF50633_INT4_DWN2PWRFAIL = 0x20,
PCF50633_INT4_LEDPWRFAIL = 0x40,
PCF50633_INT4_LEDOVP = 0x80,
};
enum pcf50633_reg_int5 {
PCF50633_INT5_LDO1PWRFAIL = 0x01,
PCF50633_INT5_LDO2PWRFAIL = 0x02,
PCF50633_INT5_LDO3PWRFAIL = 0x04,
PCF50633_INT5_LDO4PWRFAIL = 0x08,
PCF50633_INT5_LDO5PWRFAIL = 0x10,
PCF50633_INT5_LDO6PWRFAIL = 0x20,
PCF50633_INT5_HCLDOPWRFAIL = 0x40,
PCF50633_INT5_HCLDOOVL = 0x80,
};
/* misc. registers */
#define PCF50633_REG_OOCSHDWN 0x0c
/* LED registers */
#define PCF50633_REG_LEDOUT 0x28
#define PCF50633_REG_LEDENA 0x29
#define PCF50633_REG_LEDCTL 0x2a
#define PCF50633_REG_LEDDIM 0x2b
static inline struct pcf50633 *dev_to_pcf50633(struct device *dev)
{
return dev_get_drvdata(dev);
}
int pcf50633_irq_init(struct pcf50633 *pcf, int irq);
void pcf50633_irq_free(struct pcf50633 *pcf);
extern const struct dev_pm_ops pcf50633_pm;
#endif

2
include/linux/mfd/rk808.h
View File

@ -812,6 +812,8 @@ enum rk806_pin_dr_sel {
#define RK806_INT_POL_H BIT(1)
#define RK806_INT_POL_L 0
/* SYS_CFG3 */
#define RK806_RST_FUN_MSK GENMASK(7, 6)
#define RK806_SLAVE_RESTART_FUN_MSK BIT(1)
#define RK806_SLAVE_RESTART_FUN_EN BIT(1)
#define RK806_SLAVE_RESTART_FUN_OFF 0

8
include/linux/mfd/syscon/atmel-smc.h
View File

@ -11,9 +11,11 @@
#ifndef _LINUX_MFD_SYSCON_ATMEL_SMC_H_
#define _LINUX_MFD_SYSCON_ATMEL_SMC_H_
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/regmap.h>
#include <linux/bits.h>
#include <linux/types.h>
struct device_node;
struct regmap;
#define ATMEL_SMC_SETUP(cs) (((cs) * 0x10))
#define ATMEL_HSMC_SETUP(layout, cs) \

5
include/linux/mfd/tps65219.h
View File

@ -10,7 +10,6 @@
#define MFD_TPS65219_H
#include <linux/bitops.h>
#include <linux/notifier.h>
#include <linux/regmap.h>
#include <linux/regulator/driver.h>
@ -438,17 +437,13 @@ enum tps65219_irqs {
*
* @dev: MFD device
* @regmap: Regmap for accessing the device registers
* @chip_id: Chip ID
* @irq_data: Regmap irq data used for the irq chip
* @nb: notifier block for the restart handler
*/
struct tps65219 {
struct device *dev;
struct regmap *regmap;
unsigned int chip_id;
struct regmap_irq_chip_data *irq_data;
struct notifier_block nb;
};
#endif /* MFD_TPS65219_H */

21
include/linux/mfd/twl.h
View File

@ -205,27 +205,6 @@ int twl_get_hfclk_rate(void);
int twl6030_interrupt_unmask(u8 bit_mask, u8 offset);
int twl6030_interrupt_mask(u8 bit_mask, u8 offset);
/* Card detect Configuration for MMC1 Controller on OMAP4 */
#ifdef CONFIG_TWL4030_CORE
int twl6030_mmc_card_detect_config(void);
#else
static inline int twl6030_mmc_card_detect_config(void)
{
pr_debug("twl6030_mmc_card_detect_config not supported\n");
return 0;
}
#endif
/* MMC1 Controller on OMAP4 uses Phoenix irq for Card detect */
#ifdef CONFIG_TWL4030_CORE
int twl6030_mmc_card_detect(struct device *dev, int slot);
#else
static inline int twl6030_mmc_card_detect(struct device *dev, int slot)
{
pr_debug("Call back twl6030_mmc_card_detect not supported\n");
return -EIO;
}
#endif
/*----------------------------------------------------------------------*/
/*

10
include/linux/mfd/wm8350/core.h
View File

@ -8,11 +8,12 @@
#ifndef __LINUX_MFD_WM8350_CORE_H_
#define __LINUX_MFD_WM8350_CORE_H_
#include <linux/kernel.h>
#include <linux/mutex.h>
#include <linux/interrupt.h>
#include <linux/completion.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
#include <linux/types.h>
#include <linux/mfd/wm8350/audio.h>
#include <linux/mfd/wm8350/gpio.h>
@ -21,6 +22,9 @@
#include <linux/mfd/wm8350/supply.h>
#include <linux/mfd/wm8350/wdt.h>
struct device;
struct platform_device;
/*
* Register values.
*/