arm64: drop binutils version checks
Now that gcc-8 and binutils-2.30 are the minimum versions, a lot of the individual feature checks can go away for simplification. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>pull/1253/head
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@ -642,9 +642,6 @@ config ARM64_ERRATUM_843419
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If unsure, say Y.
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config ARM64_LD_HAS_FIX_ERRATUM_843419
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def_bool $(ld-option,--fix-cortex-a53-843419)
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config ARM64_ERRATUM_1024718
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bool "Cortex-A55: 1024718: Update of DBM/AP bits without break before make might result in incorrect update"
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default y
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@ -1890,13 +1887,9 @@ config ARM64_PAN
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The feature is detected at runtime, and will remain as a 'nop'
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instruction if the cpu does not implement the feature.
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config AS_HAS_LSE_ATOMICS
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def_bool $(as-instr,.arch_extension lse)
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config ARM64_LSE_ATOMICS
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bool
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default ARM64_USE_LSE_ATOMICS
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depends on AS_HAS_LSE_ATOMICS
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config ARM64_USE_LSE_ATOMICS
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bool "Atomic instructions"
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@ -1908,20 +1901,12 @@ config ARM64_USE_LSE_ATOMICS
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Say Y here to make use of these instructions for the in-kernel
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atomic routines. This incurs a small overhead on CPUs that do
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not support these instructions and requires the kernel to be
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built with binutils >= 2.25 in order for the new instructions
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to be used.
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not support these instructions.
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endmenu # "ARMv8.1 architectural features"
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menu "ARMv8.2 architectural features"
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config AS_HAS_ARMV8_2
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def_bool $(cc-option,-Wa$(comma)-march=armv8.2-a)
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config AS_HAS_SHA3
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def_bool $(as-instr,.arch armv8.2-a+sha3)
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config ARM64_PMEM
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bool "Enable support for persistent memory"
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select ARCH_HAS_PMEM_API
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@ -1995,7 +1980,6 @@ config ARM64_PTR_AUTH_KERNEL
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bool "Use pointer authentication for kernel"
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default y
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depends on ARM64_PTR_AUTH
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depends on (CC_HAS_SIGN_RETURN_ADDRESS || CC_HAS_BRANCH_PROT_PAC_RET) && AS_HAS_ARMV8_3
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# Modern compilers insert a .note.gnu.property section note for PAC
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# which is only understood by binutils starting with version 2.33.1.
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depends on LD_IS_LLD || LD_VERSION >= 23301 || (CC_IS_GCC && GCC_VERSION < 90100)
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@ -2016,19 +2000,10 @@ config CC_HAS_BRANCH_PROT_PAC_RET
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# GCC 9 or later, clang 8 or later
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def_bool $(cc-option,-mbranch-protection=pac-ret+leaf)
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config CC_HAS_SIGN_RETURN_ADDRESS
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# GCC 7, 8
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def_bool $(cc-option,-msign-return-address=all)
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config AS_HAS_ARMV8_3
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def_bool $(cc-option,-Wa$(comma)-march=armv8.3-a)
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config AS_HAS_CFI_NEGATE_RA_STATE
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# binutils 2.34+
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def_bool $(as-instr,.cfi_startproc\n.cfi_negate_ra_state\n.cfi_endproc\n)
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config AS_HAS_LDAPR
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def_bool $(as-instr,.arch_extension rcpc)
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endmenu # "ARMv8.3 architectural features"
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menu "ARMv8.4 architectural features"
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@ -2056,20 +2031,13 @@ config ARM64_AMU_EXTN
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correctly reflect reality. Most commonly, the value read will be 0,
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indicating that the counter is not enabled.
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config AS_HAS_ARMV8_4
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def_bool $(cc-option,-Wa$(comma)-march=armv8.4-a)
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config ARM64_TLB_RANGE
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bool "Enable support for tlbi range feature"
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default y
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depends on AS_HAS_ARMV8_4
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help
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ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a
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range of input addresses.
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The feature introduces new assembly instructions, and they were
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support when binutils >= 2.30.
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endmenu # "ARMv8.4 architectural features"
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menu "ARMv8.5 architectural features"
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@ -2145,7 +2113,6 @@ config ARM64_MTE
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default y
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depends on ARM64_AS_HAS_MTE && ARM64_TAGGED_ADDR_ABI
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depends on AS_HAS_ARMV8_5
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depends on AS_HAS_LSE_ATOMICS
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# Required for tag checking in the uaccess routines
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select ARM64_PAN
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select ARCH_HAS_SUBPAGE_FAULTS
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@ -16,14 +16,11 @@ ifeq ($(CONFIG_RELOCATABLE), y)
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# Pass --no-apply-dynamic-relocs to restore pre-binutils-2.27 behaviour
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# for relative relocs, since this leads to better Image compression
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# with the relocation offsets always being zero.
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LDFLAGS_vmlinux += -shared -Bsymbolic -z notext \
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$(call ld-option, --no-apply-dynamic-relocs)
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LDFLAGS_vmlinux += -shared -Bsymbolic -z notext --no-apply-dynamic-relocs
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endif
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ifeq ($(CONFIG_ARM64_ERRATUM_843419),y)
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ifeq ($(CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419),y)
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LDFLAGS_vmlinux += --fix-cortex-a53-843419
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endif
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endif
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cc_has_k_constraint := $(call try-run,echo \
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@ -105,12 +102,8 @@ endif
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# hardware.
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ifeq ($(CONFIG_AS_HAS_ARMV8_5), y)
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asm-arch := armv8.5-a
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else ifeq ($(CONFIG_AS_HAS_ARMV8_4), y)
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else
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asm-arch := armv8.4-a
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else ifeq ($(CONFIG_AS_HAS_ARMV8_3), y)
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asm-arch := armv8.3-a
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else ifeq ($(CONFIG_AS_HAS_ARMV8_2), y)
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asm-arch := armv8.2-a
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endif
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ifdef asm-arch
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@ -201,16 +194,6 @@ install zinstall:
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archprepare:
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$(Q)$(MAKE) $(build)=arch/arm64/tools kapi
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ifeq ($(CONFIG_ARM64_ERRATUM_843419),y)
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ifneq ($(CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419),y)
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@echo "warning: ld does not support --fix-cortex-a53-843419; kernel may be susceptible to erratum" >&2
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endif
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endif
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ifeq ($(CONFIG_ARM64_USE_LSE_ATOMICS),y)
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ifneq ($(CONFIG_ARM64_LSE_ATOMICS),y)
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@echo "warning: LSE atomics not supported by binutils" >&2
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endif
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endif
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ifeq ($(KBUILD_EXTMOD),)
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# We need to generate vdso-offsets.h before compiling certain files in kernel/.
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@ -12,16 +12,12 @@
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#ifndef BUILD_VDSO
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#ifdef CONFIG_AS_HAS_LDAPR
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#define __LOAD_RCPC(sfx, regs...) \
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ALTERNATIVE( \
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"ldar" #sfx "\t" #regs, \
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".arch_extension rcpc\n" \
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"ldapr" #sfx "\t" #regs, \
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ARM64_HAS_LDAPR)
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#else
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#define __LOAD_RCPC(sfx, regs...) "ldar" #sfx "\t" #regs
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#endif /* CONFIG_AS_HAS_LDAPR */
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/*
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* When building with LTO, there is an increased risk of the compiler
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@ -19,7 +19,6 @@ if VIRTUALIZATION
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menuconfig KVM
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bool "Kernel-based Virtual Machine (KVM) support"
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depends on AS_HAS_ARMV8_4
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select KVM_COMMON
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select KVM_GENERIC_HARDWARE_ENABLING
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select KVM_GENERIC_MMU_NOTIFIER
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@ -319,7 +319,7 @@ static void xor_arm64_eor3_5(unsigned long bytes,
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static int __init xor_neon_init(void)
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{
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if (IS_ENABLED(CONFIG_AS_HAS_SHA3) && cpu_have_named_feature(SHA3)) {
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if (cpu_have_named_feature(SHA3)) {
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xor_block_inner_neon.do_3 = xor_arm64_eor3_3;
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xor_block_inner_neon.do_4 = xor_arm64_eor3_4;
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xor_block_inner_neon.do_5 = xor_arm64_eor3_5;
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