A set of cleanups for the generic interrupt subsystem:
- Consolidate on one set of functions for the interrupt domain code to
get rid of pointlessly duplicated code with only marginal different
semantics.
- Update the documentation accordingly and consolidate the coding style
of the irqdomain header.
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Merge tag 'irq-cleanups-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq cleanups from Thomas Gleixner:
"A set of cleanups for the generic interrupt subsystem:
- Consolidate on one set of functions for the interrupt domain code
to get rid of pointlessly duplicated code with only marginal
different semantics.
- Update the documentation accordingly and consolidate the coding
style of the irqdomain header"
* tag 'irq-cleanups-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (46 commits)
irqdomain: Consolidate coding style
irqdomain: Fix kernel-doc and add it to Documentation
Documentation: irqdomain: Update it
Documentation: irq-domain.rst: Simple improvements
Documentation: irq/concepts: Minor improvements
Documentation: irq/concepts: Add commas and reflow
irqdomain: Improve kernel-docs of functions
irqdomain: Make struct irq_domain_info variables const
irqdomain: Use irq_domain_instantiate()'s return value as initializers
irqdomain: Drop irq_linear_revmap()
pinctrl: keembay: Switch to irq_find_mapping()
irqchip/armada-370-xp: Switch to irq_find_mapping()
gpu: ipu-v3: Switch to irq_find_mapping()
gpio: idt3243x: Switch to irq_find_mapping()
sh: Switch to irq_find_mapping()
powerpc: Switch to irq_find_mapping()
irqdomain: Drop irq_domain_add_*() functions
powerpc: Switch irq_domain_add_nomap() to use fwnode
thermal: Switch to irq_domain_create_linear()
soc: Switch to irq_domain_create_*()
...
pull/1250/head
commit
2bd1bea5fa
|
|
@ -410,8 +410,6 @@ which are used in the generic IRQ layer.
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.. kernel-doc:: include/linux/interrupt.h
|
.. kernel-doc:: include/linux/interrupt.h
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:internal:
|
:internal:
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|
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.. kernel-doc:: include/linux/irqdomain.h
|
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|
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Public Functions Provided
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Public Functions Provided
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=========================
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=========================
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@ -2,21 +2,22 @@
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What is an IRQ?
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What is an IRQ?
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===============
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===============
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|
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An IRQ is an interrupt request from a device.
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An IRQ is an interrupt request from a device. Currently, they can come
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Currently they can come in over a pin, or over a packet.
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in over a pin, or over a packet. Several devices may be connected to
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Several devices may be connected to the same pin thus
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the same pin thus sharing an IRQ. Such as on legacy PCI bus: All devices
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sharing an IRQ.
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typically share 4 lanes/pins. Note that each device can request an
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interrupt on each of the lanes.
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An IRQ number is a kernel identifier used to talk about a hardware
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An IRQ number is a kernel identifier used to talk about a hardware
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interrupt source. Typically this is an index into the global irq_desc
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interrupt source. Typically, this is an index into the global irq_desc
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array, but except for what linux/interrupt.h implements the details
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array or sparse_irqs tree. But except for what linux/interrupt.h
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are architecture specific.
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implements, the details are architecture specific.
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An IRQ number is an enumeration of the possible interrupt sources on a
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An IRQ number is an enumeration of the possible interrupt sources on a
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machine. Typically what is enumerated is the number of input pins on
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machine. Typically, what is enumerated is the number of input pins on
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all of the interrupt controller in the system. In the case of ISA
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all of the interrupt controllers in the system. In the case of ISA,
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what is enumerated are the 16 input pins on the two i8259 interrupt
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what is enumerated are the 8 input pins on each of the two i8259
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controllers.
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interrupt controllers.
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Architectures can assign additional meaning to the IRQ numbers, and
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Architectures can assign additional meaning to the IRQ numbers, and
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are encouraged to in the case where there is any manual configuration
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are encouraged to in the case where there is any manual configuration
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@ -1,59 +1,77 @@
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===============================================
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===============================================
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The irq_domain interrupt number mapping library
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The irq_domain Interrupt Number Mapping Library
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===============================================
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===============================================
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The current design of the Linux kernel uses a single large number
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The current design of the Linux kernel uses a single large number
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space where each separate IRQ source is assigned a different number.
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space where each separate IRQ source is assigned a unique number.
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This is simple when there is only one interrupt controller, but in
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This is simple when there is only one interrupt controller. But in
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systems with multiple interrupt controllers the kernel must ensure
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systems with multiple interrupt controllers, the kernel must ensure
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that each one gets assigned non-overlapping allocations of Linux
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that each one gets assigned non-overlapping allocations of Linux
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IRQ numbers.
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IRQ numbers.
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The number of interrupt controllers registered as unique irqchips
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The number of interrupt controllers registered as unique irqchips
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show a rising tendency: for example subdrivers of different kinds
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shows a rising tendency. For example, subdrivers of different kinds
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such as GPIO controllers avoid reimplementing identical callback
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such as GPIO controllers avoid reimplementing identical callback
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mechanisms as the IRQ core system by modelling their interrupt
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mechanisms as the IRQ core system by modelling their interrupt
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handlers as irqchips, i.e. in effect cascading interrupt controllers.
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handlers as irqchips. I.e. in effect cascading interrupt controllers.
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Here the interrupt number loose all kind of correspondence to
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So in the past, IRQ numbers could be chosen so that they match the
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hardware interrupt numbers: whereas in the past, IRQ numbers could
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hardware IRQ line into the root interrupt controller (i.e. the
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be chosen so they matched the hardware IRQ line into the root
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component actually firing the interrupt line to the CPU). Nowadays,
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interrupt controller (i.e. the component actually fireing the
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this number is just a number and the number loose all kind of
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interrupt line to the CPU) nowadays this number is just a number.
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correspondence to hardware interrupt numbers.
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For this reason we need a mechanism to separate controller-local
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For this reason, we need a mechanism to separate controller-local
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interrupt numbers, called hardware irq's, from Linux IRQ numbers.
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interrupt numbers, called hardware IRQs, from Linux IRQ numbers.
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The irq_alloc_desc*() and irq_free_desc*() APIs provide allocation of
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The irq_alloc_desc*() and irq_free_desc*() APIs provide allocation of
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irq numbers, but they don't provide any support for reverse mapping of
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IRQ numbers, but they don't provide any support for reverse mapping of
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the controller-local IRQ (hwirq) number into the Linux IRQ number
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the controller-local IRQ (hwirq) number into the Linux IRQ number
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space.
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space.
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The irq_domain library adds mapping between hwirq and IRQ numbers on
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The irq_domain library adds a mapping between hwirq and IRQ numbers on
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top of the irq_alloc_desc*() API. An irq_domain to manage mapping is
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top of the irq_alloc_desc*() API. An irq_domain to manage the mapping
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preferred over interrupt controller drivers open coding their own
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is preferred over interrupt controller drivers open coding their own
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reverse mapping scheme.
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reverse mapping scheme.
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irq_domain also implements translation from an abstract irq_fwspec
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irq_domain also implements a translation from an abstract struct
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structure to hwirq numbers (Device Tree and ACPI GSI so far), and can
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irq_fwspec to hwirq numbers (Device Tree, non-DT firmware node, ACPI
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be easily extended to support other IRQ topology data sources.
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GSI, and software node so far), and can be easily extended to support
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other IRQ topology data sources. The implementation is performed
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without any extra platform support code.
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irq_domain usage
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irq_domain Usage
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================
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================
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struct irq_domain could be defined as an irq domain controller. That
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is, it handles the mapping between hardware and virtual interrupt
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numbers for a given interrupt domain. The domain structure is
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|
generally created by the PIC code for a given PIC instance (though a
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|
domain can cover more than one PIC if they have a flat number model).
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It is the domain callbacks that are responsible for setting the
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irq_chip on a given irq_desc after it has been mapped.
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An interrupt controller driver creates and registers an irq_domain by
|
The host code and data structures use a fwnode_handle pointer to
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calling one of the irq_domain_add_*() or irq_domain_create_*() functions
|
identify the domain. In some cases, and in order to preserve source
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(each mapping method has a different allocator function, more on that later).
|
code compatibility, this fwnode pointer is "upgraded" to a DT
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The function will return a pointer to the irq_domain on success. The caller
|
device_node. For those firmware infrastructures that do not provide a
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must provide the allocator function with an irq_domain_ops structure.
|
unique identifier for an interrupt controller, the irq_domain code
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|
offers a fwnode allocator.
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|
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An interrupt controller driver creates and registers a struct irq_domain
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|
by calling one of the irq_domain_create_*() functions (each mapping
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|
method has a different allocator function, more on that later). The
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|
function will return a pointer to the struct irq_domain on success. The
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|
caller must provide the allocator function with a struct irq_domain_ops
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|
pointer.
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|
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In most cases, the irq_domain will begin empty without any mappings
|
In most cases, the irq_domain will begin empty without any mappings
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between hwirq and IRQ numbers. Mappings are added to the irq_domain
|
between hwirq and IRQ numbers. Mappings are added to the irq_domain
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by calling irq_create_mapping() which accepts the irq_domain and a
|
by calling irq_create_mapping() which accepts the irq_domain and a
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hwirq number as arguments. If a mapping for the hwirq doesn't already
|
hwirq number as arguments. If a mapping for the hwirq doesn't already
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exist then it will allocate a new Linux irq_desc, associate it with
|
exist, irq_create_mapping() allocates a new Linux irq_desc, associates
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the hwirq, and call the .map() callback so the driver can perform any
|
it with the hwirq, and calls the :c:member:`irq_domain_ops.map()`
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required hardware setup.
|
callback. In there, the driver can perform any required hardware
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|
setup.
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|
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Once a mapping has been established, it can be retrieved or used via a
|
Once a mapping has been established, it can be retrieved or used via a
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variety of methods:
|
variety of methods:
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@ -63,8 +81,6 @@ variety of methods:
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mapping.
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mapping.
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- irq_find_mapping() returns a Linux IRQ number for a given domain and
|
- irq_find_mapping() returns a Linux IRQ number for a given domain and
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hwirq number, and 0 if there was no mapping
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hwirq number, and 0 if there was no mapping
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- irq_linear_revmap() is now identical to irq_find_mapping(), and is
|
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deprecated
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- generic_handle_domain_irq() handles an interrupt described by a
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- generic_handle_domain_irq() handles an interrupt described by a
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domain and a hwirq number
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domain and a hwirq number
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@ -77,9 +93,10 @@ be allocated.
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If the driver has the Linux IRQ number or the irq_data pointer, and
|
If the driver has the Linux IRQ number or the irq_data pointer, and
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needs to know the associated hwirq number (such as in the irq_chip
|
needs to know the associated hwirq number (such as in the irq_chip
|
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callbacks) then it can be directly obtained from irq_data->hwirq.
|
callbacks) then it can be directly obtained from
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|
:c:member:`irq_data.hwirq`.
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|
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Types of irq_domain mappings
|
Types of irq_domain Mappings
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============================
|
============================
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|
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There are several mechanisms available for reverse mapping from hwirq
|
There are several mechanisms available for reverse mapping from hwirq
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@ -92,7 +109,6 @@ Linear
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|
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::
|
::
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|
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irq_domain_add_linear()
|
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irq_domain_create_linear()
|
irq_domain_create_linear()
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|
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The linear reverse map maintains a fixed size table indexed by the
|
The linear reverse map maintains a fixed size table indexed by the
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|
@ -105,19 +121,13 @@ map are fixed time lookup for IRQ numbers, and irq_descs are only
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allocated for in-use IRQs. The disadvantage is that the table must be
|
allocated for in-use IRQs. The disadvantage is that the table must be
|
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as large as the largest possible hwirq number.
|
as large as the largest possible hwirq number.
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|
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irq_domain_add_linear() and irq_domain_create_linear() are functionally
|
The majority of drivers should use the Linear map.
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equivalent, except for the first argument is different - the former
|
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accepts an Open Firmware specific 'struct device_node', while the latter
|
|
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accepts a more general abstraction 'struct fwnode_handle'.
|
|
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|
|
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The majority of drivers should use the linear map.
|
|
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|
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Tree
|
Tree
|
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----
|
----
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|
|
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::
|
::
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|
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irq_domain_add_tree()
|
|
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irq_domain_create_tree()
|
irq_domain_create_tree()
|
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|
|
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The irq_domain maintains a radix tree map from hwirq numbers to Linux
|
The irq_domain maintains a radix tree map from hwirq numbers to Linux
|
||||||
|
|
@ -129,11 +139,6 @@ since it doesn't need to allocate a table as large as the largest
|
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hwirq number. The disadvantage is that hwirq to IRQ number lookup is
|
hwirq number. The disadvantage is that hwirq to IRQ number lookup is
|
||||||
dependent on how many entries are in the table.
|
dependent on how many entries are in the table.
|
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|
|
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irq_domain_add_tree() and irq_domain_create_tree() are functionally
|
|
||||||
equivalent, except for the first argument is different - the former
|
|
||||||
accepts an Open Firmware specific 'struct device_node', while the latter
|
|
||||||
accepts a more general abstraction 'struct fwnode_handle'.
|
|
||||||
|
|
||||||
Very few drivers should need this mapping.
|
Very few drivers should need this mapping.
|
||||||
|
|
||||||
No Map
|
No Map
|
||||||
|
|
@ -141,7 +146,7 @@ No Map
|
||||||
|
|
||||||
::
|
::
|
||||||
|
|
||||||
irq_domain_add_nomap()
|
irq_domain_create_nomap()
|
||||||
|
|
||||||
The No Map mapping is to be used when the hwirq number is
|
The No Map mapping is to be used when the hwirq number is
|
||||||
programmable in the hardware. In this case it is best to program the
|
programmable in the hardware. In this case it is best to program the
|
||||||
|
|
@ -159,8 +164,6 @@ Legacy
|
||||||
|
|
||||||
::
|
::
|
||||||
|
|
||||||
irq_domain_add_simple()
|
|
||||||
irq_domain_add_legacy()
|
|
||||||
irq_domain_create_simple()
|
irq_domain_create_simple()
|
||||||
irq_domain_create_legacy()
|
irq_domain_create_legacy()
|
||||||
|
|
||||||
|
|
@ -189,13 +192,13 @@ supported. For example, ISA controllers would use the legacy map for
|
||||||
mapping Linux IRQs 0-15 so that existing ISA drivers get the correct IRQ
|
mapping Linux IRQs 0-15 so that existing ISA drivers get the correct IRQ
|
||||||
numbers.
|
numbers.
|
||||||
|
|
||||||
Most users of legacy mappings should use irq_domain_add_simple() or
|
Most users of legacy mappings should use irq_domain_create_simple()
|
||||||
irq_domain_create_simple() which will use a legacy domain only if an IRQ range
|
which will use a legacy domain only if an IRQ range is supplied by the
|
||||||
is supplied by the system and will otherwise use a linear domain mapping.
|
system and will otherwise use a linear domain mapping. The semantics of
|
||||||
The semantics of this call are such that if an IRQ range is specified then
|
this call are such that if an IRQ range is specified then descriptors
|
||||||
descriptors will be allocated on-the-fly for it, and if no range is
|
will be allocated on-the-fly for it, and if no range is specified it
|
||||||
specified it will fall through to irq_domain_add_linear() or
|
will fall through to irq_domain_create_linear() which means *no* irq
|
||||||
irq_domain_create_linear() which means *no* irq descriptors will be allocated.
|
descriptors will be allocated.
|
||||||
|
|
||||||
A typical use case for simple domains is where an irqchip provider
|
A typical use case for simple domains is where an irqchip provider
|
||||||
is supporting both dynamic and static IRQ assignments.
|
is supporting both dynamic and static IRQ assignments.
|
||||||
|
|
@ -206,13 +209,7 @@ that the driver using the simple domain call irq_create_mapping()
|
||||||
before any irq_find_mapping() since the latter will actually work
|
before any irq_find_mapping() since the latter will actually work
|
||||||
for the static IRQ assignment case.
|
for the static IRQ assignment case.
|
||||||
|
|
||||||
irq_domain_add_simple() and irq_domain_create_simple() as well as
|
Hierarchy IRQ Domain
|
||||||
irq_domain_add_legacy() and irq_domain_create_legacy() are functionally
|
|
||||||
equivalent, except for the first argument is different - the former
|
|
||||||
accepts an Open Firmware specific 'struct device_node', while the latter
|
|
||||||
accepts a more general abstraction 'struct fwnode_handle'.
|
|
||||||
|
|
||||||
Hierarchy IRQ domain
|
|
||||||
--------------------
|
--------------------
|
||||||
|
|
||||||
On some architectures, there may be multiple interrupt controllers
|
On some architectures, there may be multiple interrupt controllers
|
||||||
|
|
@ -253,20 +250,40 @@ There are four major interfaces to use hierarchy irq_domain:
|
||||||
4) irq_domain_deactivate_irq(): deactivate interrupt controller hardware
|
4) irq_domain_deactivate_irq(): deactivate interrupt controller hardware
|
||||||
to stop delivering the interrupt.
|
to stop delivering the interrupt.
|
||||||
|
|
||||||
Following changes are needed to support hierarchy irq_domain:
|
The following is needed to support hierarchy irq_domain:
|
||||||
|
|
||||||
1) a new field 'parent' is added to struct irq_domain; it's used to
|
1) The :c:member:`parent` field in struct irq_domain is used to
|
||||||
maintain irq_domain hierarchy information.
|
maintain irq_domain hierarchy information.
|
||||||
2) a new field 'parent_data' is added to struct irq_data; it's used to
|
2) The :c:member:`parent_data` field in struct irq_data is used to
|
||||||
build hierarchy irq_data to match hierarchy irq_domains. The irq_data
|
build hierarchy irq_data to match hierarchy irq_domains. The
|
||||||
is used to store irq_domain pointer and hardware irq number.
|
irq_data is used to store irq_domain pointer and hardware irq
|
||||||
3) new callbacks are added to struct irq_domain_ops to support hierarchy
|
number.
|
||||||
irq_domain operations.
|
3) The :c:member:`alloc()`, :c:member:`free()`, and other callbacks in
|
||||||
|
struct irq_domain_ops to support hierarchy irq_domain operations.
|
||||||
|
|
||||||
With support of hierarchy irq_domain and hierarchy irq_data ready, an
|
With the support of hierarchy irq_domain and hierarchy irq_data ready,
|
||||||
irq_domain structure is built for each interrupt controller, and an
|
an irq_domain structure is built for each interrupt controller, and an
|
||||||
irq_data structure is allocated for each irq_domain associated with an
|
irq_data structure is allocated for each irq_domain associated with an
|
||||||
IRQ. Now we could go one step further to support stacked(hierarchy)
|
IRQ.
|
||||||
|
|
||||||
|
For an interrupt controller driver to support hierarchy irq_domain, it
|
||||||
|
needs to:
|
||||||
|
|
||||||
|
1) Implement irq_domain_ops.alloc() and irq_domain_ops.free()
|
||||||
|
2) Optionally, implement irq_domain_ops.activate() and
|
||||||
|
irq_domain_ops.deactivate().
|
||||||
|
3) Optionally, implement an irq_chip to manage the interrupt controller
|
||||||
|
hardware.
|
||||||
|
4) There is no need to implement irq_domain_ops.map() and
|
||||||
|
irq_domain_ops.unmap(). They are unused with hierarchy irq_domain.
|
||||||
|
|
||||||
|
Note the hierarchy irq_domain is in no way x86-specific, and is
|
||||||
|
heavily used to support other architectures, such as ARM, ARM64 etc.
|
||||||
|
|
||||||
|
Stacked irq_chip
|
||||||
|
~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
Now, we could go one step further to support stacked (hierarchy)
|
||||||
irq_chip. That is, an irq_chip is associated with each irq_data along
|
irq_chip. That is, an irq_chip is associated with each irq_data along
|
||||||
the hierarchy. A child irq_chip may implement a required action by
|
the hierarchy. A child irq_chip may implement a required action by
|
||||||
itself or by cooperating with its parent irq_chip.
|
itself or by cooperating with its parent irq_chip.
|
||||||
|
|
@ -276,22 +293,28 @@ with the hardware managed by itself and may ask for services from its
|
||||||
parent irq_chip when needed. So we could achieve a much cleaner
|
parent irq_chip when needed. So we could achieve a much cleaner
|
||||||
software architecture.
|
software architecture.
|
||||||
|
|
||||||
For an interrupt controller driver to support hierarchy irq_domain, it
|
|
||||||
needs to:
|
|
||||||
|
|
||||||
1) Implement irq_domain_ops.alloc and irq_domain_ops.free
|
|
||||||
2) Optionally implement irq_domain_ops.activate and
|
|
||||||
irq_domain_ops.deactivate.
|
|
||||||
3) Optionally implement an irq_chip to manage the interrupt controller
|
|
||||||
hardware.
|
|
||||||
4) No need to implement irq_domain_ops.map and irq_domain_ops.unmap,
|
|
||||||
they are unused with hierarchy irq_domain.
|
|
||||||
|
|
||||||
Hierarchy irq_domain is in no way x86 specific, and is heavily used to
|
|
||||||
support other architectures, such as ARM, ARM64 etc.
|
|
||||||
|
|
||||||
Debugging
|
Debugging
|
||||||
=========
|
=========
|
||||||
|
|
||||||
Most of the internals of the IRQ subsystem are exposed in debugfs by
|
Most of the internals of the IRQ subsystem are exposed in debugfs by
|
||||||
turning CONFIG_GENERIC_IRQ_DEBUGFS on.
|
turning CONFIG_GENERIC_IRQ_DEBUGFS on.
|
||||||
|
|
||||||
|
Structures and Public Functions Provided
|
||||||
|
========================================
|
||||||
|
|
||||||
|
This chapter contains the autogenerated documentation of the structures
|
||||||
|
and exported kernel API functions which are used for IRQ domains.
|
||||||
|
|
||||||
|
.. kernel-doc:: include/linux/irqdomain.h
|
||||||
|
|
||||||
|
.. kernel-doc:: kernel/irq/irqdomain.c
|
||||||
|
:export:
|
||||||
|
|
||||||
|
Internal Functions Provided
|
||||||
|
===========================
|
||||||
|
|
||||||
|
This chapter contains the autogenerated documentation of the internal
|
||||||
|
functions.
|
||||||
|
|
||||||
|
.. kernel-doc:: kernel/irq/irqdomain.c
|
||||||
|
:internal:
|
||||||
|
|
|
||||||
|
|
@ -60,8 +60,6 @@ irq_domain和一个hwirq号作为参数。 如果hwirq的映射还不存在,
|
||||||
|
|
||||||
- irq_find_mapping()返回给定域和hwirq的Linux IRQ号,如果没有映射则返回0。
|
- irq_find_mapping()返回给定域和hwirq的Linux IRQ号,如果没有映射则返回0。
|
||||||
|
|
||||||
- irq_linear_revmap()现与irq_find_mapping()相同,已被废弃。
|
|
||||||
|
|
||||||
- generic_handle_domain_irq()处理一个由域和hwirq号描述的中断。
|
- generic_handle_domain_irq()处理一个由域和hwirq号描述的中断。
|
||||||
|
|
||||||
请注意,irq域的查找必须发生在与RCU读临界区兼容的上下文中。
|
请注意,irq域的查找必须发生在与RCU读临界区兼容的上下文中。
|
||||||
|
|
@ -83,7 +81,6 @@ irq_domain映射的类型
|
||||||
|
|
||||||
::
|
::
|
||||||
|
|
||||||
irq_domain_add_linear()
|
|
||||||
irq_domain_create_linear()
|
irq_domain_create_linear()
|
||||||
|
|
||||||
线性反向映射维护了一个固定大小的表,该表以hwirq号为索引。 当一个hwirq被映射
|
线性反向映射维护了一个固定大小的表,该表以hwirq号为索引。 当一个hwirq被映射
|
||||||
|
|
@ -104,7 +101,6 @@ irq_domain_add_linear()和irq_domain_create_linear()在功能上是等价的,
|
||||||
|
|
||||||
::
|
::
|
||||||
|
|
||||||
irq_domain_add_tree()
|
|
||||||
irq_domain_create_tree()
|
irq_domain_create_tree()
|
||||||
|
|
||||||
irq_domain维护着从hwirq号到Linux IRQ的radix的树状映射。 当一个hwirq被映射时,
|
irq_domain维护着从hwirq号到Linux IRQ的radix的树状映射。 当一个hwirq被映射时,
|
||||||
|
|
@ -124,7 +120,7 @@ irq_domain_add_tree()和irq_domain_create_tree()在功能上是等价的,除
|
||||||
|
|
||||||
::
|
::
|
||||||
|
|
||||||
irq_domain_add_nomap()
|
irq_domain_create_nomap()
|
||||||
|
|
||||||
当硬件中的hwirq号是可编程的时候,就可以采用无映射类型。 在这种情况下,最好将
|
当硬件中的hwirq号是可编程的时候,就可以采用无映射类型。 在这种情况下,最好将
|
||||||
Linux IRQ号编入硬件本身,这样就不需要映射了。 调用irq_create_direct_mapping()
|
Linux IRQ号编入硬件本身,这样就不需要映射了。 调用irq_create_direct_mapping()
|
||||||
|
|
@ -138,8 +134,6 @@ Linux IRQ号编入硬件本身,这样就不需要映射了。 调用irq_create
|
||||||
|
|
||||||
::
|
::
|
||||||
|
|
||||||
irq_domain_add_simple()
|
|
||||||
irq_domain_add_legacy()
|
|
||||||
irq_domain_create_simple()
|
irq_domain_create_simple()
|
||||||
irq_domain_create_legacy()
|
irq_domain_create_legacy()
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -170,7 +170,7 @@ init_onchip_IRQ(struct device_node *intc, struct device_node *parent)
|
||||||
if (parent)
|
if (parent)
|
||||||
panic("DeviceTree incore intc not a root irq controller\n");
|
panic("DeviceTree incore intc not a root irq controller\n");
|
||||||
|
|
||||||
root_domain = irq_domain_add_linear(intc, nr_cpu_irqs, &arcv2_irq_ops, NULL);
|
root_domain = irq_domain_create_linear(of_fwnode_handle(intc), nr_cpu_irqs, &arcv2_irq_ops, NULL);
|
||||||
if (!root_domain)
|
if (!root_domain)
|
||||||
panic("root irq domain not avail\n");
|
panic("root irq domain not avail\n");
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -112,7 +112,8 @@ init_onchip_IRQ(struct device_node *intc, struct device_node *parent)
|
||||||
if (parent)
|
if (parent)
|
||||||
panic("DeviceTree incore intc not a root irq controller\n");
|
panic("DeviceTree incore intc not a root irq controller\n");
|
||||||
|
|
||||||
root_domain = irq_domain_add_linear(intc, NR_CPU_IRQS,
|
root_domain = irq_domain_create_linear(of_fwnode_handle(intc),
|
||||||
|
NR_CPU_IRQS,
|
||||||
&arc_intc_domain_ops, NULL);
|
&arc_intc_domain_ops, NULL);
|
||||||
if (!root_domain)
|
if (!root_domain)
|
||||||
panic("root irq domain not avail\n");
|
panic("root irq domain not avail\n");
|
||||||
|
|
|
||||||
|
|
@ -391,7 +391,8 @@ idu_of_init(struct device_node *intc, struct device_node *parent)
|
||||||
|
|
||||||
pr_info("MCIP: IDU supports %u common irqs\n", nr_irqs);
|
pr_info("MCIP: IDU supports %u common irqs\n", nr_irqs);
|
||||||
|
|
||||||
domain = irq_domain_add_linear(intc, nr_irqs, &idu_irq_ops, NULL);
|
domain = irq_domain_create_linear(of_fwnode_handle(intc), nr_irqs,
|
||||||
|
&idu_irq_ops, NULL);
|
||||||
|
|
||||||
/* Parent interrupts (core-intc) are already mapped */
|
/* Parent interrupts (core-intc) are already mapped */
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -416,7 +416,7 @@ static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
|
||||||
writel_relaxed(~0, irqbase + SA1111_INTSTATCLR0);
|
writel_relaxed(~0, irqbase + SA1111_INTSTATCLR0);
|
||||||
writel_relaxed(~0, irqbase + SA1111_INTSTATCLR1);
|
writel_relaxed(~0, irqbase + SA1111_INTSTATCLR1);
|
||||||
|
|
||||||
sachip->irqdomain = irq_domain_add_linear(NULL, SA1111_IRQ_NR,
|
sachip->irqdomain = irq_domain_create_linear(NULL, SA1111_IRQ_NR,
|
||||||
&sa1111_irqdomain_ops,
|
&sa1111_irqdomain_ops,
|
||||||
sachip);
|
sachip);
|
||||||
if (!sachip->irqdomain) {
|
if (!sachip->irqdomain) {
|
||||||
|
|
|
||||||
|
|
@ -209,9 +209,8 @@ static int __init exynos_pmu_irq_init(struct device_node *node,
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0, 0,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, 0, of_fwnode_handle(node),
|
||||||
node, &exynos_pmu_domain_ops,
|
&exynos_pmu_domain_ops, NULL);
|
||||||
NULL);
|
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
iounmap(pmu_base_addr);
|
iounmap(pmu_base_addr);
|
||||||
pmu_base_addr = NULL;
|
pmu_base_addr = NULL;
|
||||||
|
|
|
||||||
|
|
@ -201,7 +201,7 @@ static void __init mxc_init_irq(void __iomem *irqbase)
|
||||||
WARN_ON(irq_base < 0);
|
WARN_ON(irq_base < 0);
|
||||||
|
|
||||||
np = of_find_compatible_node(NULL, NULL, "fsl,avic");
|
np = of_find_compatible_node(NULL, NULL, "fsl,avic");
|
||||||
domain = irq_domain_add_legacy(np, AVIC_NUM_IRQS, irq_base, 0,
|
domain = irq_domain_create_legacy(of_fwnode_handle(np), AVIC_NUM_IRQS, irq_base, 0,
|
||||||
&irq_domain_simple_ops, NULL);
|
&irq_domain_simple_ops, NULL);
|
||||||
WARN_ON(!domain);
|
WARN_ON(!domain);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -245,9 +245,8 @@ static int __init imx_gpc_init(struct device_node *node,
|
||||||
if (WARN_ON(!gpc_base))
|
if (WARN_ON(!gpc_base))
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0, GPC_MAX_IRQS,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, GPC_MAX_IRQS, of_fwnode_handle(node),
|
||||||
node, &imx_gpc_domain_ops,
|
&imx_gpc_domain_ops, NULL);
|
||||||
NULL);
|
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
iounmap(gpc_base);
|
iounmap(gpc_base);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -175,7 +175,7 @@ static int __init tzic_init_dt(struct device_node *np, struct device_node *p)
|
||||||
irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id());
|
irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id());
|
||||||
WARN_ON(irq_base < 0);
|
WARN_ON(irq_base < 0);
|
||||||
|
|
||||||
domain = irq_domain_add_legacy(np, TZIC_NUM_IRQS, irq_base, 0,
|
domain = irq_domain_create_legacy(of_fwnode_handle(np), TZIC_NUM_IRQS, irq_base, 0,
|
||||||
&irq_domain_simple_ops, NULL);
|
&irq_domain_simple_ops, NULL);
|
||||||
WARN_ON(!domain);
|
WARN_ON(!domain);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -220,8 +220,7 @@ void __init omap1_init_irq(void)
|
||||||
omap_l2_irq = irq_base;
|
omap_l2_irq = irq_base;
|
||||||
omap_l2_irq -= NR_IRQS_LEGACY;
|
omap_l2_irq -= NR_IRQS_LEGACY;
|
||||||
|
|
||||||
domain = irq_domain_add_legacy(NULL, nr_irqs, irq_base, 0,
|
domain = irq_domain_create_legacy(NULL, nr_irqs, irq_base, 0, &irq_domain_simple_ops, NULL);
|
||||||
&irq_domain_simple_ops, NULL);
|
|
||||||
|
|
||||||
pr_info("Total of %lu interrupts in %i interrupt banks\n",
|
pr_info("Total of %lu interrupts in %i interrupt banks\n",
|
||||||
nr_irqs, irq_bank_count);
|
nr_irqs, irq_bank_count);
|
||||||
|
|
|
||||||
|
|
@ -585,9 +585,8 @@ static int __init wakeupgen_init(struct device_node *node,
|
||||||
wakeupgen_ops = &am43xx_wakeupgen_ops;
|
wakeupgen_ops = &am43xx_wakeupgen_ops;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0, max_irqs,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, max_irqs, of_fwnode_handle(node),
|
||||||
node, &wakeupgen_domain_ops,
|
&wakeupgen_domain_ops, NULL);
|
||||||
NULL);
|
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
iounmap(wakeupgen_base);
|
iounmap(wakeupgen_base);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -147,8 +147,7 @@ pxa_init_irq_common(struct device_node *node, int irq_nr,
|
||||||
int n;
|
int n;
|
||||||
|
|
||||||
pxa_internal_irq_nr = irq_nr;
|
pxa_internal_irq_nr = irq_nr;
|
||||||
pxa_irq_domain = irq_domain_add_legacy(node, irq_nr,
|
pxa_irq_domain = irq_domain_create_legacy(of_fwnode_handle(node), irq_nr, PXA_IRQ(0), 0,
|
||||||
PXA_IRQ(0), 0,
|
|
||||||
&pxa_irq_ops, NULL);
|
&pxa_irq_ops, NULL);
|
||||||
if (!pxa_irq_domain)
|
if (!pxa_irq_domain)
|
||||||
panic("Unable to add PXA IRQ domain\n");
|
panic("Unable to add PXA IRQ domain\n");
|
||||||
|
|
|
||||||
|
|
@ -600,7 +600,7 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
|
||||||
IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
|
IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
|
||||||
|
|
||||||
/* Setup irq domain on top of the generic chip. */
|
/* Setup irq domain on top of the generic chip. */
|
||||||
ochip->domain = irq_domain_add_legacy(NULL,
|
ochip->domain = irq_domain_create_legacy(NULL,
|
||||||
ochip->chip.ngpio,
|
ochip->chip.ngpio,
|
||||||
ochip->secondary_irq_base,
|
ochip->secondary_irq_base,
|
||||||
ochip->secondary_irq_base,
|
ochip->secondary_irq_base,
|
||||||
|
|
|
||||||
|
|
@ -149,7 +149,7 @@ void __init ar2315_arch_init_irq(void)
|
||||||
|
|
||||||
ath25_irq_dispatch = ar2315_irq_dispatch;
|
ath25_irq_dispatch = ar2315_irq_dispatch;
|
||||||
|
|
||||||
domain = irq_domain_add_linear(NULL, AR2315_MISC_IRQ_COUNT,
|
domain = irq_domain_create_linear(NULL, AR2315_MISC_IRQ_COUNT,
|
||||||
&ar2315_misc_irq_domain_ops, NULL);
|
&ar2315_misc_irq_domain_ops, NULL);
|
||||||
if (!domain)
|
if (!domain)
|
||||||
panic("Failed to add IRQ domain");
|
panic("Failed to add IRQ domain");
|
||||||
|
|
|
||||||
|
|
@ -143,7 +143,7 @@ void __init ar5312_arch_init_irq(void)
|
||||||
|
|
||||||
ath25_irq_dispatch = ar5312_irq_dispatch;
|
ath25_irq_dispatch = ar5312_irq_dispatch;
|
||||||
|
|
||||||
domain = irq_domain_add_linear(NULL, AR5312_MISC_IRQ_COUNT,
|
domain = irq_domain_create_linear(NULL, AR5312_MISC_IRQ_COUNT,
|
||||||
&ar5312_misc_irq_domain_ops, NULL);
|
&ar5312_misc_irq_domain_ops, NULL);
|
||||||
if (!domain)
|
if (!domain)
|
||||||
panic("Failed to add IRQ domain");
|
panic("Failed to add IRQ domain");
|
||||||
|
|
|
||||||
|
|
@ -1503,8 +1503,8 @@ static int __init octeon_irq_init_ciu(
|
||||||
/* Mips internal */
|
/* Mips internal */
|
||||||
octeon_irq_init_core();
|
octeon_irq_init_core();
|
||||||
|
|
||||||
ciu_domain = irq_domain_add_tree(
|
ciu_domain = irq_domain_create_tree(of_fwnode_handle(ciu_node), &octeon_irq_domain_ciu_ops,
|
||||||
ciu_node, &octeon_irq_domain_ciu_ops, dd);
|
dd);
|
||||||
irq_set_default_domain(ciu_domain);
|
irq_set_default_domain(ciu_domain);
|
||||||
|
|
||||||
/* CIU_0 */
|
/* CIU_0 */
|
||||||
|
|
@ -1637,8 +1637,8 @@ static int __init octeon_irq_init_gpio(
|
||||||
if (gpiod) {
|
if (gpiod) {
|
||||||
/* gpio domain host_data is the base hwirq number. */
|
/* gpio domain host_data is the base hwirq number. */
|
||||||
gpiod->base_hwirq = base_hwirq;
|
gpiod->base_hwirq = base_hwirq;
|
||||||
irq_domain_add_linear(
|
irq_domain_create_linear(of_fwnode_handle(gpio_node), 16,
|
||||||
gpio_node, 16, &octeon_irq_domain_gpio_ops, gpiod);
|
&octeon_irq_domain_gpio_ops, gpiod);
|
||||||
} else {
|
} else {
|
||||||
pr_warn("Cannot allocate memory for GPIO irq_domain.\n");
|
pr_warn("Cannot allocate memory for GPIO irq_domain.\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
@ -2074,8 +2074,8 @@ static int __init octeon_irq_init_ciu2(
|
||||||
/* Mips internal */
|
/* Mips internal */
|
||||||
octeon_irq_init_core();
|
octeon_irq_init_core();
|
||||||
|
|
||||||
ciu_domain = irq_domain_add_tree(
|
ciu_domain = irq_domain_create_tree(of_fwnode_handle(ciu_node), &octeon_irq_domain_ciu2_ops,
|
||||||
ciu_node, &octeon_irq_domain_ciu2_ops, NULL);
|
NULL);
|
||||||
irq_set_default_domain(ciu_domain);
|
irq_set_default_domain(ciu_domain);
|
||||||
|
|
||||||
/* CUI2 */
|
/* CUI2 */
|
||||||
|
|
@ -2331,11 +2331,12 @@ static int __init octeon_irq_init_cib(struct device_node *ciu_node,
|
||||||
}
|
}
|
||||||
host_data->max_bits = val;
|
host_data->max_bits = val;
|
||||||
|
|
||||||
cib_domain = irq_domain_add_linear(ciu_node, host_data->max_bits,
|
cib_domain = irq_domain_create_linear(of_fwnode_handle(ciu_node),
|
||||||
|
host_data->max_bits,
|
||||||
&octeon_irq_domain_cib_ops,
|
&octeon_irq_domain_cib_ops,
|
||||||
host_data);
|
host_data);
|
||||||
if (!cib_domain) {
|
if (!cib_domain) {
|
||||||
pr_err("ERROR: Couldn't irq_domain_add_linear()\n");
|
pr_err("ERROR: Couldn't irq_domain_create_linear()\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -2918,7 +2919,7 @@ static int __init octeon_irq_init_ciu3(struct device_node *ciu_node,
|
||||||
* Initialize all domains to use the default domain. Specific major
|
* Initialize all domains to use the default domain. Specific major
|
||||||
* blocks will overwrite the default domain as needed.
|
* blocks will overwrite the default domain as needed.
|
||||||
*/
|
*/
|
||||||
domain = irq_domain_add_tree(ciu_node, &octeon_dflt_domain_ciu3_ops,
|
domain = irq_domain_create_tree(of_fwnode_handle(ciu_node), &octeon_dflt_domain_ciu3_ops,
|
||||||
ciu3_info);
|
ciu3_info);
|
||||||
for (i = 0; i < MAX_CIU3_DOMAINS; i++)
|
for (i = 0; i < MAX_CIU3_DOMAINS; i++)
|
||||||
ciu3_info->domain[i] = domain;
|
ciu3_info->domain[i] = domain;
|
||||||
|
|
|
||||||
|
|
@ -377,7 +377,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
|
||||||
for (i = 0; i < MAX_IM; i++)
|
for (i = 0; i < MAX_IM; i++)
|
||||||
irq_set_chained_handler(i + 2, ltq_hw_irq_handler);
|
irq_set_chained_handler(i + 2, ltq_hw_irq_handler);
|
||||||
|
|
||||||
ltq_domain = irq_domain_add_linear(node,
|
ltq_domain = irq_domain_create_linear(of_fwnode_handle(node),
|
||||||
(MAX_IM * INT_NUM_IM_OFFSET) + MIPS_CPU_IRQ_CASCADE,
|
(MAX_IM * INT_NUM_IM_OFFSET) + MIPS_CPU_IRQ_CASCADE,
|
||||||
&irq_domain_ops, 0);
|
&irq_domain_ops, 0);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -469,7 +469,7 @@ static int ar2315_pci_probe(struct platform_device *pdev)
|
||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|
||||||
apc->domain = irq_domain_add_linear(NULL, AR2315_PCI_IRQ_COUNT,
|
apc->domain = irq_domain_create_linear(NULL, AR2315_PCI_IRQ_COUNT,
|
||||||
&ar2315_pci_irq_domain_ops, apc);
|
&ar2315_pci_irq_domain_ops, apc);
|
||||||
if (!apc->domain) {
|
if (!apc->domain) {
|
||||||
dev_err(dev, "failed to add IRQ domain\n");
|
dev_err(dev, "failed to add IRQ domain\n");
|
||||||
|
|
|
||||||
|
|
@ -208,7 +208,8 @@ static int rt3883_pci_irq_init(struct device *dev,
|
||||||
rt3883_pci_w32(rpc, 0, RT3883_PCI_REG_PCIENA);
|
rt3883_pci_w32(rpc, 0, RT3883_PCI_REG_PCIENA);
|
||||||
|
|
||||||
rpc->irq_domain =
|
rpc->irq_domain =
|
||||||
irq_domain_add_linear(rpc->intc_of_node, RT3883_PCI_IRQ_COUNT,
|
irq_domain_create_linear(of_fwnode_handle(rpc->intc_of_node),
|
||||||
|
RT3883_PCI_IRQ_COUNT,
|
||||||
&rt3883_pci_irq_domain_ops,
|
&rt3883_pci_irq_domain_ops,
|
||||||
rpc);
|
rpc);
|
||||||
if (!rpc->irq_domain) {
|
if (!rpc->irq_domain) {
|
||||||
|
|
|
||||||
|
|
@ -176,7 +176,7 @@ static int __init intc_of_init(struct device_node *node,
|
||||||
/* route all INTC interrupts to MIPS HW0 interrupt */
|
/* route all INTC interrupts to MIPS HW0 interrupt */
|
||||||
rt_intc_w32(0, INTC_REG_TYPE);
|
rt_intc_w32(0, INTC_REG_TYPE);
|
||||||
|
|
||||||
domain = irq_domain_add_legacy(node, RALINK_INTC_IRQ_COUNT,
|
domain = irq_domain_create_legacy(of_fwnode_handle(node), RALINK_INTC_IRQ_COUNT,
|
||||||
RALINK_INTC_IRQ_BASE, 0, &irq_domain_ops, NULL);
|
RALINK_INTC_IRQ_BASE, 0, &irq_domain_ops, NULL);
|
||||||
if (!domain)
|
if (!domain)
|
||||||
panic("Failed to add irqdomain");
|
panic("Failed to add irqdomain");
|
||||||
|
|
|
||||||
|
|
@ -69,7 +69,8 @@ void __init init_IRQ(void)
|
||||||
|
|
||||||
BUG_ON(!node);
|
BUG_ON(!node);
|
||||||
|
|
||||||
domain = irq_domain_add_linear(node, NIOS2_CPU_NR_IRQS, &irq_ops, NULL);
|
domain = irq_domain_create_linear(of_fwnode_handle(node),
|
||||||
|
NIOS2_CPU_NR_IRQS, &irq_ops, NULL);
|
||||||
BUG_ON(!domain);
|
BUG_ON(!domain);
|
||||||
|
|
||||||
irq_set_default_domain(domain);
|
irq_set_default_domain(domain);
|
||||||
|
|
|
||||||
|
|
@ -254,7 +254,8 @@ static struct uic * __init uic_init_one(struct device_node *node)
|
||||||
}
|
}
|
||||||
uic->dcrbase = *dcrreg;
|
uic->dcrbase = *dcrreg;
|
||||||
|
|
||||||
uic->irqhost = irq_domain_add_linear(node, NR_UIC_INTS, &uic_host_ops,
|
uic->irqhost = irq_domain_create_linear(of_fwnode_handle(node),
|
||||||
|
NR_UIC_INTS, &uic_host_ops,
|
||||||
uic);
|
uic);
|
||||||
if (! uic->irqhost)
|
if (! uic->irqhost)
|
||||||
return NULL; /* FIXME: panic? */
|
return NULL; /* FIXME: panic? */
|
||||||
|
|
@ -327,5 +328,5 @@ unsigned int uic_get_irq(void)
|
||||||
msr = mfdcr(primary_uic->dcrbase + UIC_MSR);
|
msr = mfdcr(primary_uic->dcrbase + UIC_MSR);
|
||||||
src = 32 - ffs(msr);
|
src = 32 - ffs(msr);
|
||||||
|
|
||||||
return irq_linear_revmap(primary_uic->irqhost, src);
|
return irq_find_mapping(primary_uic->irqhost, src);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -188,7 +188,8 @@ mpc5121_ads_cpld_pic_init(void)
|
||||||
|
|
||||||
cpld_pic_node = of_node_get(np);
|
cpld_pic_node = of_node_get(np);
|
||||||
|
|
||||||
cpld_pic_host = irq_domain_add_linear(np, 16, &cpld_pic_host_ops, NULL);
|
cpld_pic_host = irq_domain_create_linear(of_fwnode_handle(np), 16,
|
||||||
|
&cpld_pic_host_ops, NULL);
|
||||||
if (!cpld_pic_host) {
|
if (!cpld_pic_host) {
|
||||||
printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n");
|
printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n");
|
||||||
goto end;
|
goto end;
|
||||||
|
|
|
||||||
|
|
@ -168,7 +168,7 @@ static void __init media5200_init_irq(void)
|
||||||
|
|
||||||
spin_lock_init(&media5200_irq.lock);
|
spin_lock_init(&media5200_irq.lock);
|
||||||
|
|
||||||
media5200_irq.irqhost = irq_domain_add_linear(fpga_np,
|
media5200_irq.irqhost = irq_domain_create_linear(of_fwnode_handle(fpga_np),
|
||||||
MEDIA5200_NUM_IRQS, &media5200_irq_ops, &media5200_irq);
|
MEDIA5200_NUM_IRQS, &media5200_irq_ops, &media5200_irq);
|
||||||
if (!media5200_irq.irqhost)
|
if (!media5200_irq.irqhost)
|
||||||
goto out;
|
goto out;
|
||||||
|
|
|
||||||
|
|
@ -247,9 +247,9 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
|
||||||
if (!cascade_virq)
|
if (!cascade_virq)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
gpt->irqhost = irq_domain_add_linear(node, 1, &mpc52xx_gpt_irq_ops, gpt);
|
gpt->irqhost = irq_domain_create_linear(of_fwnode_handle(node), 1, &mpc52xx_gpt_irq_ops, gpt);
|
||||||
if (!gpt->irqhost) {
|
if (!gpt->irqhost) {
|
||||||
dev_err(gpt->dev, "irq_domain_add_linear() failed\n");
|
dev_err(gpt->dev, "irq_domain_create_linear() failed\n");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -371,7 +371,7 @@ struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq)
|
||||||
mutex_lock(&mpc52xx_gpt_list_mutex);
|
mutex_lock(&mpc52xx_gpt_list_mutex);
|
||||||
list_for_each(pos, &mpc52xx_gpt_list) {
|
list_for_each(pos, &mpc52xx_gpt_list) {
|
||||||
gpt = container_of(pos, struct mpc52xx_gpt_priv, list);
|
gpt = container_of(pos, struct mpc52xx_gpt_priv, list);
|
||||||
if (gpt->irqhost && irq == irq_linear_revmap(gpt->irqhost, 0)) {
|
if (gpt->irqhost && irq == irq_find_mapping(gpt->irqhost, 0)) {
|
||||||
mutex_unlock(&mpc52xx_gpt_list_mutex);
|
mutex_unlock(&mpc52xx_gpt_list_mutex);
|
||||||
return gpt;
|
return gpt;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -446,7 +446,7 @@ void __init mpc52xx_init_irq(void)
|
||||||
* As last step, add an irq host to translate the real
|
* As last step, add an irq host to translate the real
|
||||||
* hw irq information provided by the ofw to linux virq
|
* hw irq information provided by the ofw to linux virq
|
||||||
*/
|
*/
|
||||||
mpc52xx_irqhost = irq_domain_add_linear(picnode,
|
mpc52xx_irqhost = irq_domain_create_linear(of_fwnode_handle(picnode),
|
||||||
MPC52xx_IRQ_HIGHTESTHWIRQ,
|
MPC52xx_IRQ_HIGHTESTHWIRQ,
|
||||||
&mpc52xx_irqhost_ops, NULL);
|
&mpc52xx_irqhost_ops, NULL);
|
||||||
|
|
||||||
|
|
@ -515,5 +515,5 @@ unsigned int mpc52xx_get_irq(void)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
return irq_linear_revmap(mpc52xx_irqhost, irq);
|
return irq_find_mapping(mpc52xx_irqhost, irq);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -83,7 +83,7 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq)
|
||||||
if (cause >> (i + 16))
|
if (cause >> (i + 16))
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
return irq_linear_revmap(socrates_fpga_pic_irq_host,
|
return irq_find_mapping(socrates_fpga_pic_irq_host,
|
||||||
(irq_hw_number_t)i);
|
(irq_hw_number_t)i);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -278,7 +278,7 @@ void __init socrates_fpga_pic_init(struct device_node *pic)
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
/* Setup an irq_domain structure */
|
/* Setup an irq_domain structure */
|
||||||
socrates_fpga_pic_irq_host = irq_domain_add_linear(pic,
|
socrates_fpga_pic_irq_host = irq_domain_create_linear(of_fwnode_handle(pic),
|
||||||
SOCRATES_FPGA_NUM_IRQS, &socrates_fpga_pic_host_ops, NULL);
|
SOCRATES_FPGA_NUM_IRQS, &socrates_fpga_pic_host_ops, NULL);
|
||||||
if (socrates_fpga_pic_irq_host == NULL) {
|
if (socrates_fpga_pic_irq_host == NULL) {
|
||||||
pr_err("FPGA PIC: Unable to allocate host\n");
|
pr_err("FPGA PIC: Unable to allocate host\n");
|
||||||
|
|
|
||||||
|
|
@ -59,7 +59,7 @@ static int cpm_get_irq(struct irq_desc *desc)
|
||||||
cpm_vec = in_be16(&data->reg->cpic_civr);
|
cpm_vec = in_be16(&data->reg->cpic_civr);
|
||||||
cpm_vec >>= 11;
|
cpm_vec >>= 11;
|
||||||
|
|
||||||
return irq_linear_revmap(data->host, cpm_vec);
|
return irq_find_mapping(data->host, cpm_vec);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cpm_cascade(struct irq_desc *desc)
|
static void cpm_cascade(struct irq_desc *desc)
|
||||||
|
|
@ -110,7 +110,8 @@ static int cpm_pic_probe(struct platform_device *pdev)
|
||||||
|
|
||||||
out_be32(&data->reg->cpic_cimr, 0);
|
out_be32(&data->reg->cpic_cimr, 0);
|
||||||
|
|
||||||
data->host = irq_domain_add_linear(dev->of_node, 64, &cpm_pic_host_ops, data);
|
data->host = irq_domain_create_linear(of_fwnode_handle(dev->of_node),
|
||||||
|
64, &cpm_pic_host_ops, data);
|
||||||
if (!data->host)
|
if (!data->host)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -80,7 +80,7 @@ unsigned int mpc8xx_get_irq(void)
|
||||||
if (irq == PIC_VEC_SPURRIOUS)
|
if (irq == PIC_VEC_SPURRIOUS)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
return irq_linear_revmap(mpc8xx_pic_host, irq);
|
return irq_find_mapping(mpc8xx_pic_host, irq);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -146,7 +146,8 @@ void __init mpc8xx_pic_init(void)
|
||||||
if (!siu_reg)
|
if (!siu_reg)
|
||||||
goto out;
|
goto out;
|
||||||
|
|
||||||
mpc8xx_pic_host = irq_domain_add_linear(np, 64, &mpc8xx_pic_host_ops, NULL);
|
mpc8xx_pic_host = irq_domain_create_linear(of_fwnode_handle(np), 64,
|
||||||
|
&mpc8xx_pic_host_ops, NULL);
|
||||||
if (!mpc8xx_pic_host)
|
if (!mpc8xx_pic_host)
|
||||||
printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");
|
printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -149,7 +149,8 @@ static struct irq_domain * __init flipper_pic_init(struct device_node *np)
|
||||||
|
|
||||||
__flipper_quiesce(io_base);
|
__flipper_quiesce(io_base);
|
||||||
|
|
||||||
irq_domain = irq_domain_add_linear(np, FLIPPER_NR_IRQS,
|
irq_domain = irq_domain_create_linear(of_fwnode_handle(np),
|
||||||
|
FLIPPER_NR_IRQS,
|
||||||
&flipper_irq_domain_ops, io_base);
|
&flipper_irq_domain_ops, io_base);
|
||||||
if (!irq_domain) {
|
if (!irq_domain) {
|
||||||
pr_err("failed to allocate irq_domain\n");
|
pr_err("failed to allocate irq_domain\n");
|
||||||
|
|
@ -172,7 +173,7 @@ unsigned int flipper_pic_get_irq(void)
|
||||||
return 0; /* no more IRQs pending */
|
return 0; /* no more IRQs pending */
|
||||||
|
|
||||||
irq = __ffs(irq_status);
|
irq = __ffs(irq_status);
|
||||||
return irq_linear_revmap(flipper_irq_host, irq);
|
return irq_find_mapping(flipper_irq_host, irq);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
||||||
|
|
@ -175,7 +175,8 @@ static struct irq_domain *__init hlwd_pic_init(struct device_node *np)
|
||||||
|
|
||||||
__hlwd_quiesce(io_base);
|
__hlwd_quiesce(io_base);
|
||||||
|
|
||||||
irq_domain = irq_domain_add_linear(np, HLWD_NR_IRQS,
|
irq_domain = irq_domain_create_linear(of_fwnode_handle(np),
|
||||||
|
HLWD_NR_IRQS,
|
||||||
&hlwd_irq_domain_ops, io_base);
|
&hlwd_irq_domain_ops, io_base);
|
||||||
if (!irq_domain) {
|
if (!irq_domain) {
|
||||||
pr_err("failed to allocate irq_domain\n");
|
pr_err("failed to allocate irq_domain\n");
|
||||||
|
|
@ -189,7 +190,7 @@ static struct irq_domain *__init hlwd_pic_init(struct device_node *np)
|
||||||
unsigned int hlwd_pic_get_irq(void)
|
unsigned int hlwd_pic_get_irq(void)
|
||||||
{
|
{
|
||||||
unsigned int hwirq = __hlwd_pic_get_irq(hlwd_irq_host);
|
unsigned int hwirq = __hlwd_pic_get_irq(hlwd_irq_host);
|
||||||
return hwirq ? irq_linear_revmap(hlwd_irq_host, hwirq) : 0;
|
return hwirq ? irq_find_mapping(hlwd_irq_host, hwirq) : 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
||||||
|
|
@ -250,7 +250,7 @@ static unsigned int pmac_pic_get_irq(void)
|
||||||
raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
|
raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
|
||||||
if (unlikely(irq < 0))
|
if (unlikely(irq < 0))
|
||||||
return 0;
|
return 0;
|
||||||
return irq_linear_revmap(pmac_pic_host, irq);
|
return irq_find_mapping(pmac_pic_host, irq);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int pmac_pic_host_match(struct irq_domain *h, struct device_node *node,
|
static int pmac_pic_host_match(struct irq_domain *h, struct device_node *node,
|
||||||
|
|
@ -327,7 +327,8 @@ static void __init pmac_pic_probe_oldstyle(void)
|
||||||
/*
|
/*
|
||||||
* Allocate an irq host
|
* Allocate an irq host
|
||||||
*/
|
*/
|
||||||
pmac_pic_host = irq_domain_add_linear(master, max_irqs,
|
pmac_pic_host = irq_domain_create_linear(of_fwnode_handle(master),
|
||||||
|
max_irqs,
|
||||||
&pmac_pic_host_ops, NULL);
|
&pmac_pic_host_ops, NULL);
|
||||||
BUG_ON(pmac_pic_host == NULL);
|
BUG_ON(pmac_pic_host == NULL);
|
||||||
irq_set_default_domain(pmac_pic_host);
|
irq_set_default_domain(pmac_pic_host);
|
||||||
|
|
|
||||||
|
|
@ -190,7 +190,7 @@ static int __init psurge_secondary_ipi_init(void)
|
||||||
{
|
{
|
||||||
int rc = -ENOMEM;
|
int rc = -ENOMEM;
|
||||||
|
|
||||||
psurge_host = irq_domain_add_nomap(NULL, ~0, &psurge_host_ops, NULL);
|
psurge_host = irq_domain_create_nomap(NULL, ~0, &psurge_host_ops, NULL);
|
||||||
|
|
||||||
if (psurge_host)
|
if (psurge_host)
|
||||||
psurge_secondary_virq = irq_create_direct_mapping(psurge_host);
|
psurge_secondary_virq = irq_create_direct_mapping(psurge_host);
|
||||||
|
|
|
||||||
|
|
@ -191,7 +191,8 @@ int __init opal_event_init(void)
|
||||||
* fall back to the legacy method (opal_event_request(...))
|
* fall back to the legacy method (opal_event_request(...))
|
||||||
* anyway. */
|
* anyway. */
|
||||||
dn = of_find_compatible_node(NULL, NULL, "ibm,opal-event");
|
dn = of_find_compatible_node(NULL, NULL, "ibm,opal-event");
|
||||||
opal_event_irqchip.domain = irq_domain_add_linear(dn, MAX_NUM_EVENTS,
|
opal_event_irqchip.domain = irq_domain_create_linear(of_fwnode_handle(dn),
|
||||||
|
MAX_NUM_EVENTS,
|
||||||
&opal_event_domain_ops, &opal_event_irqchip);
|
&opal_event_domain_ops, &opal_event_irqchip);
|
||||||
of_node_put(dn);
|
of_node_put(dn);
|
||||||
if (!opal_event_irqchip.domain) {
|
if (!opal_event_irqchip.domain) {
|
||||||
|
|
|
||||||
|
|
@ -1897,7 +1897,7 @@ static int __init pnv_msi_allocate_domains(struct pci_controller *hose, unsigned
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
hose->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(hose->dn),
|
hose->msi_domain = pci_msi_create_irq_domain(of_fwnode_handle(hose->dn),
|
||||||
&pnv_msi_domain_info,
|
&pnv_msi_domain_info,
|
||||||
hose->dev_domain);
|
hose->dev_domain);
|
||||||
if (!hose->msi_domain) {
|
if (!hose->msi_domain) {
|
||||||
|
|
|
||||||
|
|
@ -743,7 +743,7 @@ void __init ps3_init_IRQ(void)
|
||||||
unsigned cpu;
|
unsigned cpu;
|
||||||
struct irq_domain *host;
|
struct irq_domain *host;
|
||||||
|
|
||||||
host = irq_domain_add_nomap(NULL, PS3_PLUG_MAX + 1, &ps3_host_ops, NULL);
|
host = irq_domain_create_nomap(NULL, PS3_PLUG_MAX + 1, &ps3_host_ops, NULL);
|
||||||
irq_set_default_domain(host);
|
irq_set_default_domain(host);
|
||||||
|
|
||||||
for_each_possible_cpu(cpu) {
|
for_each_possible_cpu(cpu) {
|
||||||
|
|
|
||||||
|
|
@ -633,7 +633,7 @@ static int __pseries_msi_allocate_domains(struct pci_controller *phb,
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
phb->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(phb->dn),
|
phb->msi_domain = pci_msi_create_irq_domain(of_fwnode_handle(phb->dn),
|
||||||
&pseries_msi_domain_info,
|
&pseries_msi_domain_info,
|
||||||
phb->dev_domain);
|
phb->dev_domain);
|
||||||
if (!phb->msi_domain) {
|
if (!phb->msi_domain) {
|
||||||
|
|
|
||||||
|
|
@ -207,7 +207,7 @@ unsigned int cpm2_get_irq(void)
|
||||||
|
|
||||||
if (irq == 0)
|
if (irq == 0)
|
||||||
return(-1);
|
return(-1);
|
||||||
return irq_linear_revmap(cpm2_pic_host, irq);
|
return irq_find_mapping(cpm2_pic_host, irq);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int cpm2_pic_host_map(struct irq_domain *h, unsigned int virq,
|
static int cpm2_pic_host_map(struct irq_domain *h, unsigned int virq,
|
||||||
|
|
@ -259,7 +259,8 @@ void cpm2_pic_init(struct device_node *node)
|
||||||
out_be32(&cpm2_intctl->ic_scprrl, 0x05309770);
|
out_be32(&cpm2_intctl->ic_scprrl, 0x05309770);
|
||||||
|
|
||||||
/* create a legacy host */
|
/* create a legacy host */
|
||||||
cpm2_pic_host = irq_domain_add_linear(node, 64, &cpm2_pic_host_ops, NULL);
|
cpm2_pic_host = irq_domain_create_linear(of_fwnode_handle(node), 64,
|
||||||
|
&cpm2_pic_host_ops, NULL);
|
||||||
if (cpm2_pic_host == NULL) {
|
if (cpm2_pic_host == NULL) {
|
||||||
printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
|
printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
|
||||||
return;
|
return;
|
||||||
|
|
|
||||||
|
|
@ -175,7 +175,7 @@ unsigned int ehv_pic_get_irq(void)
|
||||||
* this will also setup revmap[] in the slow path for the first
|
* this will also setup revmap[] in the slow path for the first
|
||||||
* time, next calls will always use fast path by indexing revmap
|
* time, next calls will always use fast path by indexing revmap
|
||||||
*/
|
*/
|
||||||
return irq_linear_revmap(global_ehv_pic->irqhost, irq);
|
return irq_find_mapping(global_ehv_pic->irqhost, irq);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int ehv_pic_host_match(struct irq_domain *h, struct device_node *node,
|
static int ehv_pic_host_match(struct irq_domain *h, struct device_node *node,
|
||||||
|
|
@ -269,7 +269,8 @@ void __init ehv_pic_init(void)
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
ehv_pic->irqhost = irq_domain_add_linear(np, NR_EHV_PIC_INTS,
|
ehv_pic->irqhost = irq_domain_create_linear(of_fwnode_handle(np),
|
||||||
|
NR_EHV_PIC_INTS,
|
||||||
&ehv_pic_host_ops, ehv_pic);
|
&ehv_pic_host_ops, ehv_pic);
|
||||||
if (!ehv_pic->irqhost) {
|
if (!ehv_pic->irqhost) {
|
||||||
of_node_put(np);
|
of_node_put(np);
|
||||||
|
|
|
||||||
|
|
@ -412,7 +412,7 @@ static int fsl_of_msi_probe(struct platform_device *dev)
|
||||||
}
|
}
|
||||||
platform_set_drvdata(dev, msi);
|
platform_set_drvdata(dev, msi);
|
||||||
|
|
||||||
msi->irqhost = irq_domain_add_linear(dev->dev.of_node,
|
msi->irqhost = irq_domain_create_linear(of_fwnode_handle(dev->dev.of_node),
|
||||||
NR_MSI_IRQS_MAX, &fsl_msi_host_ops, msi);
|
NR_MSI_IRQS_MAX, &fsl_msi_host_ops, msi);
|
||||||
|
|
||||||
if (msi->irqhost == NULL) {
|
if (msi->irqhost == NULL) {
|
||||||
|
|
|
||||||
|
|
@ -214,7 +214,8 @@ void __init gef_pic_init(struct device_node *np)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Setup an irq_domain structure */
|
/* Setup an irq_domain structure */
|
||||||
gef_pic_irq_host = irq_domain_add_linear(np, GEF_PIC_NUM_IRQS,
|
gef_pic_irq_host = irq_domain_create_linear(of_fwnode_handle(np),
|
||||||
|
GEF_PIC_NUM_IRQS,
|
||||||
&gef_pic_host_ops, NULL);
|
&gef_pic_host_ops, NULL);
|
||||||
if (gef_pic_irq_host == NULL)
|
if (gef_pic_irq_host == NULL)
|
||||||
return;
|
return;
|
||||||
|
|
@ -244,7 +245,7 @@ unsigned int gef_pic_get_irq(void)
|
||||||
if (active & (0x1 << hwirq))
|
if (active & (0x1 << hwirq))
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
virq = irq_linear_revmap(gef_pic_irq_host,
|
virq = irq_find_mapping(gef_pic_irq_host,
|
||||||
(irq_hw_number_t)hwirq);
|
(irq_hw_number_t)hwirq);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -260,7 +260,7 @@ void i8259_init(struct device_node *node, unsigned long intack_addr)
|
||||||
raw_spin_unlock_irqrestore(&i8259_lock, flags);
|
raw_spin_unlock_irqrestore(&i8259_lock, flags);
|
||||||
|
|
||||||
/* create a legacy host */
|
/* create a legacy host */
|
||||||
i8259_host = irq_domain_add_legacy(node, NR_IRQS_LEGACY, 0, 0,
|
i8259_host = irq_domain_create_legacy(of_fwnode_handle(node), NR_IRQS_LEGACY, 0, 0,
|
||||||
&i8259_host_ops, NULL);
|
&i8259_host_ops, NULL);
|
||||||
if (i8259_host == NULL) {
|
if (i8259_host == NULL) {
|
||||||
printk(KERN_ERR "i8259: failed to allocate irq host !\n");
|
printk(KERN_ERR "i8259: failed to allocate irq host !\n");
|
||||||
|
|
|
||||||
|
|
@ -711,7 +711,8 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
|
||||||
if (ipic == NULL)
|
if (ipic == NULL)
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
ipic->irqhost = irq_domain_add_linear(node, NR_IPIC_INTS,
|
ipic->irqhost = irq_domain_create_linear(of_fwnode_handle(node),
|
||||||
|
NR_IPIC_INTS,
|
||||||
&ipic_host_ops, ipic);
|
&ipic_host_ops, ipic);
|
||||||
if (ipic->irqhost == NULL) {
|
if (ipic->irqhost == NULL) {
|
||||||
kfree(ipic);
|
kfree(ipic);
|
||||||
|
|
@ -800,7 +801,7 @@ unsigned int ipic_get_irq(void)
|
||||||
if (irq == 0) /* 0 --> no irq is pending */
|
if (irq == 0) /* 0 --> no irq is pending */
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
return irq_linear_revmap(primary_ipic->irqhost, irq);
|
return irq_find_mapping(primary_ipic->irqhost, irq);
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_SUSPEND
|
#ifdef CONFIG_SUSPEND
|
||||||
|
|
|
||||||
|
|
@ -1484,7 +1484,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
|
||||||
mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
|
mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
|
||||||
mpic->isu_mask = (1 << mpic->isu_shift) - 1;
|
mpic->isu_mask = (1 << mpic->isu_shift) - 1;
|
||||||
|
|
||||||
mpic->irqhost = irq_domain_add_linear(mpic->node,
|
mpic->irqhost = irq_domain_create_linear(of_fwnode_handle(mpic->node),
|
||||||
intvec_top,
|
intvec_top,
|
||||||
&mpic_host_ops, mpic);
|
&mpic_host_ops, mpic);
|
||||||
|
|
||||||
|
|
@ -1786,7 +1786,7 @@ static unsigned int _mpic_get_one_irq(struct mpic *mpic, int reg)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
return irq_linear_revmap(mpic->irqhost, src);
|
return irq_find_mapping(mpic->irqhost, src);
|
||||||
}
|
}
|
||||||
|
|
||||||
unsigned int mpic_get_one_irq(struct mpic *mpic)
|
unsigned int mpic_get_one_irq(struct mpic *mpic)
|
||||||
|
|
@ -1824,7 +1824,7 @@ unsigned int mpic_get_coreint_irq(void)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
return irq_linear_revmap(mpic->irqhost, src);
|
return irq_find_mapping(mpic->irqhost, src);
|
||||||
#else
|
#else
|
||||||
return 0;
|
return 0;
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -404,7 +404,7 @@ void __init tsi108_pci_int_init(struct device_node *node)
|
||||||
{
|
{
|
||||||
DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");
|
DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");
|
||||||
|
|
||||||
pci_irq_host = irq_domain_add_legacy(node, NR_IRQS_LEGACY, 0, 0,
|
pci_irq_host = irq_domain_create_legacy(of_fwnode_handle(node), NR_IRQS_LEGACY, 0, 0,
|
||||||
&pci_irq_domain_ops, NULL);
|
&pci_irq_domain_ops, NULL);
|
||||||
if (pci_irq_host == NULL) {
|
if (pci_irq_host == NULL) {
|
||||||
printk(KERN_ERR "pci_irq_host: failed to allocate irq domain!\n");
|
printk(KERN_ERR "pci_irq_host: failed to allocate irq domain!\n");
|
||||||
|
|
|
||||||
|
|
@ -1464,7 +1464,7 @@ static const struct irq_domain_ops xive_irq_domain_ops = {
|
||||||
|
|
||||||
static void __init xive_init_host(struct device_node *np)
|
static void __init xive_init_host(struct device_node *np)
|
||||||
{
|
{
|
||||||
xive_irq_domain = irq_domain_add_tree(np, &xive_irq_domain_ops, NULL);
|
xive_irq_domain = irq_domain_create_tree(of_fwnode_handle(np), &xive_irq_domain_ops, NULL);
|
||||||
if (WARN_ON(xive_irq_domain == NULL))
|
if (WARN_ON(xive_irq_domain == NULL))
|
||||||
return;
|
return;
|
||||||
irq_set_default_domain(xive_irq_domain);
|
irq_set_default_domain(xive_irq_domain);
|
||||||
|
|
|
||||||
|
|
@ -47,8 +47,9 @@ static void __init se7343_domain_init(void)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
se7343_irq_domain = irq_domain_add_linear(NULL, SE7343_FPGA_IRQ_NR,
|
se7343_irq_domain = irq_domain_create_linear(NULL, SE7343_FPGA_IRQ_NR,
|
||||||
&irq_domain_simple_ops, NULL);
|
&irq_domain_simple_ops,
|
||||||
|
NULL);
|
||||||
if (unlikely(!se7343_irq_domain)) {
|
if (unlikely(!se7343_irq_domain)) {
|
||||||
printk("Failed to get IRQ domain\n");
|
printk("Failed to get IRQ domain\n");
|
||||||
return;
|
return;
|
||||||
|
|
@ -70,7 +71,7 @@ static void __init se7343_gc_init(void)
|
||||||
struct irq_chip_type *ct;
|
struct irq_chip_type *ct;
|
||||||
unsigned int irq_base;
|
unsigned int irq_base;
|
||||||
|
|
||||||
irq_base = irq_linear_revmap(se7343_irq_domain, 0);
|
irq_base = irq_find_mapping(se7343_irq_domain, 0);
|
||||||
|
|
||||||
gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs,
|
gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs,
|
||||||
handle_level_irq);
|
handle_level_irq);
|
||||||
|
|
|
||||||
|
|
@ -46,7 +46,7 @@ static void __init se7722_domain_init(void)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
se7722_irq_domain = irq_domain_add_linear(NULL, SE7722_FPGA_IRQ_NR,
|
se7722_irq_domain = irq_domain_create_linear(NULL, SE7722_FPGA_IRQ_NR,
|
||||||
&irq_domain_simple_ops, NULL);
|
&irq_domain_simple_ops, NULL);
|
||||||
if (unlikely(!se7722_irq_domain)) {
|
if (unlikely(!se7722_irq_domain)) {
|
||||||
printk("Failed to get IRQ domain\n");
|
printk("Failed to get IRQ domain\n");
|
||||||
|
|
@ -69,7 +69,7 @@ static void __init se7722_gc_init(void)
|
||||||
struct irq_chip_type *ct;
|
struct irq_chip_type *ct;
|
||||||
unsigned int irq_base;
|
unsigned int irq_base;
|
||||||
|
|
||||||
irq_base = irq_linear_revmap(se7722_irq_domain, 0);
|
irq_base = irq_find_mapping(se7722_irq_domain, 0);
|
||||||
|
|
||||||
gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7722_irq_regs,
|
gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7722_irq_regs,
|
||||||
handle_level_irq);
|
handle_level_irq);
|
||||||
|
|
|
||||||
|
|
@ -108,7 +108,7 @@ int __init x3proto_gpio_setup(void)
|
||||||
if (unlikely(ret))
|
if (unlikely(ret))
|
||||||
goto err_gpio;
|
goto err_gpio;
|
||||||
|
|
||||||
x3proto_irq_domain = irq_domain_add_linear(NULL, NR_BASEBOARD_GPIOS,
|
x3proto_irq_domain = irq_domain_create_linear(NULL, NR_BASEBOARD_GPIOS,
|
||||||
&x3proto_gpio_irq_ops, NULL);
|
&x3proto_gpio_irq_ops, NULL);
|
||||||
if (unlikely(!x3proto_irq_domain))
|
if (unlikely(!x3proto_irq_domain))
|
||||||
goto err_irq;
|
goto err_irq;
|
||||||
|
|
|
||||||
|
|
@ -2225,7 +2225,7 @@ static int mp_irqdomain_create(int ioapic)
|
||||||
|
|
||||||
/* Handle device tree enumerated APICs proper */
|
/* Handle device tree enumerated APICs proper */
|
||||||
if (cfg->dev) {
|
if (cfg->dev) {
|
||||||
fn = of_node_to_fwnode(cfg->dev);
|
fn = of_fwnode_handle(cfg->dev);
|
||||||
} else {
|
} else {
|
||||||
fn = irq_domain_alloc_named_id_fwnode("IO-APIC", mpc_ioapic_id(ioapic));
|
fn = irq_domain_alloc_named_id_fwnode("IO-APIC", mpc_ioapic_id(ioapic));
|
||||||
if (!fn)
|
if (!fn)
|
||||||
|
|
|
||||||
|
|
@ -737,7 +737,7 @@ static int moxtet_irq_setup(struct moxtet *moxtet)
|
||||||
{
|
{
|
||||||
int i, ret;
|
int i, ret;
|
||||||
|
|
||||||
moxtet->irq.domain = irq_domain_add_simple(moxtet->dev->of_node,
|
moxtet->irq.domain = irq_domain_create_simple(of_fwnode_handle(moxtet->dev->of_node),
|
||||||
MOXTET_NIRQS, 0,
|
MOXTET_NIRQS, 0,
|
||||||
&moxtet_irq_domain, moxtet);
|
&moxtet_irq_domain, moxtet);
|
||||||
if (moxtet->irq.domain == NULL) {
|
if (moxtet->irq.domain == NULL) {
|
||||||
|
|
|
||||||
|
|
@ -2131,8 +2131,8 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
|
||||||
edac->irq_chip.name = pdev->dev.of_node->name;
|
edac->irq_chip.name = pdev->dev.of_node->name;
|
||||||
edac->irq_chip.irq_mask = a10_eccmgr_irq_mask;
|
edac->irq_chip.irq_mask = a10_eccmgr_irq_mask;
|
||||||
edac->irq_chip.irq_unmask = a10_eccmgr_irq_unmask;
|
edac->irq_chip.irq_unmask = a10_eccmgr_irq_unmask;
|
||||||
edac->domain = irq_domain_add_linear(pdev->dev.of_node, 64,
|
edac->domain = irq_domain_create_linear(of_fwnode_handle(pdev->dev.of_node),
|
||||||
&a10_eccmgr_ic_ops, edac);
|
64, &a10_eccmgr_ic_ops, edac);
|
||||||
if (!edac->domain) {
|
if (!edac->domain) {
|
||||||
dev_err(&pdev->dev, "Error adding IRQ domain\n");
|
dev_err(&pdev->dev, "Error adding IRQ domain\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -437,7 +437,7 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev,
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
priv->irq_domain =
|
priv->irq_domain =
|
||||||
irq_domain_add_linear(np, priv->num_gpios,
|
irq_domain_create_linear(of_fwnode_handle(np), priv->num_gpios,
|
||||||
&brcmstb_gpio_irq_domain_ops,
|
&brcmstb_gpio_irq_domain_ops,
|
||||||
priv);
|
priv);
|
||||||
if (!priv->irq_domain) {
|
if (!priv->irq_domain) {
|
||||||
|
|
|
||||||
|
|
@ -479,9 +479,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
|
||||||
return irq;
|
return irq;
|
||||||
}
|
}
|
||||||
|
|
||||||
irq_domain = irq_domain_add_legacy(dev->of_node, ngpio, irq, 0,
|
irq_domain = irq_domain_create_legacy(of_fwnode_handle(dev->of_node), ngpio, irq, 0,
|
||||||
&davinci_gpio_irq_ops,
|
&davinci_gpio_irq_ops, chips);
|
||||||
chips);
|
|
||||||
if (!irq_domain) {
|
if (!irq_domain) {
|
||||||
dev_err(dev, "Couldn't register an IRQ domain\n");
|
dev_err(dev, "Couldn't register an IRQ domain\n");
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
|
||||||
|
|
@ -323,7 +323,8 @@ static int em_gio_probe(struct platform_device *pdev)
|
||||||
irq_chip->irq_release_resources = em_gio_irq_relres;
|
irq_chip->irq_release_resources = em_gio_irq_relres;
|
||||||
irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
|
irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
|
||||||
|
|
||||||
p->irq_domain = irq_domain_add_simple(dev->of_node, ngpios, 0,
|
p->irq_domain = irq_domain_create_simple(of_fwnode_handle(dev->of_node),
|
||||||
|
ngpios, 0,
|
||||||
&em_gio_irq_domain_ops, p);
|
&em_gio_irq_domain_ops, p);
|
||||||
if (!p->irq_domain) {
|
if (!p->irq_domain) {
|
||||||
dev_err(dev, "cannot initialize irq domain\n");
|
dev_err(dev, "cannot initialize irq domain\n");
|
||||||
|
|
|
||||||
|
|
@ -397,7 +397,7 @@ static int grgpio_probe(struct platform_device *ofdev)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
priv->domain = irq_domain_add_linear(np, gc->ngpio,
|
priv->domain = irq_domain_create_linear(of_fwnode_handle(np), gc->ngpio,
|
||||||
&grgpio_irq_domain_ops,
|
&grgpio_irq_domain_ops,
|
||||||
priv);
|
priv);
|
||||||
if (!priv->domain) {
|
if (!priv->domain) {
|
||||||
|
|
|
||||||
|
|
@ -37,7 +37,7 @@ static void idt_gpio_dispatch(struct irq_desc *desc)
|
||||||
pending = readl(ctrl->pic + IDT_PIC_IRQ_PEND);
|
pending = readl(ctrl->pic + IDT_PIC_IRQ_PEND);
|
||||||
pending &= ~ctrl->mask_cache;
|
pending &= ~ctrl->mask_cache;
|
||||||
for_each_set_bit(bit, &pending, gc->ngpio) {
|
for_each_set_bit(bit, &pending, gc->ngpio) {
|
||||||
virq = irq_linear_revmap(gc->irq.domain, bit);
|
virq = irq_find_mapping(gc->irq.domain, bit);
|
||||||
if (virq)
|
if (virq)
|
||||||
generic_handle_irq(virq);
|
generic_handle_irq(virq);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -240,11 +240,9 @@ static int lpc18xx_gpio_pin_ic_probe(struct lpc18xx_gpio_chip *gc)
|
||||||
|
|
||||||
raw_spin_lock_init(&ic->lock);
|
raw_spin_lock_init(&ic->lock);
|
||||||
|
|
||||||
ic->domain = irq_domain_add_hierarchy(parent_domain, 0,
|
ic->domain = irq_domain_create_hierarchy(parent_domain, 0, NR_LPC18XX_GPIO_PIN_IC_IRQS,
|
||||||
NR_LPC18XX_GPIO_PIN_IC_IRQS,
|
of_fwnode_handle(dev->of_node),
|
||||||
dev->of_node,
|
&lpc18xx_gpio_pin_ic_domain_ops, ic);
|
||||||
&lpc18xx_gpio_pin_ic_domain_ops,
|
|
||||||
ic);
|
|
||||||
if (!ic->domain) {
|
if (!ic->domain) {
|
||||||
pr_err("unable to add irq domain\n");
|
pr_err("unable to add irq domain\n");
|
||||||
ret = -ENODEV;
|
ret = -ENODEV;
|
||||||
|
|
|
||||||
|
|
@ -1237,7 +1237,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
mvchip->domain =
|
mvchip->domain =
|
||||||
irq_domain_add_linear(np, ngpios, &irq_generic_chip_ops, NULL);
|
irq_domain_create_linear(of_fwnode_handle(np), ngpios, &irq_generic_chip_ops, NULL);
|
||||||
if (!mvchip->domain) {
|
if (!mvchip->domain) {
|
||||||
dev_err(&pdev->dev, "couldn't allocate irq domain %s (DT).\n",
|
dev_err(&pdev->dev, "couldn't allocate irq domain %s (DT).\n",
|
||||||
mvchip->chip.label);
|
mvchip->chip.label);
|
||||||
|
|
|
||||||
|
|
@ -502,7 +502,7 @@ static int mxc_gpio_probe(struct platform_device *pdev)
|
||||||
goto out_bgio;
|
goto out_bgio;
|
||||||
}
|
}
|
||||||
|
|
||||||
port->domain = irq_domain_add_legacy(np, 32, irq_base, 0,
|
port->domain = irq_domain_create_legacy(of_fwnode_handle(np), 32, irq_base, 0,
|
||||||
&irq_domain_simple_ops, NULL);
|
&irq_domain_simple_ops, NULL);
|
||||||
if (!port->domain) {
|
if (!port->domain) {
|
||||||
err = -ENODEV;
|
err = -ENODEV;
|
||||||
|
|
|
||||||
|
|
@ -303,7 +303,7 @@ static int mxs_gpio_probe(struct platform_device *pdev)
|
||||||
goto out_iounmap;
|
goto out_iounmap;
|
||||||
}
|
}
|
||||||
|
|
||||||
port->domain = irq_domain_add_legacy(np, 32, irq_base, 0,
|
port->domain = irq_domain_create_legacy(of_fwnode_handle(np), 32, irq_base, 0,
|
||||||
&irq_domain_simple_ops, NULL);
|
&irq_domain_simple_ops, NULL);
|
||||||
if (!port->domain) {
|
if (!port->domain) {
|
||||||
err = -ENODEV;
|
err = -ENODEV;
|
||||||
|
|
|
||||||
|
|
@ -636,9 +636,9 @@ static int pxa_gpio_probe(struct platform_device *pdev)
|
||||||
if (!pxa_last_gpio)
|
if (!pxa_last_gpio)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
pchip->irqdomain = irq_domain_add_legacy(pdev->dev.of_node,
|
pchip->irqdomain = irq_domain_create_legacy(of_fwnode_handle(pdev->dev.of_node),
|
||||||
pxa_last_gpio + 1, irq_base,
|
pxa_last_gpio + 1, irq_base, 0,
|
||||||
0, &pxa_irq_domain_ops, pchip);
|
&pxa_irq_domain_ops, pchip);
|
||||||
if (!pchip->irqdomain)
|
if (!pchip->irqdomain)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -521,7 +521,7 @@ static int rockchip_interrupts_register(struct rockchip_pin_bank *bank)
|
||||||
struct irq_chip_generic *gc;
|
struct irq_chip_generic *gc;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
bank->domain = irq_domain_add_linear(bank->of_node, 32,
|
bank->domain = irq_domain_create_linear(of_fwnode_handle(bank->of_node), 32,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!bank->domain) {
|
if (!bank->domain) {
|
||||||
dev_warn(bank->dev, "could not init irq domain for bank %s\n",
|
dev_warn(bank->dev, "could not init irq domain for bank %s\n",
|
||||||
|
|
|
||||||
|
|
@ -319,7 +319,7 @@ void __init sa1100_init_gpio(void)
|
||||||
|
|
||||||
gpiochip_add_data(&sa1100_gpio_chip.chip, NULL);
|
gpiochip_add_data(&sa1100_gpio_chip.chip, NULL);
|
||||||
|
|
||||||
sa1100_gpio_irqdomain = irq_domain_add_simple(NULL,
|
sa1100_gpio_irqdomain = irq_domain_create_simple(NULL,
|
||||||
28, IRQ_GPIO0,
|
28, IRQ_GPIO0,
|
||||||
&sa1100_gpio_irqdomain_ops, sgc);
|
&sa1100_gpio_irqdomain_ops, sgc);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -169,7 +169,7 @@ static int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd,
|
||||||
IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST,
|
IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST,
|
||||||
IRQ_LEVEL | IRQ_NOPROBE);
|
IRQ_LEVEL | IRQ_NOPROBE);
|
||||||
|
|
||||||
sd->id = irq_domain_add_legacy(pdev->dev.of_node, SDV_NUM_PUB_GPIOS,
|
sd->id = irq_domain_create_legacy(of_fwnode_handle(pdev->dev.of_node), SDV_NUM_PUB_GPIOS,
|
||||||
sd->irq_base, 0, &irq_domain_sdv_ops, sd);
|
sd->irq_base, 0, &irq_domain_sdv_ops, sd);
|
||||||
if (!sd->id)
|
if (!sd->id)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
|
||||||
|
|
@ -183,7 +183,7 @@ static int tb10x_gpio_probe(struct platform_device *pdev)
|
||||||
if (ret != 0)
|
if (ret != 0)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
tb10x_gpio->domain = irq_domain_add_linear(np,
|
tb10x_gpio->domain = irq_domain_create_linear(of_fwnode_handle(np),
|
||||||
tb10x_gpio->gc.ngpio,
|
tb10x_gpio->gc.ngpio,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!tb10x_gpio->domain) {
|
if (!tb10x_gpio->domain) {
|
||||||
|
|
|
||||||
|
|
@ -502,7 +502,6 @@ static void gpio_twl4030_power_off_action(void *data)
|
||||||
static int gpio_twl4030_probe(struct platform_device *pdev)
|
static int gpio_twl4030_probe(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
struct twl4030_gpio_platform_data *pdata;
|
struct twl4030_gpio_platform_data *pdata;
|
||||||
struct device_node *node = pdev->dev.of_node;
|
|
||||||
struct gpio_twl4030_priv *priv;
|
struct gpio_twl4030_priv *priv;
|
||||||
int ret, irq_base;
|
int ret, irq_base;
|
||||||
|
|
||||||
|
|
@ -524,7 +523,7 @@ static int gpio_twl4030_probe(struct platform_device *pdev)
|
||||||
return irq_base;
|
return irq_base;
|
||||||
}
|
}
|
||||||
|
|
||||||
irq_domain_add_legacy(node, TWL4030_GPIO_MAX, irq_base, 0,
|
irq_domain_create_legacy(of_fwnode_handle(pdev->dev.of_node), TWL4030_GPIO_MAX, irq_base, 0,
|
||||||
&irq_domain_simple_ops, NULL);
|
&irq_domain_simple_ops, NULL);
|
||||||
|
|
||||||
ret = twl4030_sih_setup(&pdev->dev, TWL4030_MODULE_GPIO, irq_base);
|
ret = twl4030_sih_setup(&pdev->dev, TWL4030_MODULE_GPIO, irq_base);
|
||||||
|
|
|
||||||
|
|
@ -725,7 +725,7 @@ static const struct irq_domain_ops amdgpu_hw_irqdomain_ops = {
|
||||||
*/
|
*/
|
||||||
int amdgpu_irq_add_domain(struct amdgpu_device *adev)
|
int amdgpu_irq_add_domain(struct amdgpu_device *adev)
|
||||||
{
|
{
|
||||||
adev->irq.domain = irq_domain_add_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID,
|
adev->irq.domain = irq_domain_create_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID,
|
||||||
&amdgpu_hw_irqdomain_ops, adev);
|
&amdgpu_hw_irqdomain_ops, adev);
|
||||||
if (!adev->irq.domain) {
|
if (!adev->irq.domain) {
|
||||||
DRM_ERROR("GPU irq add domain failed\n");
|
DRM_ERROR("GPU irq add domain failed\n");
|
||||||
|
|
|
||||||
|
|
@ -150,7 +150,7 @@ static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss)
|
||||||
|
|
||||||
dev = msm_mdss->dev;
|
dev = msm_mdss->dev;
|
||||||
|
|
||||||
domain = irq_domain_add_linear(dev->of_node, 32,
|
domain = irq_domain_create_linear(of_fwnode_handle(dev->of_node), 32,
|
||||||
&msm_mdss_irqdomain_ops, msm_mdss);
|
&msm_mdss_irqdomain_ops, msm_mdss);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
dev_err(dev, "failed to add irq_domain\n");
|
dev_err(dev, "failed to add irq_domain\n");
|
||||||
|
|
|
||||||
|
|
@ -1008,7 +1008,7 @@ int ipu_map_irq(struct ipu_soc *ipu, int irq)
|
||||||
{
|
{
|
||||||
int virq;
|
int virq;
|
||||||
|
|
||||||
virq = irq_linear_revmap(ipu->domain, irq);
|
virq = irq_find_mapping(ipu->domain, irq);
|
||||||
if (!virq)
|
if (!virq)
|
||||||
virq = irq_create_mapping(ipu->domain, irq);
|
virq = irq_create_mapping(ipu->domain, irq);
|
||||||
|
|
||||||
|
|
@ -1169,7 +1169,7 @@ static int ipu_irq_init(struct ipu_soc *ipu)
|
||||||
};
|
};
|
||||||
int ret, i;
|
int ret, i;
|
||||||
|
|
||||||
ipu->domain = irq_domain_add_linear(ipu->dev->of_node, IPU_NUM_IRQS,
|
ipu->domain = irq_domain_create_linear(of_fwnode_handle(ipu->dev->of_node), IPU_NUM_IRQS,
|
||||||
&irq_generic_chip_ops, ipu);
|
&irq_generic_chip_ops, ipu);
|
||||||
if (!ipu->domain) {
|
if (!ipu->domain) {
|
||||||
dev_err(ipu->dev, "failed to add irq domain\n");
|
dev_err(ipu->dev, "failed to add irq domain\n");
|
||||||
|
|
@ -1219,7 +1219,7 @@ static void ipu_irq_exit(struct ipu_soc *ipu)
|
||||||
/* TODO: remove irq_domain_generic_chips */
|
/* TODO: remove irq_domain_generic_chips */
|
||||||
|
|
||||||
for (i = 0; i < IPU_NUM_IRQS; i++) {
|
for (i = 0; i < IPU_NUM_IRQS; i++) {
|
||||||
irq = irq_linear_revmap(ipu->domain, i);
|
irq = irq_find_mapping(ipu->domain, i);
|
||||||
if (irq)
|
if (irq)
|
||||||
irq_dispose_mapping(irq);
|
irq_dispose_mapping(irq);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -467,7 +467,7 @@ static int cht_wc_i2c_adap_i2c_probe(struct platform_device *pdev)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
/* Alloc and register client IRQ */
|
/* Alloc and register client IRQ */
|
||||||
adap->irq_domain = irq_domain_add_linear(NULL, 1, &irq_domain_simple_ops, NULL);
|
adap->irq_domain = irq_domain_create_linear(NULL, 1, &irq_domain_simple_ops, NULL);
|
||||||
if (!adap->irq_domain)
|
if (!adap->irq_domain)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -442,7 +442,7 @@ static int pca954x_irq_setup(struct i2c_mux_core *muxc)
|
||||||
|
|
||||||
raw_spin_lock_init(&data->lock);
|
raw_spin_lock_init(&data->lock);
|
||||||
|
|
||||||
data->irq = irq_domain_add_linear(client->dev.of_node,
|
data->irq = irq_domain_create_linear(of_fwnode_handle(client->dev.of_node),
|
||||||
data->chip->nchans,
|
data->chip->nchans,
|
||||||
&irq_domain_simple_ops, data);
|
&irq_domain_simple_ops, data);
|
||||||
if (!data->irq)
|
if (!data->irq)
|
||||||
|
|
|
||||||
|
|
@ -421,7 +421,8 @@ static int stm32_adc_irq_probe(struct platform_device *pdev,
|
||||||
return priv->irq[i];
|
return priv->irq[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
priv->domain = irq_domain_add_simple(np, STM32_ADC_MAX_ADCS, 0,
|
priv->domain = irq_domain_create_simple(of_fwnode_handle(np),
|
||||||
|
STM32_ADC_MAX_ADCS, 0,
|
||||||
&stm32_adc_domain_ops,
|
&stm32_adc_domain_ops,
|
||||||
priv);
|
priv);
|
||||||
if (!priv->domain) {
|
if (!priv->domain) {
|
||||||
|
|
|
||||||
|
|
@ -180,7 +180,7 @@ static void __init combiner_init(void __iomem *combiner_base,
|
||||||
if (!combiner_data)
|
if (!combiner_data)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
combiner_irq_domain = irq_domain_add_linear(np, nr_irq,
|
combiner_irq_domain = irq_domain_create_linear(of_fwnode_handle(np), nr_irq,
|
||||||
&combiner_irq_domain_ops, combiner_data);
|
&combiner_irq_domain_ops, combiner_data);
|
||||||
if (WARN_ON(!combiner_irq_domain)) {
|
if (WARN_ON(!combiner_irq_domain)) {
|
||||||
pr_warn("%s: irq domain init failed\n", __func__);
|
pr_warn("%s: irq domain init failed\n", __func__);
|
||||||
|
|
|
||||||
|
|
@ -131,7 +131,7 @@ static int al_fic_register(struct device_node *node,
|
||||||
struct irq_chip_generic *gc;
|
struct irq_chip_generic *gc;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
fic->domain = irq_domain_add_linear(node,
|
fic->domain = irq_domain_create_linear(of_fwnode_handle(node),
|
||||||
NR_FIC_IRQS,
|
NR_FIC_IRQS,
|
||||||
&irq_generic_chip_ops,
|
&irq_generic_chip_ops,
|
||||||
fic);
|
fic);
|
||||||
|
|
|
||||||
|
|
@ -205,15 +205,14 @@ static int alpine_msix_init_domains(struct alpine_msix_data *priv,
|
||||||
return -ENXIO;
|
return -ENXIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
middle_domain = irq_domain_add_hierarchy(gic_domain, 0, 0, NULL,
|
middle_domain = irq_domain_create_hierarchy(gic_domain, 0, 0, NULL,
|
||||||
&alpine_msix_middle_domain_ops,
|
&alpine_msix_middle_domain_ops, priv);
|
||||||
priv);
|
|
||||||
if (!middle_domain) {
|
if (!middle_domain) {
|
||||||
pr_err("Failed to create the MSIX middle domain\n");
|
pr_err("Failed to create the MSIX middle domain\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(node),
|
msi_domain = pci_msi_create_irq_domain(of_fwnode_handle(node),
|
||||||
&alpine_msix_domain_info,
|
&alpine_msix_domain_info,
|
||||||
middle_domain);
|
middle_domain);
|
||||||
if (!msi_domain) {
|
if (!msi_domain) {
|
||||||
|
|
|
||||||
|
|
@ -1014,7 +1014,7 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p
|
||||||
|
|
||||||
irqc->info.die_stride = off - start_off;
|
irqc->info.die_stride = off - start_off;
|
||||||
|
|
||||||
irqc->hw_domain = irq_domain_create_tree(of_node_to_fwnode(node),
|
irqc->hw_domain = irq_domain_create_tree(of_fwnode_handle(node),
|
||||||
&aic_irq_domain_ops, irqc);
|
&aic_irq_domain_ops, irqc);
|
||||||
if (WARN_ON(!irqc->hw_domain))
|
if (WARN_ON(!irqc->hw_domain))
|
||||||
goto err_unmap;
|
goto err_unmap;
|
||||||
|
|
@ -1067,7 +1067,7 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p
|
||||||
|
|
||||||
if (is_kernel_in_hyp_mode()) {
|
if (is_kernel_in_hyp_mode()) {
|
||||||
struct irq_fwspec mi = {
|
struct irq_fwspec mi = {
|
||||||
.fwnode = of_node_to_fwnode(node),
|
.fwnode = of_fwnode_handle(node),
|
||||||
.param_count = 3,
|
.param_count = 3,
|
||||||
.param = {
|
.param = {
|
||||||
[0] = AIC_FIQ, /* This is a lie */
|
[0] = AIC_FIQ, /* This is a lie */
|
||||||
|
|
|
||||||
|
|
@ -348,12 +348,12 @@ static int __init mpic_msi_init(struct mpic *mpic, struct device_node *node,
|
||||||
mpic->msi_doorbell_mask = PCI_MSI_FULL_DOORBELL_MASK;
|
mpic->msi_doorbell_mask = PCI_MSI_FULL_DOORBELL_MASK;
|
||||||
}
|
}
|
||||||
|
|
||||||
mpic->msi_inner_domain = irq_domain_add_linear(NULL, mpic->msi_doorbell_size,
|
mpic->msi_inner_domain = irq_domain_create_linear(NULL, mpic->msi_doorbell_size,
|
||||||
&mpic_msi_domain_ops, mpic);
|
&mpic_msi_domain_ops, mpic);
|
||||||
if (!mpic->msi_inner_domain)
|
if (!mpic->msi_inner_domain)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
mpic->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(node), &mpic_msi_domain_info,
|
mpic->msi_domain = pci_msi_create_irq_domain(of_fwnode_handle(node), &mpic_msi_domain_info,
|
||||||
mpic->msi_inner_domain);
|
mpic->msi_inner_domain);
|
||||||
if (!mpic->msi_domain) {
|
if (!mpic->msi_domain) {
|
||||||
irq_domain_remove(mpic->msi_inner_domain);
|
irq_domain_remove(mpic->msi_inner_domain);
|
||||||
|
|
@ -492,7 +492,7 @@ static int __init mpic_ipi_init(struct mpic *mpic, struct device_node *node)
|
||||||
{
|
{
|
||||||
int base_ipi;
|
int base_ipi;
|
||||||
|
|
||||||
mpic->ipi_domain = irq_domain_create_linear(of_node_to_fwnode(node), IPI_DOORBELL_NR,
|
mpic->ipi_domain = irq_domain_create_linear(of_fwnode_handle(node), IPI_DOORBELL_NR,
|
||||||
&mpic_ipi_domain_ops, mpic);
|
&mpic_ipi_domain_ops, mpic);
|
||||||
if (WARN_ON(!mpic->ipi_domain))
|
if (WARN_ON(!mpic->ipi_domain))
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
@ -546,7 +546,7 @@ static void mpic_reenable_percpu(struct mpic *mpic)
|
||||||
{
|
{
|
||||||
/* Re-enable per-CPU interrupts that were enabled before suspend */
|
/* Re-enable per-CPU interrupts that were enabled before suspend */
|
||||||
for (irq_hw_number_t i = 0; i < MPIC_PER_CPU_IRQS_NR; i++) {
|
for (irq_hw_number_t i = 0; i < MPIC_PER_CPU_IRQS_NR; i++) {
|
||||||
unsigned int virq = irq_linear_revmap(mpic->domain, i);
|
unsigned int virq = irq_find_mapping(mpic->domain, i);
|
||||||
struct irq_data *d;
|
struct irq_data *d;
|
||||||
|
|
||||||
if (!virq || !irq_percpu_is_enabled(virq))
|
if (!virq || !irq_percpu_is_enabled(virq))
|
||||||
|
|
@ -740,7 +740,7 @@ static void mpic_resume(void)
|
||||||
|
|
||||||
/* Re-enable interrupts */
|
/* Re-enable interrupts */
|
||||||
for (irq_hw_number_t i = 0; i < mpic->domain->hwirq_max; i++) {
|
for (irq_hw_number_t i = 0; i < mpic->domain->hwirq_max; i++) {
|
||||||
unsigned int virq = irq_linear_revmap(mpic->domain, i);
|
unsigned int virq = irq_find_mapping(mpic->domain, i);
|
||||||
struct irq_data *d;
|
struct irq_data *d;
|
||||||
|
|
||||||
if (!virq)
|
if (!virq)
|
||||||
|
|
@ -861,7 +861,7 @@ static int __init mpic_of_init(struct device_node *node, struct device_node *par
|
||||||
if (!mpic_is_ipi_available(mpic))
|
if (!mpic_is_ipi_available(mpic))
|
||||||
nr_irqs = MPIC_PER_CPU_IRQS_NR;
|
nr_irqs = MPIC_PER_CPU_IRQS_NR;
|
||||||
|
|
||||||
mpic->domain = irq_domain_add_linear(node, nr_irqs, &mpic_irq_ops, mpic);
|
mpic->domain = irq_domain_create_linear(of_fwnode_handle(node), nr_irqs, &mpic_irq_ops, mpic);
|
||||||
if (!mpic->domain) {
|
if (!mpic->domain) {
|
||||||
pr_err("%pOF: Unable to add IRQ domain\n", node);
|
pr_err("%pOF: Unable to add IRQ domain\n", node);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -82,7 +82,7 @@ static int __init aspeed_i2c_ic_of_init(struct device_node *node,
|
||||||
goto err_iounmap;
|
goto err_iounmap;
|
||||||
}
|
}
|
||||||
|
|
||||||
i2c_ic->irq_domain = irq_domain_add_linear(node, ASPEED_I2C_IC_NUM_BUS,
|
i2c_ic->irq_domain = irq_domain_create_linear(of_fwnode_handle(node), ASPEED_I2C_IC_NUM_BUS,
|
||||||
&aspeed_i2c_ic_irq_domain_ops,
|
&aspeed_i2c_ic_irq_domain_ops,
|
||||||
NULL);
|
NULL);
|
||||||
if (!i2c_ic->irq_domain) {
|
if (!i2c_ic->irq_domain) {
|
||||||
|
|
|
||||||
|
|
@ -102,7 +102,7 @@ static int __init aspeed_intc_ic_of_init(struct device_node *node,
|
||||||
writel(0xffffffff, intc_ic->base + INTC_INT_STATUS_REG);
|
writel(0xffffffff, intc_ic->base + INTC_INT_STATUS_REG);
|
||||||
writel(0x0, intc_ic->base + INTC_INT_ENABLE_REG);
|
writel(0x0, intc_ic->base + INTC_INT_ENABLE_REG);
|
||||||
|
|
||||||
intc_ic->irq_domain = irq_domain_add_linear(node, INTC_IRQS_PER_WORD,
|
intc_ic->irq_domain = irq_domain_create_linear(of_fwnode_handle(node), INTC_IRQS_PER_WORD,
|
||||||
&aspeed_intc_ic_irq_domain_ops, intc_ic);
|
&aspeed_intc_ic_irq_domain_ops, intc_ic);
|
||||||
if (!intc_ic->irq_domain) {
|
if (!intc_ic->irq_domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -165,7 +165,7 @@ static int aspeed_scu_ic_of_init_common(struct aspeed_scu_ic *scu_ic,
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
|
|
||||||
scu_ic->irq_domain = irq_domain_add_linear(node, scu_ic->num_irqs,
|
scu_ic->irq_domain = irq_domain_create_linear(of_fwnode_handle(node), scu_ic->num_irqs,
|
||||||
&aspeed_scu_ic_domain_ops,
|
&aspeed_scu_ic_domain_ops,
|
||||||
scu_ic);
|
scu_ic);
|
||||||
if (!scu_ic->irq_domain) {
|
if (!scu_ic->irq_domain) {
|
||||||
|
|
|
||||||
|
|
@ -211,7 +211,7 @@ static int __init avic_of_init(struct device_node *node,
|
||||||
set_handle_irq(avic_handle_irq);
|
set_handle_irq(avic_handle_irq);
|
||||||
|
|
||||||
/* Register our domain */
|
/* Register our domain */
|
||||||
vic->dom = irq_domain_add_simple(node, NUM_IRQS, 0,
|
vic->dom = irq_domain_create_simple(of_fwnode_handle(node), NUM_IRQS, 0,
|
||||||
&avic_dom_ops, vic);
|
&avic_dom_ops, vic);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
||||||
|
|
@ -147,7 +147,7 @@ static int __init ath79_misc_intc_of_init(
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_linear(node, ATH79_MISC_IRQ_COUNT,
|
domain = irq_domain_create_linear(of_fwnode_handle(node), ATH79_MISC_IRQ_COUNT,
|
||||||
&misc_irq_domain_ops, base);
|
&misc_irq_domain_ops, base);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("Failed to add MISC irqdomain\n");
|
pr_err("Failed to add MISC irqdomain\n");
|
||||||
|
|
@ -188,7 +188,7 @@ void __init ath79_misc_irq_init(void __iomem *regs, int irq,
|
||||||
else
|
else
|
||||||
ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
|
ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
|
||||||
|
|
||||||
domain = irq_domain_add_legacy(NULL, ATH79_MISC_IRQ_COUNT,
|
domain = irq_domain_create_legacy(NULL, ATH79_MISC_IRQ_COUNT,
|
||||||
irq_base, 0, &misc_irq_domain_ops, regs);
|
irq_base, 0, &misc_irq_domain_ops, regs);
|
||||||
if (!domain)
|
if (!domain)
|
||||||
panic("Failed to create MISC irqdomain");
|
panic("Failed to create MISC irqdomain");
|
||||||
|
|
|
||||||
|
|
@ -228,7 +228,7 @@ struct irq_domain *__init aic_common_of_init(struct device_node *node,
|
||||||
goto err_iounmap;
|
goto err_iounmap;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_linear(node, nchips * 32, ops, aic);
|
domain = irq_domain_create_linear(of_fwnode_handle(node), nchips * 32, ops, aic);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
goto err_free_aic;
|
goto err_free_aic;
|
||||||
|
|
|
||||||
|
|
@ -174,7 +174,7 @@ static int mip_init_domains(struct mip_priv *mip, struct device_node *np)
|
||||||
{
|
{
|
||||||
struct irq_domain *middle;
|
struct irq_domain *middle;
|
||||||
|
|
||||||
middle = irq_domain_add_hierarchy(mip->parent, 0, mip->num_msis, np,
|
middle = irq_domain_create_hierarchy(mip->parent, 0, mip->num_msis, of_fwnode_handle(np),
|
||||||
&mip_middle_domain_ops, mip);
|
&mip_middle_domain_ops, mip);
|
||||||
if (!middle)
|
if (!middle)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -144,7 +144,7 @@ static int __init armctrl_of_init(struct device_node *node,
|
||||||
if (!base)
|
if (!base)
|
||||||
panic("%pOF: unable to map IC registers\n", node);
|
panic("%pOF: unable to map IC registers\n", node);
|
||||||
|
|
||||||
intc.domain = irq_domain_add_linear(node, MAKE_HWIRQ(NR_BANKS, 0),
|
intc.domain = irq_domain_create_linear(of_fwnode_handle(node), MAKE_HWIRQ(NR_BANKS, 0),
|
||||||
&armctrl_ops, NULL);
|
&armctrl_ops, NULL);
|
||||||
if (!intc.domain)
|
if (!intc.domain)
|
||||||
panic("%pOF: unable to create IRQ domain\n", node);
|
panic("%pOF: unable to create IRQ domain\n", node);
|
||||||
|
|
|
||||||
|
|
@ -325,7 +325,7 @@ static int __init bcm2836_arm_irqchip_l1_intc_of_init(struct device_node *node,
|
||||||
|
|
||||||
bcm2835_init_local_timer_frequency();
|
bcm2835_init_local_timer_frequency();
|
||||||
|
|
||||||
intc.domain = irq_domain_add_linear(node, LAST_IRQ + 1,
|
intc.domain = irq_domain_create_linear(of_fwnode_handle(node), LAST_IRQ + 1,
|
||||||
&bcm2836_arm_irqchip_intc_ops,
|
&bcm2836_arm_irqchip_intc_ops,
|
||||||
NULL);
|
NULL);
|
||||||
if (!intc.domain)
|
if (!intc.domain)
|
||||||
|
|
|
||||||
|
|
@ -316,7 +316,7 @@ static int __init bcm6345_l1_of_init(struct device_node *dn,
|
||||||
|
|
||||||
raw_spin_lock_init(&intc->lock);
|
raw_spin_lock_init(&intc->lock);
|
||||||
|
|
||||||
intc->domain = irq_domain_add_linear(dn, IRQS_PER_WORD * intc->n_words,
|
intc->domain = irq_domain_create_linear(of_fwnode_handle(dn), IRQS_PER_WORD * intc->n_words,
|
||||||
&bcm6345_l1_domain_ops,
|
&bcm6345_l1_domain_ops,
|
||||||
intc);
|
intc);
|
||||||
if (!intc->domain) {
|
if (!intc->domain) {
|
||||||
|
|
|
||||||
|
|
@ -416,7 +416,7 @@ static int __init bcm7038_l1_of_init(struct device_node *dn,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
intc->domain = irq_domain_add_linear(dn, IRQS_PER_WORD * intc->n_words,
|
intc->domain = irq_domain_create_linear(of_fwnode_handle(dn), IRQS_PER_WORD * intc->n_words,
|
||||||
&bcm7038_l1_domain_ops,
|
&bcm7038_l1_domain_ops,
|
||||||
intc);
|
intc);
|
||||||
if (!intc->domain) {
|
if (!intc->domain) {
|
||||||
|
|
|
||||||
|
|
@ -260,7 +260,7 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn,
|
||||||
goto out_free_l1_data;
|
goto out_free_l1_data;
|
||||||
}
|
}
|
||||||
|
|
||||||
data->domain = irq_domain_add_linear(dn, IRQS_PER_WORD * data->n_words,
|
data->domain = irq_domain_create_linear(of_fwnode_handle(dn), IRQS_PER_WORD * data->n_words,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!data->domain) {
|
if (!data->domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -178,7 +178,7 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
|
||||||
goto out_unmap;
|
goto out_unmap;
|
||||||
}
|
}
|
||||||
|
|
||||||
data->domain = irq_domain_add_linear(np, 32,
|
data->domain = irq_domain_create_linear(of_fwnode_handle(np), 32,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!data->domain) {
|
if (!data->domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -184,8 +184,8 @@ static int __init _clps711x_intc_init(struct device_node *np,
|
||||||
clps711x_intc->ops.map = clps711x_intc_irq_map;
|
clps711x_intc->ops.map = clps711x_intc_irq_map;
|
||||||
clps711x_intc->ops.xlate = irq_domain_xlate_onecell;
|
clps711x_intc->ops.xlate = irq_domain_xlate_onecell;
|
||||||
clps711x_intc->domain =
|
clps711x_intc->domain =
|
||||||
irq_domain_add_legacy(np, ARRAY_SIZE(clps711x_irqs),
|
irq_domain_create_legacy(of_fwnode_handle(np), ARRAY_SIZE(clps711x_irqs), 0, 0,
|
||||||
0, 0, &clps711x_intc->ops, NULL);
|
&clps711x_intc->ops, NULL);
|
||||||
if (!clps711x_intc->domain) {
|
if (!clps711x_intc->domain) {
|
||||||
err = -ENOMEM;
|
err = -ENOMEM;
|
||||||
goto out_irqfree;
|
goto out_irqfree;
|
||||||
|
|
|
||||||
|
|
@ -351,10 +351,8 @@ static int __init irqcrossbar_init(struct device_node *node,
|
||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, cb->max_crossbar_sources,
|
||||||
cb->max_crossbar_sources,
|
of_fwnode_handle(node), &crossbar_domain_ops, NULL);
|
||||||
node, &crossbar_domain_ops,
|
|
||||||
NULL);
|
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("%pOF: failed to allocated domain\n", node);
|
pr_err("%pOF: failed to allocated domain\n", node);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -113,7 +113,7 @@ ck_intc_init_comm(struct device_node *node, struct device_node *parent)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
root_domain = irq_domain_add_linear(node, nr_irq,
|
root_domain = irq_domain_create_linear(of_fwnode_handle(node), nr_irq,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!root_domain) {
|
if (!root_domain) {
|
||||||
pr_err("C-SKY Intc irq_domain_add failed.\n");
|
pr_err("C-SKY Intc irq_domain_add failed.\n");
|
||||||
|
|
|
||||||
|
|
@ -255,7 +255,7 @@ csky_mpintc_init(struct device_node *node, struct device_node *parent)
|
||||||
writel_relaxed(BIT(0), INTCG_base + INTCG_ICTLR);
|
writel_relaxed(BIT(0), INTCG_base + INTCG_ICTLR);
|
||||||
}
|
}
|
||||||
|
|
||||||
root_domain = irq_domain_add_linear(node, nr_irq, &csky_irqdomain_ops,
|
root_domain = irq_domain_create_linear(of_fwnode_handle(node), nr_irq, &csky_irqdomain_ops,
|
||||||
NULL);
|
NULL);
|
||||||
if (!root_domain)
|
if (!root_domain)
|
||||||
return -ENXIO;
|
return -ENXIO;
|
||||||
|
|
|
||||||
|
|
@ -204,8 +204,10 @@ static int __init davinci_cp_intc_do_init(struct resource *res, unsigned int num
|
||||||
return irq_base;
|
return irq_base;
|
||||||
}
|
}
|
||||||
|
|
||||||
davinci_cp_intc_irq_domain = irq_domain_add_legacy(node, num_irqs, irq_base, 0,
|
davinci_cp_intc_irq_domain = irq_domain_create_legacy(of_fwnode_handle(node), num_irqs,
|
||||||
&davinci_cp_intc_irq_domain_ops, NULL);
|
irq_base, 0,
|
||||||
|
&davinci_cp_intc_irq_domain_ops,
|
||||||
|
NULL);
|
||||||
|
|
||||||
if (!davinci_cp_intc_irq_domain) {
|
if (!davinci_cp_intc_irq_domain) {
|
||||||
pr_err("%s: unable to create an interrupt domain\n", __func__);
|
pr_err("%s: unable to create an interrupt domain\n", __func__);
|
||||||
|
|
|
||||||
|
|
@ -95,7 +95,7 @@ static int __init digicolor_of_init(struct device_node *node,
|
||||||
regmap_write(ucregs, UC_IRQ_CONTROL, 1);
|
regmap_write(ucregs, UC_IRQ_CONTROL, 1);
|
||||||
|
|
||||||
digicolor_irq_domain =
|
digicolor_irq_domain =
|
||||||
irq_domain_add_linear(node, 64, &irq_generic_chip_ops, NULL);
|
irq_domain_create_linear(of_fwnode_handle(node), 64, &irq_generic_chip_ops, NULL);
|
||||||
if (!digicolor_irq_domain) {
|
if (!digicolor_irq_domain) {
|
||||||
pr_err("%pOF: unable to create IRQ domain\n", node);
|
pr_err("%pOF: unable to create IRQ domain\n", node);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue