arm64: dts: renesas: r8a779g0: Add WWDT nodes
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251215034715.3406-13-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>master
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@ -2544,6 +2544,118 @@
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};
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};
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wwdt0: watchdog@ffc90000 {
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compatible = "renesas,r8a779g0-wwdt",
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"renesas,rcar-gen4-wwdt";
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reg = <0 0xffc90000 0 0x10>;
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interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pretimeout", "error";
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clocks = <&cpg CPG_CORE R8A779G0_CLK_R>,
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<&cpg CPG_CORE R8A779G0_CLK_SASYNCRT>;
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clock-names = "cnt", "bus";
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power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
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resets = <&cpg 1200>;
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reset-names = "cnt";
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status = "disabled";
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};
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wwdt1: watchdog@ffca0000 {
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compatible = "renesas,r8a779g0-wwdt",
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"renesas,rcar-gen4-wwdt";
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reg = <0 0xffca0000 0 0x10>;
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interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pretimeout", "error";
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clocks = <&cpg CPG_CORE R8A779G0_CLK_R>,
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<&cpg CPG_CORE R8A779G0_CLK_SASYNCRT>;
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clock-names = "cnt", "bus";
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power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
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resets = <&cpg 1201>;
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reset-names = "cnt";
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status = "disabled";
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};
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wwdt2: watchdog@ffcb0000 {
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compatible = "renesas,r8a779g0-wwdt",
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"renesas,rcar-gen4-wwdt";
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reg = <0 0xffcb0000 0 0x10>;
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interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pretimeout", "error";
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clocks = <&cpg CPG_CORE R8A779G0_CLK_R>,
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<&cpg CPG_CORE R8A779G0_CLK_SASYNCRT>;
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clock-names = "cnt", "bus";
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power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
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resets = <&cpg 1202>;
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reset-names = "cnt";
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status = "disabled";
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};
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wwdt3: watchdog@ffcc0000 {
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compatible = "renesas,r8a779g0-wwdt",
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"renesas,rcar-gen4-wwdt";
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reg = <0 0xffcc0000 0 0x10>;
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interrupts = <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pretimeout", "error";
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clocks = <&cpg CPG_CORE R8A779G0_CLK_R>,
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<&cpg CPG_CORE R8A779G0_CLK_SASYNCRT>;
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clock-names = "cnt", "bus";
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power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
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resets = <&cpg 1203>;
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reset-names = "cnt";
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status = "disabled";
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};
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wwdt4: watchdog@ffcf0000 {
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compatible = "renesas,r8a779g0-wwdt",
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"renesas,rcar-gen4-wwdt";
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reg = <0 0xffcf0000 0 0x10>;
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interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pretimeout", "error";
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clocks = <&cpg CPG_CORE R8A779G0_CLK_R>,
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<&cpg CPG_CORE R8A779G0_CLK_SASYNCRT>;
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clock-names = "cnt", "bus";
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power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
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resets = <&cpg 1204>;
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reset-names = "cnt";
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status = "disabled";
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};
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wwdt5: watchdog@ffef0000 {
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compatible = "renesas,r8a779g0-wwdt",
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"renesas,rcar-gen4-wwdt";
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reg = <0 0xffef0000 0 0x10>;
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interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pretimeout", "error";
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clocks = <&cpg CPG_CORE R8A779G0_CLK_R>,
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<&cpg CPG_CORE R8A779G0_CLK_SASYNCRT>;
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clock-names = "cnt", "bus";
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power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
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resets = <&cpg 1205>;
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reset-names = "cnt";
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status = "disabled";
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};
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wwdt6: watchdog@fff10000 {
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compatible = "renesas,r8a779g0-wwdt",
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"renesas,rcar-gen4-wwdt";
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reg = <0 0xfff10000 0 0x10>;
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interrupts = <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pretimeout", "error";
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clocks = <&cpg CPG_CORE R8A779G0_CLK_R>,
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<&cpg CPG_CORE R8A779G0_CLK_SASYNCRT>;
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clock-names = "cnt", "bus";
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power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
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resets = <&cpg 1206>;
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reset-names = "cnt";
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status = "disabled";
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};
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prr: chipid@fff00044 {
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compatible = "renesas,prr";
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reg = <0 0xfff00044 0 4>;
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