arm64: dts: imx8mp libra: add and update display overlays
Add imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtso devicetree display overlay for the i.MX8MP Libra RDK platform. The overlay enable LVDS display configuration. To keep the consistent style of panel and backlight nodes and labels. They are updated in imx8mp-libra base board devicetree and etml1010g3dra display overlay. Signed-off-by: Yashwanth Varakala <y.varakala@phytec.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>master
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bfc1982c66
commit
3619c5b41e
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@ -225,8 +225,12 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-dl.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-smarc-eval-carrier.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc.dtb
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imx8mp-libra-rdk-fpsc-lvds-dtbs += imx8mp-libra-rdk-fpsc.dtb imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtbo
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds.dtb
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imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra-dtbs += imx8mp-libra-rdk-fpsc.dtb \
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imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtbo
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imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01-dtbs += imx8mp-libra-rdk-fpsc.dtb \
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imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtbo
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-nitrogen-enc-carrier-board.dtb
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@ -34,7 +34,7 @@
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status = "okay";
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};
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&panel0_lvds {
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&panel_lvds0 {
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compatible = "edt,etml1010g3dra";
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status = "okay";
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};
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@ -0,0 +1,44 @@
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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
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/*
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* Copyright (C) 2025 PHYTEC Messtechnik GmbH
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/imx8mp-clock.h>
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/dts-v1/;
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/plugin/;
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&backlight_lvds0 {
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brightness-levels = <0 8 16 32 64 128 255>;
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default-brightness-level = <8>;
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enable-gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
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num-interpolated-steps = <2>;
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pwms = <&pwm1 0 66667 0>;
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status = "okay";
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};
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&lcdif2 {
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status = "okay";
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};
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&lvds_bridge {
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assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
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assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
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/*
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* The LVDS panel uses 66.5 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
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* 66.5 * 7 = 465.5 MHz so the LDB serializer and LCDIFv3 scanout
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* engine can reach accurate pixel clock of exactly 66.5 MHz.
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*/
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assigned-clock-rates = <0>, <465500000>;
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status = "okay";
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};
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&panel_lvds0 {
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compatible = "powertip,ph128800t006-zhc01";
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status = "okay";
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};
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&pwm1 {
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status = "okay";
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};
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@ -15,7 +15,7 @@
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"phytec,imx8mp-phycore-fpsc", "fsl,imx8mp";
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model = "PHYTEC i.MX8MP Libra RDK FPSC";
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backlight_lvds0: backlight0 {
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backlight_lvds0: backlight-lvds0 {
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compatible = "pwm-backlight";
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pinctrl-0 = <&pinctrl_lvds0>;
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pinctrl-names = "default";
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@ -27,7 +27,7 @@
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stdout-path = &uart4;
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};
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panel0_lvds: panel-lvds {
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panel_lvds0: panel-lvds0 {
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/* compatible panel in overlay */
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backlight = <&backlight_lvds0>;
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power-supply = <®_vdd_3v3>;
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