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arm64: dts: imx8mm-kontron: Use GPIO for RS485 transceiver control 

For this IP the correct control of the CTS signal for transceiver direction
switching is difficult and - maybe also buggy - in the driver. Especially
the bootup requires special handling for most hardware implementations.

Therefore we simply use a GPIO now, which is fully under software control
and which is not problematic on bootup.

Signed-off-by: Eberhard Stoll <eberhard.stoll@kontron.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
pull/1354/merge
Eberhard Stoll 2025-07-21 12:05:37 +02:00 committed by Shawn Guo
parent 4fc4ff0240
commit 371a63c192
1 changed files with 10 additions and 2 deletions
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12
arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts
View File

@ -268,8 +268,16 @@
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
/*
* During bootup the CTS needs to stay LOW, which is only possible if this
* pin is controlled by a GPIO. The UART IP always sets CTS to HIGH if not
* running. So using 'uart-has-rtscts' is not a good choice here! There are
* workarounds for this, but they introduce unnecessary complexity and are
* therefore avoided here. For more information about this see:
* https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=79d0224f6bf296d04cd843cfc49921b19c97bb09
*/
rts-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
linux,rs485-enabled-at-boot-time;
uart-has-rtscts;
status = "okay";
};
@ -439,7 +447,7 @@
MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x0
MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x0
MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x0
MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x0
MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19
>;
};