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drm/{i915,xe}/display: move irq calls to parent interface 

Add an irq parent driver interface for the .enabled and .synchronize
calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
multiple places, and subsequently remove the compat i915_irq.h and
i915_irq.c files along with the display/ext directory from xe
altogether.

Introduce new intel_parent.[ch] as the wrapper layer to chase the
function pointers and convert between generic and more specific display
types.

v2: Keep static wrappers in intel_display_irq.c (Ville)

v3: Full blown wrappers in intel_parent.[ch] (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/dd62dd52ef10d9ecf77da3bdf6a70f71193d141c.1763370931.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
master
Jani Nikula 2025-11-17 11:16:10 +02:00
parent a651be53c4
commit 3815e8f2ff
18 changed files with 119 additions and 79 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/i915/Makefile
View File

@ -292,6 +292,7 @@ i915-y += \
display/intel_modeset_verify.o \
display/intel_overlay.o \
display/intel_panic.o \
display/intel_parent.o \
display/intel_pch.o \
display/intel_pch_display.o \
display/intel_pch_refclk.o \

37
drivers/gpu/drm/i915/display/intel_display_irq.c
View File

@ -6,8 +6,6 @@
#include <drm/drm_print.h>
#include <drm/drm_vblank.h>
#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_reg.h"
#include "icl_dsi_regs.h"
#include "intel_crtc.h"
@ -25,6 +23,7 @@
#include "intel_fifo_underrun.h"
#include "intel_gmbus.h"
#include "intel_hotplug_irq.h"
#include "intel_parent.h"
#include "intel_pipe_crc_regs.h"
#include "intel_plane.h"
#include "intel_pmdemand.h"
@ -160,7 +159,6 @@ intel_handle_vblank(struct intel_display *display, enum pipe pipe)
void ilk_update_display_irq(struct intel_display *display,
u32 interrupt_mask, u32 enabled_irq_mask)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 new_val;
lockdep_assert_held(&display->irq.lock);
@ -171,7 +169,7 @@ void ilk_update_display_irq(struct intel_display *display,
new_val |= (~enabled_irq_mask & interrupt_mask);
if (new_val != display->irq.ilk_de_imr_mask &&
!drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) {
!drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display))) {
display->irq.ilk_de_imr_mask = new_val;
intel_de_write(display, DEIMR, display->irq.ilk_de_imr_mask);
intel_de_posting_read(display, DEIMR);
@ -197,7 +195,6 @@ void ilk_disable_display_irq(struct intel_display *display, u32 bits)
void bdw_update_port_irq(struct intel_display *display,
u32 interrupt_mask, u32 enabled_irq_mask)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 new_val;
u32 old_val;
@ -205,7 +202,7 @@ void bdw_update_port_irq(struct intel_display *display,
drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
return;
old_val = intel_de_read(display, GEN8_DE_PORT_IMR);
@ -231,14 +228,13 @@ static void bdw_update_pipe_irq(struct intel_display *display,
enum pipe pipe, u32 interrupt_mask,
u32 enabled_irq_mask)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 new_val;
lockdep_assert_held(&display->irq.lock);
drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
return;
new_val = display->irq.de_pipe_imr_mask[pipe];
@ -274,7 +270,6 @@ void ibx_display_interrupt_update(struct intel_display *display,
u32 interrupt_mask,
u32 enabled_irq_mask)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 sdeimr = intel_de_read(display, SDEIMR);
sdeimr &= ~interrupt_mask;
@ -284,7 +279,7 @@ void ibx_display_interrupt_update(struct intel_display *display,
lockdep_assert_held(&display->irq.lock);
if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
return;
intel_de_write(display, SDEIMR, sdeimr);
@ -348,7 +343,6 @@ out:
void i915_enable_pipestat(struct intel_display *display,
enum pipe pipe, u32 status_mask)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
i915_reg_t reg = PIPESTAT(display, pipe);
u32 enable_mask;
@ -357,7 +351,7 @@ void i915_enable_pipestat(struct intel_display *display,
pipe_name(pipe), status_mask);
lockdep_assert_held(&display->irq.lock);
drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display));
if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
return;
@ -372,7 +366,6 @@ void i915_enable_pipestat(struct intel_display *display,
void i915_disable_pipestat(struct intel_display *display,
enum pipe pipe, u32 status_mask)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
i915_reg_t reg = PIPESTAT(display, pipe);
u32 enable_mask;
@ -381,7 +374,7 @@ void i915_disable_pipestat(struct intel_display *display,
pipe_name(pipe), status_mask);
lockdep_assert_held(&display->irq.lock);
drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display));
if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)
return;
@ -2174,14 +2167,13 @@ void gen11_display_irq_reset(struct intel_display *display)
void gen8_irq_power_well_post_enable(struct intel_display *display,
u8 pipe_mask)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN |
gen8_de_pipe_flip_done_mask(display);
enum pipe pipe;
spin_lock_irq(&display->irq.lock);
if (!intel_irqs_enabled(dev_priv)) {
if (!intel_parent_irq_enabled(display)) {
spin_unlock_irq(&display->irq.lock);
return;
}
@ -2197,12 +2189,11 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
void gen8_irq_power_well_pre_disable(struct intel_display *display,
u8 pipe_mask)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
enum pipe pipe;
spin_lock_irq(&display->irq.lock);
if (!intel_irqs_enabled(dev_priv)) {
if (!intel_parent_irq_enabled(display)) {
spin_unlock_irq(&display->irq.lock);
return;
}
@ -2213,7 +2204,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
spin_unlock_irq(&display->irq.lock);
/* make sure we're done processing display irqs */
intel_synchronize_irq(dev_priv);
intel_parent_irq_synchronize(display);
}
/*
@ -2246,8 +2237,6 @@ static void ibx_irq_postinstall(struct intel_display *display)
void valleyview_enable_display_irqs(struct intel_display *display)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
spin_lock_irq(&display->irq.lock);
if (display->irq.vlv_display_irqs_enabled)
@ -2255,7 +2244,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
display->irq.vlv_display_irqs_enabled = true;
if (intel_irqs_enabled(dev_priv)) {
if (intel_parent_irq_enabled(display)) {
_vlv_display_irq_reset(display);
_vlv_display_irq_postinstall(display);
}
@ -2266,8 +2255,6 @@ out:
void valleyview_disable_display_irqs(struct intel_display *display)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
spin_lock_irq(&display->irq.lock);
if (!display->irq.vlv_display_irqs_enabled)
@ -2275,7 +2262,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
display->irq.vlv_display_irqs_enabled = false;
if (intel_irqs_enabled(dev_priv))
if (intel_parent_irq_enabled(display))
_vlv_display_irq_reset(display);
out:
spin_unlock_irq(&display->irq.lock);

5
drivers/gpu/drm/i915/display/intel_display_power.c
View File

@ -11,7 +11,6 @@
#include "soc/intel_dram.h"
#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_backlight_regs.h"
#include "intel_cdclk.h"
@ -27,6 +26,7 @@
#include "intel_display_utils.h"
#include "intel_dmc.h"
#include "intel_mchbar_regs.h"
#include "intel_parent.h"
#include "intel_pch_refclk.h"
#include "intel_pcode.h"
#include "intel_pmdemand.h"
@ -1202,7 +1202,6 @@ static void hsw_assert_cdclk(struct intel_display *display)
static void assert_can_disable_lcpll(struct intel_display *display)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
for_each_intel_crtc(display->drm, crtc)
@ -1247,7 +1246,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
* gen-specific and since we only disable LCPLL after we fully disable
* the interrupts, the check below should be enough.
*/
INTEL_DISPLAY_STATE_WARN(display, intel_irqs_enabled(dev_priv),
INTEL_DISPLAY_STATE_WARN(display, intel_parent_irq_enabled(display),
"IRQs enabled\n");
}

15
drivers/gpu/drm/i915/display/intel_display_power_well.c
View File

@ -7,8 +7,6 @@
#include <drm/drm_print.h>
#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_backlight_regs.h"
#include "intel_combo_phy.h"
@ -28,6 +26,7 @@
#include "intel_dpio_phy.h"
#include "intel_dpll.h"
#include "intel_hotplug.h"
#include "intel_parent.h"
#include "intel_pcode.h"
#include "intel_pps.h"
#include "intel_psr.h"
@ -628,8 +627,6 @@ static bool hsw_power_well_enabled(struct intel_display *display,
static void assert_can_enable_dc9(struct intel_display *display)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
drm_WARN_ONCE(display->drm,
(intel_de_read(display, DC_STATE_EN) & DC_STATE_EN_DC9),
"DC9 already programmed to be enabled.\n");
@ -641,7 +638,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
intel_de_read(display, HSW_PWR_WELL_CTL2) &
HSW_PWR_WELL_CTL_REQ(SKL_PW_CTL_IDX_PW_2),
"Power well 2 on.\n");
drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
drm_WARN_ONCE(display->drm, intel_parent_irq_enabled(display),
"Interrupts not disabled yet.\n");
/*
@ -655,9 +652,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
static void assert_can_disable_dc9(struct intel_display *display)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
drm_WARN_ONCE(display->drm, intel_parent_irq_enabled(display),
"Interrupts not disabled yet.\n");
drm_WARN_ONCE(display->drm,
intel_de_read(display, DC_STATE_EN) &
@ -1281,12 +1276,10 @@ static void vlv_display_power_well_init(struct intel_display *display)
static void vlv_display_power_well_deinit(struct intel_display *display)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
valleyview_disable_display_irqs(display);
/* make sure we're done processing display irqs */
intel_synchronize_irq(dev_priv);
intel_parent_irq_synchronize(display);
vlv_pps_reset_all(display);

6
drivers/gpu/drm/i915/display/intel_gmbus.c
View File

@ -35,8 +35,6 @@
#include <drm/drm_print.h>
#include <drm/display/drm_hdcp_helper.h>
#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_de.h"
#include "intel_display_regs.h"
@ -44,6 +42,7 @@
#include "intel_display_wa.h"
#include "intel_gmbus.h"
#include "intel_gmbus_regs.h"
#include "intel_parent.h"
struct intel_gmbus {
struct i2c_adapter adapter;
@ -391,12 +390,11 @@ intel_gpio_setup(struct intel_gmbus *bus, i915_reg_t gpio_reg)
static bool has_gmbus_irq(struct intel_display *display)
{
struct drm_i915_private *i915 = to_i915(display->drm);
/*
* encoder->shutdown() may want to use GMBUS
* after irqs have already been disabled.
*/
return HAS_GMBUS_IRQ(display) && intel_irqs_enabled(i915);
return HAS_GMBUS_IRQ(display) && intel_parent_irq_enabled(display);
}
static int gmbus_wait(struct intel_display *display, u32 status, u32 irq_en)

6
drivers/gpu/drm/i915/display/intel_hotplug.c
View File

@ -27,8 +27,6 @@
#include <drm/drm_print.h>
#include <drm/drm_probe_helper.h>
#include "i915_drv.h"
#include "i915_irq.h"
#include "intel_connector.h"
#include "intel_display_core.h"
#include "intel_display_power.h"
@ -39,6 +37,7 @@
#include "intel_hdcp.h"
#include "intel_hotplug.h"
#include "intel_hotplug_irq.h"
#include "intel_parent.h"
/**
* DOC: Hotplug
@ -1177,13 +1176,12 @@ bool intel_hpd_schedule_detection(struct intel_display *display)
static int i915_hpd_storm_ctl_show(struct seq_file *m, void *data)
{
struct intel_display *display = m->private;
struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_hotplug *hotplug = &display->hotplug;
/* Synchronize with everything first in case there's been an HPD
* storm, but we haven't finished handling it in the kernel yet
*/
intel_synchronize_irq(dev_priv);
intel_parent_irq_synchronize(display);
flush_work(&display->hotplug.dig_port_work);
flush_delayed_work(&display->hotplug.hotplug_work);

1
drivers/gpu/drm/i915/display/intel_lpe_audio.c
View File

@ -71,7 +71,6 @@
#include <drm/drm_print.h>
#include <drm/intel/intel_lpe_audio.h>
#include "i915_irq.h"
#include "intel_audio_regs.h"
#include "intel_de.h"
#include "intel_lpe_audio.h"

33
drivers/gpu/drm/i915/display/intel_parent.c Normal file
View File

@ -0,0 +1,33 @@
// SPDX-License-Identifier: MIT
/* Copyright © 2025 Intel Corporation */
/*
* Convenience wrapper functions to call the parent interface functions:
*
* - display->parent->SUBSTRUCT->FUNCTION()
* - display->parent->FUNCTION()
*
* All functions here should be named accordingly:
*
* - intel_parent_SUBSTRUCT_FUNCTION()
* - intel_parent_FUNCTION()
*
* These functions may use display driver specific types for parameters and
* return values, translating them to and from the generic types used in the
* function pointer interface.
*/
#include <drm/intel/display_parent_interface.h>
#include "intel_display_core.h"
#include "intel_parent.h"
bool intel_parent_irq_enabled(struct intel_display *display)
{
return display->parent->irq->enabled(display->drm);
}
void intel_parent_irq_synchronize(struct intel_display *display)
{
display->parent->irq->synchronize(display->drm);
}

14
drivers/gpu/drm/i915/display/intel_parent.h Normal file
View File

@ -0,0 +1,14 @@
/* SPDX-License-Identifier: MIT */
/* Copyright © 2025 Intel Corporation */
#ifndef __INTEL_PARENT_H__
#define __INTEL_PARENT_H__
#include <linux/types.h>
struct intel_display;
bool intel_parent_irq_enabled(struct intel_display *display);
void intel_parent_irq_synchronize(struct intel_display *display);
#endif /* __INTEL_PARENT_H__ */

6
drivers/gpu/drm/i915/display/intel_pipe_crc.c
View File

@ -30,13 +30,12 @@
#include <drm/drm_print.h>
#include "i915_drv.h"
#include "i915_irq.h"
#include "intel_atomic.h"
#include "intel_de.h"
#include "intel_display_irq.h"
#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_parent.h"
#include "intel_pipe_crc.h"
#include "intel_pipe_crc_regs.h"
@ -658,7 +657,6 @@ void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)
void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(crtc);
struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
enum pipe pipe = crtc->pipe;
@ -669,5 +667,5 @@ void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
intel_de_write(display, PIPE_CRC_CTL(display, pipe), 0);
intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));
intel_synchronize_irq(dev_priv);
intel_parent_irq_synchronize(display);
}

1
drivers/gpu/drm/i915/i915_driver.c
View File

@ -741,6 +741,7 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
static const struct intel_display_parent_interface parent = {
.rpm = &i915_display_rpm_interface,
.irq = &i915_display_irq_interface,
};
const struct intel_display_parent_interface *i915_driver_parent_interface(void)

16
drivers/gpu/drm/i915/i915_irq.c
View File

@ -33,6 +33,7 @@
#include <drm/drm_drv.h>
#include <drm/drm_print.h>
#include <drm/intel/display_parent_interface.h>
#include "display/intel_display_irq.h"
#include "display/intel_hotplug.h"
@ -1252,3 +1253,18 @@ void intel_synchronize_hardirq(struct drm_i915_private *i915)
{
synchronize_hardirq(to_pci_dev(i915->drm.dev)->irq);
}
static bool _intel_irq_enabled(struct drm_device *drm)
{
return intel_irqs_enabled(to_i915(drm));
}
static void _intel_irq_synchronize(struct drm_device *drm)
{
return intel_synchronize_irq(to_i915(drm));
}
const struct intel_display_irq_interface i915_display_irq_interface = {
.enabled = _intel_irq_enabled,
.synchronize = _intel_irq_synchronize,
};

2
drivers/gpu/drm/i915/i915_irq.h
View File

@ -51,4 +51,6 @@ void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
u32 emr_val);
extern const struct intel_display_irq_interface i915_display_irq_interface;
#endif /* __I915_IRQ_H__ */

5
drivers/gpu/drm/xe/Makefile
View File

@ -187,7 +187,6 @@ endif
# i915 Display compat #defines and #includes
subdir-ccflags-$(CONFIG_DRM_XE_DISPLAY) += \
-I$(src)/display/ext \
-I$(src)/compat-i915-headers \
-I$(srctree)/drivers/gpu/drm/i915/display/ \
-Ddrm_i915_private=xe_device
@ -204,7 +203,6 @@ $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
# Display code specific to xe
xe-$(CONFIG_DRM_XE_DISPLAY) += \
display/ext/i915_irq.o \
display/intel_bo.o \
display/intel_fb_bo.o \
display/intel_fbdev_fb.o \
@ -300,10 +298,11 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_modeset_setup.o \
i915-display/intel_modeset_verify.o \
i915-display/intel_panel.o \
i915-display/intel_parent.o \
i915-display/intel_pch.o \
i915-display/intel_pfit.o \
i915-display/intel_plane.o \
i915-display/intel_pmdemand.o \
i915-display/intel_pch.o \
i915-display/intel_pps.o \
i915-display/intel_psr.o \
i915-display/intel_qp_tables.o \

6
drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
View File

@ -1,6 +0,0 @@
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2023 Intel Corporation
*/
#include "../../i915/i915_irq.h"

18
drivers/gpu/drm/xe/display/ext/i915_irq.c
View File

@ -1,18 +0,0 @@
// SPDX-License-Identifier: MIT
/*
* Copyright © 2023 Intel Corporation
*/
#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_uncore.h"
bool intel_irqs_enabled(struct xe_device *xe)
{
return atomic_read(&xe->irq.enabled);
}
void intel_synchronize_irq(struct xe_device *xe)
{
synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
}

18
drivers/gpu/drm/xe/display/xe_display.c
View File

@ -516,8 +516,26 @@ static void display_device_remove(struct drm_device *dev, void *arg)
intel_display_device_remove(display);
}
static bool irq_enabled(struct drm_device *drm)
{
struct xe_device *xe = to_xe_device(drm);
return atomic_read(&xe->irq.enabled);
}
static void irq_synchronize(struct drm_device *drm)
{
synchronize_irq(to_pci_dev(drm->dev)->irq);
}
static const struct intel_display_irq_interface xe_display_irq_interface = {
.enabled = irq_enabled,
.synchronize = irq_synchronize,
};
static const struct intel_display_parent_interface parent = {
.rpm = &xe_display_rpm_interface,
.irq = &xe_display_irq_interface,
};
/**

8
include/drm/intel/display_parent_interface.h
View File

@ -25,6 +25,11 @@ struct intel_display_rpm_interface {
void (*assert_unblock)(const struct drm_device *drm);
};
struct intel_display_irq_interface {
bool (*enabled)(struct drm_device *drm);
void (*synchronize)(struct drm_device *drm);
};
/**
* struct intel_display_parent_interface - services parent driver provides to display
*
@ -40,6 +45,9 @@ struct intel_display_rpm_interface {
struct intel_display_parent_interface {
/** @rpm: Runtime PM functions */
const struct intel_display_rpm_interface *rpm;
/** @irq: IRQ interface */
const struct intel_display_irq_interface *irq;
};
#endif