phy: fsl-imx8mq-usb: support alternate reference clock
This phy supports both 24MHz and 100MHz clock inputs. By default it's using XTAL 24MHz and the 100MHz clock is a alternate reference clock. Add supports to use alternate reference clock in case 24MHz clock can't work well. Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Link: https://patch.msgid.link/20251118071947.2504789-2-xu.yang_2@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>pull/1354/merge
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0e8fe19c02
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3b64ea4768
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@ -16,6 +16,7 @@
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#define PHY_CTRL0_REF_SSP_EN BIT(2)
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#define PHY_CTRL0_REF_SSP_EN BIT(2)
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#define PHY_CTRL0_FSEL_MASK GENMASK(10, 5)
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#define PHY_CTRL0_FSEL_MASK GENMASK(10, 5)
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#define PHY_CTRL0_FSEL_24M 0x2a
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#define PHY_CTRL0_FSEL_24M 0x2a
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#define PHY_CTRL0_FSEL_100M 0x27
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#define PHY_CTRL1 0x4
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#define PHY_CTRL1 0x4
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#define PHY_CTRL1_RESET BIT(0)
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#define PHY_CTRL1_RESET BIT(0)
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@ -108,6 +109,7 @@ struct tca_blk {
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struct imx8mq_usb_phy {
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struct imx8mq_usb_phy {
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struct phy *phy;
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struct phy *phy;
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struct clk *clk;
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struct clk *clk;
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struct clk *alt_clk;
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void __iomem *base;
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void __iomem *base;
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struct regulator *vbus;
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struct regulator *vbus;
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struct tca_blk *tca;
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struct tca_blk *tca;
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@ -582,7 +584,8 @@ static int imx8mp_usb_phy_init(struct phy *phy)
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/* USB3.0 PHY signal fsel for 24M ref */
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/* USB3.0 PHY signal fsel for 24M ref */
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value = readl(imx_phy->base + PHY_CTRL0);
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value = readl(imx_phy->base + PHY_CTRL0);
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value &= ~PHY_CTRL0_FSEL_MASK;
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value &= ~PHY_CTRL0_FSEL_MASK;
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value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, PHY_CTRL0_FSEL_24M);
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value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, imx_phy->alt_clk ?
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PHY_CTRL0_FSEL_100M : PHY_CTRL0_FSEL_24M);
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writel(value, imx_phy->base + PHY_CTRL0);
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writel(value, imx_phy->base + PHY_CTRL0);
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/* Disable alt_clk_en and use internal MPLL clocks */
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/* Disable alt_clk_en and use internal MPLL clocks */
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@ -626,13 +629,24 @@ static int imx8mq_phy_power_on(struct phy *phy)
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if (ret)
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if (ret)
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return ret;
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return ret;
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return clk_prepare_enable(imx_phy->clk);
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ret = clk_prepare_enable(imx_phy->clk);
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if (ret)
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return ret;
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ret = clk_prepare_enable(imx_phy->alt_clk);
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if (ret) {
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clk_disable_unprepare(imx_phy->clk);
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return ret;
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}
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return ret;
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}
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}
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static int imx8mq_phy_power_off(struct phy *phy)
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static int imx8mq_phy_power_off(struct phy *phy)
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{
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{
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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clk_disable_unprepare(imx_phy->alt_clk);
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clk_disable_unprepare(imx_phy->clk);
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clk_disable_unprepare(imx_phy->clk);
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regulator_disable(imx_phy->vbus);
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regulator_disable(imx_phy->vbus);
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@ -681,6 +695,11 @@ static int imx8mq_usb_phy_probe(struct platform_device *pdev)
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return PTR_ERR(imx_phy->clk);
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return PTR_ERR(imx_phy->clk);
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}
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}
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imx_phy->alt_clk = devm_clk_get_optional(dev, "alt");
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if (IS_ERR(imx_phy->alt_clk))
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return dev_err_probe(dev, PTR_ERR(imx_phy->alt_clk),
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"Failed to get alt clk\n");
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imx_phy->base = devm_platform_ioremap_resource(pdev, 0);
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imx_phy->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(imx_phy->base))
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if (IS_ERR(imx_phy->base))
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return PTR_ERR(imx_phy->base);
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return PTR_ERR(imx_phy->base);
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