arm64: dts: renesas: r9a07g044: Enable SCI0 using DT overlay
Enable sci0 node using dt overlay and disable can{0,1}-stb-hog
nodes in DT overlay as its pins are shared with sci0 pins.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230321114753.75038-6-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
pull/795/merge
parent
c21a1fc217
commit
52a3554bdf
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@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_R8A77961) += r8a779m3-ulcb-kf.dtb
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dtb-$(CONFIG_ARCH_R8A77965) += r8a779m5-salvator-xs.dtb
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dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u11-smarc.dtb
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dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043-smarc-pmod.dtbo
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dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
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dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
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@ -0,0 +1,45 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the RZ/{G2UL, Five} SMARC EVK PMOD parts
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*
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* Copyright (C) 2023 Renesas Electronics Corp.
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*
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*
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* [Connection]
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*
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* SMARC EVK
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* +----------------------------+
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* |CN7 (PMOD1 PIN HEADER) |
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* | SCI0_TXD pin7 |
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* | SCI0_RXD pin8 |
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* | Gnd pin11 |
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* | Vcc pin12 |
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* +----------------------------+
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*
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
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&pinctrl {
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can0-stb-hog {
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status = "disabled";
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};
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can1-stb-hog {
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status = "disabled";
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};
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sci0_pins: sci0-pins {
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pinmux = <RZG2L_PORT_PINMUX(2, 2, 5)>, /* TxD */
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<RZG2L_PORT_PINMUX(2, 3, 5)>; /* RxD */
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};
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};
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&sci0 {
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pinctrl-0 = <&sci0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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