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arm64: dts: imx: add dts for the imx8ulp evk9 board 

Add DTS for the i.MX8ULP EVK9 board. Some notable differences from the
i.MX8ULP EVK board include:

1) M.2 header uses SAI6 instead of SAI5.
2) Ethernet transceiver chip (KSZ8081RNB) uses different pads.
3) USB0 ID/OC signals are tied to different pads.
4) USB1 ID/OC signals are tied to different pads.
5) EVK9 board integrates the 9.4x9.4mm SoC package, while the EVK board
   integrates the 15x15mm package.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
pull/1354/merge
Laurentiu Mihalcea 2025-07-14 11:13:46 -04:00 committed by Shawn Guo
parent 21179eae56
commit 5bf5090bbf
2 changed files with 70 additions and 0 deletions
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1
arch/arm64/boot/dts/freescale/Makefile
View File

@ -333,6 +333,7 @@ dtb-${CONFIG_ARCH_MXC} += imx8qxp-mek-ov5640-csi.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqp-mba8xx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqps-mb-smarc-2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8ulp-9x9-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-9x9-qsb.dtb

69
arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts Normal file
View File

@ -0,0 +1,69 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2025 NXP
*/
/dts-v1/;
#include "imx8ulp-evk.dts"
/ {
model = "NXP i.MX8ULP EVK9";
compatible = "fsl,imx8ulp-9x9-evk", "fsl,imx8ulp";
};
&btcpu {
sound-dai = <&sai6>;
};
&iomuxc1 {
pinctrl_sai6: sai6grp {
fsl,pins = <
MX8ULP_PAD_PTE10__I2S6_TX_BCLK 0x43
MX8ULP_PAD_PTE11__I2S6_TX_FS 0x43
MX8ULP_PAD_PTE14__I2S6_TXD2 0x43
MX8ULP_PAD_PTE6__I2S6_RXD0 0x43
>;
};
};
&pinctrl_enet {
fsl,pins = <
MX8ULP_PAD_PTF9__ENET0_MDC 0x43
MX8ULP_PAD_PTF8__ENET0_MDIO 0x43
MX8ULP_PAD_PTF5__ENET0_RXER 0x43
MX8ULP_PAD_PTF6__ENET0_CRS_DV 0x43
MX8ULP_PAD_PTF1__ENET0_RXD0 0x43
MX8ULP_PAD_PTF0__ENET0_RXD1 0x43
MX8ULP_PAD_PTF4__ENET0_TXEN 0x43
MX8ULP_PAD_PTF3__ENET0_TXD0 0x43
MX8ULP_PAD_PTF2__ENET0_TXD1 0x43
MX8ULP_PAD_PTF7__ENET0_REFCLK 0x43
MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43
>;
};
&pinctrl_usb1 {
fsl,pins = <
MX8ULP_PAD_PTE16__USB0_ID 0x10003
MX8ULP_PAD_PTE18__USB0_OC 0x10003
>;
};
&pinctrl_usb2 {
fsl,pins = <
MX8ULP_PAD_PTD23__USB1_ID 0x10003
MX8ULP_PAD_PTE20__USB1_OC 0x10003
>;
};
&sai6 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_sai6>;
pinctrl-1 = <&pinctrl_sai6>;
assigned-clocks = <&cgc1 IMX8ULP_CLK_SPLL3_PFD1_DIV1>, <&cgc2 IMX8ULP_CLK_SAI6_SEL>;
assigned-clock-parents = <0>, <&cgc1 IMX8ULP_CLK_SPLL3_PFD1_DIV1>;
assigned-clock-rates = <12288000>;
fsl,dataline = <1 0x01 0x04>;
status = "okay";
};