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drm/amd/pm: Add caching to SMUv13.0.12 temp metric 

Add table caching logic to temperature metrics tables in SMUv13.0.12

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
pull/1354/merge
Lijo Lazar 2025-08-06 14:29:41 +05:30 committed by Alex Deucher
parent 476060020f
commit 5bf93e1d6e
3 changed files with 79 additions and 24 deletions
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87
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
View File

@ -140,6 +140,42 @@ const struct cmn2asic_msg_mapping smu_v13_0_12_message_map[SMU_MSG_MAX_COUNT] =
MSG_MAP(GetSystemMetricsTable, PPSMC_MSG_GetSystemMetricsTable, 0),
};
int smu_v13_0_12_tables_init(struct smu_context *smu)
{
struct amdgpu_baseboard_temp_metrics_v1_0 *baseboard_temp_metrics;
struct amdgpu_gpuboard_temp_metrics_v1_0 *gpuboard_temp_metrics;
struct smu_table_context *smu_table = &smu->smu_table;
struct smu_table *tables = smu_table->tables;
struct smu_table_cache *cache;
int ret;
ret = smu_table_cache_init(smu, SMU_TABLE_BASEBOARD_TEMP_METRICS,
sizeof(*baseboard_temp_metrics), 50);
if (ret)
return ret;
/* Initialize base board temperature metrics */
cache = &(tables[SMU_TABLE_BASEBOARD_TEMP_METRICS].cache);
baseboard_temp_metrics =
(struct amdgpu_baseboard_temp_metrics_v1_0 *) cache->buffer;
smu_cmn_init_baseboard_temp_metrics(baseboard_temp_metrics, 1, 0);
/* Initialize GPU board temperature metrics */
ret = smu_table_cache_init(smu, SMU_TABLE_GPUBOARD_TEMP_METRICS,
sizeof(*gpuboard_temp_metrics), 50);
if (ret)
return ret;
cache = &(tables[SMU_TABLE_GPUBOARD_TEMP_METRICS].cache);
gpuboard_temp_metrics = (struct amdgpu_gpuboard_temp_metrics_v1_0 *)cache->buffer;
smu_cmn_init_gpuboard_temp_metrics(gpuboard_temp_metrics, 1, 0);
return 0;
}
void smu_v13_0_12_tables_fini(struct smu_context *smu)
{
smu_table_cache_fini(smu, SMU_TABLE_BASEBOARD_TEMP_METRICS);
smu_table_cache_fini(smu, SMU_TABLE_GPUBOARD_TEMP_METRICS);
}
static int smu_v13_0_12_get_enabled_mask(struct smu_context *smu,
uint64_t *feature_mask)
{
@ -514,34 +550,40 @@ static bool smu_v13_0_12_is_temp_metrics_supported(struct smu_context *smu,
static ssize_t smu_v13_0_12_get_temp_metrics(struct smu_context *smu,
enum smu_temp_metric_type type, void *table)
{
struct amdgpu_gpuboard_temp_metrics_v1_0 *gpuboard_temp_metrics;
struct amdgpu_baseboard_temp_metrics_v1_0 *baseboard_temp_metrics;
SystemMetricsTable_t *metrics;
struct amdgpu_gpuboard_temp_metrics_v1_0 *gpuboard_temp_metrics;
struct smu_table_context *smu_table = &smu->smu_table;
SystemMetricsTable_t *metrics =
(SystemMetricsTable_t *)smu_table->metrics_table;
struct smu_table *data_table;
int ret, sensor_type;
u32 idx, sensors;
ssize_t size;
size = (type == SMU_TEMP_METRIC_GPUBOARD) ?
sizeof(*gpuboard_temp_metrics) : sizeof(*baseboard_temp_metrics);
if (!table)
goto out;
metrics = kzalloc(sizeof(SystemMetricsTable_t), GFP_KERNEL);
if (!metrics)
return -ENOMEM;
gpuboard_temp_metrics = (struct amdgpu_gpuboard_temp_metrics_v1_0 *)table;
baseboard_temp_metrics = (struct amdgpu_baseboard_temp_metrics_v1_0 *)table;
if (type == SMU_TEMP_METRIC_GPUBOARD)
smu_cmn_init_gpuboard_temp_metrics(gpuboard_temp_metrics, 1, 0);
else if (type == SMU_TEMP_METRIC_BASEBOARD)
smu_cmn_init_baseboard_temp_metrics(baseboard_temp_metrics, 1, 0);
ret = smu_v13_0_12_get_system_metrics_table(smu, metrics);
if (ret) {
kfree(metrics);
return ret;
if (type == SMU_TEMP_METRIC_BASEBOARD) {
/* Initialize base board temperature metrics */
data_table =
&smu->smu_table.tables[SMU_TABLE_BASEBOARD_TEMP_METRICS];
baseboard_temp_metrics =
(struct amdgpu_baseboard_temp_metrics_v1_0 *)
data_table->cache.buffer;
size = sizeof(*baseboard_temp_metrics);
} else {
data_table =
&smu->smu_table.tables[SMU_TABLE_GPUBOARD_TEMP_METRICS];
gpuboard_temp_metrics =
(struct amdgpu_gpuboard_temp_metrics_v1_0 *)
data_table->cache.buffer;
size = sizeof(*baseboard_temp_metrics);
}
ret = smu_v13_0_12_get_system_metrics_table(smu, NULL);
if (ret)
return ret;
smu_table_cache_update_time(data_table, jiffies);
if (type == SMU_TEMP_METRIC_GPUBOARD) {
gpuboard_temp_metrics->accumulation_counter = metrics->AccumulationCounter;
gpuboard_temp_metrics->label_version = metrics->LabelVersion;
@ -586,9 +628,8 @@ static ssize_t smu_v13_0_12_get_temp_metrics(struct smu_context *smu,
}
}
kfree(metrics);
memcpy(table, data_table->cache.buffer, size);
out:
return size;
}

14
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
View File

@ -354,6 +354,8 @@ static void smu_v13_0_12_init_caps(struct smu_context *smu)
if (fw_ver >= 0x04560700) {
if (!amdgpu_sriov_vf(smu->adev))
smu_v13_0_6_cap_set(smu, SMU_CAP(TEMP_METRICS));
} else {
smu_v13_0_12_tables_fini(smu);
}
}
@ -568,6 +570,9 @@ static int smu_v13_0_6_tables_init(struct smu_context *smu)
return -ENOMEM;
}
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12))
return smu_v13_0_12_tables_init(smu);
return 0;
}
@ -696,6 +701,13 @@ static int smu_v13_0_6_init_smc_tables(struct smu_context *smu)
return ret;
}
static int smu_v13_0_6_fini_smc_tables(struct smu_context *smu)
{
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12))
smu_v13_0_12_tables_fini(smu);
return smu_v13_0_fini_smc_tables(smu);
}
static int smu_v13_0_6_get_allowed_feature_mask(struct smu_context *smu,
uint32_t *feature_mask,
uint32_t num)
@ -3833,7 +3845,7 @@ static const struct pptable_funcs smu_v13_0_6_ppt_funcs = {
.init_microcode = smu_v13_0_6_init_microcode,
.fini_microcode = smu_v13_0_fini_microcode,
.init_smc_tables = smu_v13_0_6_init_smc_tables,
.fini_smc_tables = smu_v13_0_fini_smc_tables,
.fini_smc_tables = smu_v13_0_6_fini_smc_tables,
.init_power = smu_v13_0_init_power,
.fini_power = smu_v13_0_fini_power,
.check_fw_status = smu_v13_0_6_check_fw_status,

2
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h
View File

@ -88,6 +88,8 @@ ssize_t smu_v13_0_12_get_gpu_metrics(struct smu_context *smu, void **table, void
ssize_t smu_v13_0_12_get_xcp_metrics(struct smu_context *smu,
struct amdgpu_xcp *xcp, void *table,
void *smu_metrics);
int smu_v13_0_12_tables_init(struct smu_context *smu);
void smu_v13_0_12_tables_fini(struct smu_context *smu);
extern const struct cmn2asic_mapping smu_v13_0_12_feature_mask_map[];
extern const struct cmn2asic_msg_mapping smu_v13_0_12_message_map[];
extern const struct smu_temp_funcs smu_v13_0_12_temp_funcs;