mtd: spinand: winbond: Fix W35N number of planes/LUN
There's been a mistake when extracting the geometry of the W35N02 and
W35N04 chips from the datasheet. There is a single plane, however there
are respectively 2 and 4 LUNs. They are actually referred in the
datasheet as dies (equivalent of target), but as there is no die select
operation and the chips only feature a single configuration register for
the entire chip (instead of one per die), we can reasonably assume we
are talking about LUNs and not dies.
Reported-by: Andreas Dannenberg <dannenberg@ti.com>
Suggested-by: Vignesh Raghavendra <vigneshr@ti.com>
Fixes: 25e08bf666 ("mtd: spinand: winbond: Add support for W35N02JW and W35N04JW chips")
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
pull/1271/head
parent
635e118317
commit
60dffe96fa
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@ -289,7 +289,7 @@ static const struct spinand_info winbond_spinand_table[] = {
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SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL)),
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SPINAND_INFO("W35N02JW", /* 1.8V */
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),
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NAND_MEMORG(1, 4096, 128, 64, 512, 10, 2, 1, 1),
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NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),
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NAND_ECCREQ(1, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,
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&write_cache_octal_variants,
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@ -298,7 +298,7 @@ static const struct spinand_info winbond_spinand_table[] = {
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SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL)),
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SPINAND_INFO("W35N04JW", /* 1.8V */
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),
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NAND_MEMORG(1, 4096, 128, 64, 512, 10, 4, 1, 1),
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NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),
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NAND_ECCREQ(1, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,
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&write_cache_octal_variants,
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