RISC-V SoC for v6.16
Sophgo: Add support for SG2044 TOP syscon device. The SG2044 TOP device provide PLL clock function in its area. Add RTC support for CV1800 series SoC. The device is called RTC, but contains control registers of other HW blocks in its address space, most notably of Power-on-Reset (PoR) module, DW8051 IP (MCU core), accompanying SRAM, hence putting it in SoC subsystem. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEdoBX2jyDC9ZCTwZjDCzASqG0i0IFAmgkDx8ACgkQDCzASqG0 i0KzNgwAuwEFXfJZYnWWraIx4+gr7v7tdjfnOz6qw/1Pp3B36R9DIgNe/dNkloGh ZXUw7wU6FmRu+VYvA9xIbrOjp5o+VEb9lRBIlQDOXtIGwSb3agMpCgein5XwbdrF 78hfVZ95/2v/YkfIJsIWLG3S6t1XIZPiCBDKdZYSEBcXKXhtAINUm7BkO8JpLivS 5a/lV9SYPGILXFou+ca5cgEov0BaIiA/OIJxKx5kylKBAidCRG+tmQcvz1TOGfim Kap0zjiaS6w+J7jPqIZT3lICk+24qXCrPDMObNCNov7tZMMw+bmCZntAEuleh5nu VEnigl5Wiuv+V6xo4m4yXzklMhq/y0ESOVSW12qGTRxh/Nvv9SlKfmjEyhTzugkb RcMojb5udrVeFdx7goT5LJwrkgc4P5ZbOZZXI2HouoU2+Ms8h0wr+LwQ2ls2v1Kr qiQ1Q0OB3n2elBz/AZ9zLXrLXumroestml/fFqd9ZqoqSyMiK/yJWL8IcH6uOx/R nKKwLcre =83uO -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguDHQACgkQmmx57+YA GNm+Hw/7BYmkOJkpY51RrloRC+HMlJDs+oQJ+g0iii+FFh4Pfaxa6Lsgxmby0d+X J5LsERLMJ9TSWVfS3EQkhner4O+CxXqIZjnsu1sslDpYNXb9U3xTDLaDgHnFdt0P X7TThm92ZDJf8Z8E8Xec6zxIkJ/xfZByJZwjiTzCI2xOXjpINwZ6KCbJ9lne9cWW qoNJ3uPAqco2lgFhxvb5qnYIk3xf5NL0ZFa51rUfuMpIJtPVLab1A8ZgllXFDVqK 7p3ayFaa5rMmJTgt/1gtpbOUKY+TvA9Ox6eMyoMvUHfG33pwSJTgW0IdbfFb74eg AYvuN1SL47XULhqz4Nmgc4msK63+3mVxcQUufc27O9Uu876wA/1ulLAjcFZZjzpU I7VBvlaBpPQmHkMiBODz5nrlpcfQld1VCxdIcHoP0v7Zsv5/93/EfFszEtm4tgkH S4rCP7YnWmot3IJsUXCZu+zd/tgULqBKKzaDuATYKidm/G9zWDBbgwzuZW2iUvFd 1nXBXWRTHIizP0WzG2LsT0xIwt1XfXnEct2Zb1pPcp1uxaGzM6EBQ+AMdm+cPAW0 UiYhi6Uv/86QEHDqU3WJ2iK9dtqmz965PTkzZGAy7AlkIeJdFqIflWVfAFjGF1Rs DW7M/nM55fGlWVO2WYZlPJlaXfzWxEeiMPkOMKIhW4ymay7uWoE= =yVfo -----END PGP SIGNATURE----- Merge tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux into soc/drivers RISC-V SoC for v6.16 Sophgo: Add support for SG2044 TOP syscon device. The SG2044 TOP device provide PLL clock function in its area. Add RTC support for CV1800 series SoC. The device is called RTC, but contains control registers of other HW blocks in its address space, most notably of Power-on-Reset (PoR) module, DW8051 IP (MCU core), accompanying SRAM, hence putting it in SoC subsystem. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> * tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux: soc: sophgo: cv1800: rtcsys: New driver (handling RTC only) dt-bindings: soc: sophgo: add RTC support for Sophgo CV1800 series soc: sophgo: sg2044: Add support for SG2044 TOP syscon device Link: https://lore.kernel.org/r/MA0P287MB2262B041A26A0F5EAD1E296CFE91A@MA0P287MB2262.INDP287.PROD.OUTLOOK.COM Signed-off-by: Arnd Bergmann <arnd@arndb.de>pull/1253/head
Arnd Bergmann
commit
6333f2974c
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@ -0,0 +1,86 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sophgo/sophgo,cv1800b-rtc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Real Time Clock of the Sophgo CV1800 SoC
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description:
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The RTC (Real Time Clock) is an independently powered module in the chip. It
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contains a 32KHz oscillator and a Power-On-Reset (POR) sub-module, which can
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be used for time display and scheduled alarm produce. In addition, the
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hardware state machine provides triggering and timing control for chip
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power-on, power-off and reset.
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Furthermore, the 8051 subsystem is located within RTCSYS and is independently
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powered. System software can use the 8051 to manage wake conditions and wake
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the system while the system is asleep, and communicate with external devices
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through peripheral controllers.
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Technical Reference Manual available at
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https://github.com/sophgo/sophgo-doc/tree/main/SG200X/TRM
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maintainers:
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- sophgo@lists.linux.dev
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allOf:
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- $ref: /schemas/rtc/rtc.yaml#
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properties:
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compatible:
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items:
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- const: sophgo,cv1800b-rtc
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- const: syscon
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: RTC Alarm
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- description: RTC Longpress
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- description: VBAT DET
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interrupt-names:
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items:
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- const: alarm
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- const: longpress
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- const: vbat
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clocks:
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items:
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- description: RTC clock source
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- description: DW8051 MCU clock source
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clock-names:
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items:
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- const: rtc
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- const: mcu
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/sophgo,cv1800.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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rtc@5025000 {
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compatible = "sophgo,cv1800b-rtc", "syscon";
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reg = <0x5025000 0x2000>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
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<18 IRQ_TYPE_LEVEL_HIGH>,
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<19 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "alarm", "longpress", "vbat";
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clocks = <&clk CLK_RTC_25M>,
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<&clk CLK_SRC_RTC_SYS_0>;
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clock-names = "rtc", "mcu";
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};
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@ -23,6 +23,7 @@ source "drivers/soc/qcom/Kconfig"
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source "drivers/soc/renesas/Kconfig"
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source "drivers/soc/rockchip/Kconfig"
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source "drivers/soc/samsung/Kconfig"
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source "drivers/soc/sophgo/Kconfig"
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source "drivers/soc/sunxi/Kconfig"
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source "drivers/soc/tegra/Kconfig"
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source "drivers/soc/ti/Kconfig"
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@ -29,6 +29,7 @@ obj-y += qcom/
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obj-y += renesas/
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obj-y += rockchip/
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obj-$(CONFIG_SOC_SAMSUNG) += samsung/
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obj-y += sophgo/
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obj-y += sunxi/
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-y += ti/
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@ -0,0 +1,34 @@
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# SPDX-License-Identifier: GPL-2.0-only
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#
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# Sophgo SoC drivers
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#
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if ARCH_SOPHGO || COMPILE_TEST
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menu "Sophgo SoC drivers"
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config SOPHGO_CV1800_RTCSYS
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tristate "Sophgo CV1800 RTC MFD"
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select MFD_CORE
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help
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If you say yes here you get support the RTC MFD driver for Sophgo
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CV1800 series SoC. The RTC module comprises a 32kHz oscillator,
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Power-on-Reset (PoR) sub-module, HW state machine to control chip
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power-on, power-off and reset. Furthermore, the 8051 subsystem is
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located within RTCSYS including associated SRAM block.
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This driver can also be built as a module. If so, the module will be
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called cv1800-rtcsys.
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config SOPHGO_SG2044_TOPSYS
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tristate "Sophgo SG2044 TOP syscon driver"
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select MFD_CORE
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help
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This is the core driver for the Sophgo SG2044 TOP system
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controller device. This driver provide PLL clock device
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for the SoC.
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This driver can also be built as a module. If so, the module
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will be called sg2044-topsys.
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endmenu
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endif
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@ -0,0 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_SOPHGO_CV1800_RTCSYS) += cv1800-rtcsys.o
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obj-$(CONFIG_SOPHGO_SG2044_TOPSYS) += sg2044-topsys.o
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@ -0,0 +1,63 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Driver for Sophgo CV1800 series SoC RTC subsystem
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*
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* The RTC module comprises a 32kHz oscillator, Power-on-Reset (PoR) sub-module,
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* HW state machine to control chip power-on, power-off and reset. Furthermore,
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* the 8051 subsystem is located within RTCSYS including associated SRAM block.
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*
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* Copyright (C) 2025 Alexander Sverdlin <alexander.sverdlin@gmail.com>
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*
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*/
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#include <linux/mfd/core.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/property.h>
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static struct resource cv1800_rtcsys_irq_resources[] = {
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DEFINE_RES_IRQ_NAMED(0, "alarm"),
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};
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static const struct mfd_cell cv1800_rtcsys_subdev[] = {
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{
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.name = "cv1800b-rtc",
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.num_resources = 1,
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.resources = &cv1800_rtcsys_irq_resources[0],
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},
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};
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static int cv1800_rtcsys_probe(struct platform_device *pdev)
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{
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int irq;
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irq = platform_get_irq_byname(pdev, "alarm");
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if (irq < 0)
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return irq;
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cv1800_rtcsys_irq_resources[0].start = irq;
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cv1800_rtcsys_irq_resources[0].end = irq;
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return devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
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cv1800_rtcsys_subdev,
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ARRAY_SIZE(cv1800_rtcsys_subdev),
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NULL, 0, NULL);
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}
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static const struct of_device_id cv1800_rtcsys_of_match[] = {
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{ .compatible = "sophgo,cv1800b-rtc" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, cv1800_rtcsys_of_match);
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static struct platform_driver cv1800_rtcsys_mfd = {
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.probe = cv1800_rtcsys_probe,
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.driver = {
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.name = "cv1800_rtcsys",
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.of_match_table = cv1800_rtcsys_of_match,
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},
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};
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module_platform_driver(cv1800_rtcsys_mfd);
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MODULE_AUTHOR("Alexander Sverdlin <alexander.sverdlin@gmail.com>");
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MODULE_DESCRIPTION("Sophgo CV1800 series SoC RTC subsystem driver");
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MODULE_LICENSE("GPL");
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@ -0,0 +1,45 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Sophgo SG2044 multi-function system controller driver
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*
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* Copyright (C) 2025 Inochi Amaoto <inochiama@gmail.com>
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*/
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#include <linux/mfd/core.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/property.h>
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#include <linux/resource.h>
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static const struct mfd_cell sg2044_topsys_subdev[] = {
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{
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.name = "sg2044-pll",
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},
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};
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static int sg2044_topsys_probe(struct platform_device *pdev)
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{
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return devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
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sg2044_topsys_subdev,
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ARRAY_SIZE(sg2044_topsys_subdev),
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NULL, 0, NULL);
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}
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static const struct of_device_id sg2044_topsys_of_match[] = {
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{ .compatible = "sophgo,sg2044-top-syscon" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, sg2044_topsys_of_match);
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static struct platform_driver sg2044_topsys_driver = {
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.probe = sg2044_topsys_probe,
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.driver = {
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.name = "sg2044-topsys",
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.of_match_table = sg2044_topsys_of_match,
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},
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};
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module_platform_driver(sg2044_topsys_driver);
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MODULE_AUTHOR("Inochi Amaoto <inochiama@gmail.com>");
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MODULE_DESCRIPTION("Sophgo SG2044 multi-function system controller driver");
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MODULE_LICENSE("GPL");
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Loading…
Reference in New Issue