Merge branch 'initial-support-for-pic64-hpsc-hx-ethernet-endpoint'

Charles Perry says:

====================
Initial support for PIC64-HPSC/HX Ethernet endpoint

This series add basic support for Microchip "PIC64-HPSC" and "PIC64HX"
Ethernet endpoint. Both SoCs contain 4 GEM IP with support for
MII/RGMII/SGMII/USXGMII at rates of 10M to 10G. Only RGMII and SGMII at a
rate of 1G is tested for now. Each GEM IP has 8 priority queues and the
revision register reads 0x220c010e.

One particularity of this instantiation of GEM is that the MDIO controller
within the GEM IP is disconnected from any physical pin and the SoC rely on
another standalone MDIO controller.

The maximum jumbo frame size also seems to be different on PIC64-HPSC/HX
(16383) than what most other platforms use (10240). I've found that I need
to tweak a bit the MTU calculation for this, otherwise the RXBS field of
the DMACFG register overflows. See patch 2 for more details.

PIC64-HPSC/HX also supports other features guarded behind CAPS bit like
MACB_CAPS_QBV but I've omitted those intentionally because I didn't test
these.
====================

Link: https://patch.msgid.link/20260313140610.3681752-1-charles.perry@microchip.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
master
Paolo Abeni 2026-03-17 13:32:35 +01:00
commit 68e8619d22
2 changed files with 32 additions and 2 deletions

View File

@ -70,6 +70,14 @@ properties:
- microchip,sama7d65-gem # Microchip SAMA7D65 gigabit ethernet interface
- const: microchip,sama7g5-gem # Microchip SAMA7G5 gigabit ethernet interface
- items:
- const: microchip,pic64hpsc-gem # Microchip PIC64-HPSC
- const: cdns,gem
- items:
- const: microchip,pic64hx-gem # Microchip PIC64HX
- const: microchip,pic64hpsc-gem # Microchip PIC64-HPSC
- const: cdns,gem
reg:
minItems: 1
items:
@ -196,6 +204,17 @@ allOf:
required:
- phys
- if:
properties:
compatible:
contains:
const: microchip,pic64hpsc-gem
then:
patternProperties:
"^ethernet-phy@[0-9a-f]$": false
properties:
mdio: false
unevaluatedProperties: false
examples:

View File

@ -50,6 +50,7 @@ struct sifive_fu540_macb_mgmt {
#define MACB_RX_BUFFER_SIZE 128
#define RX_BUFFER_MULTIPLE 64 /* bytes */
#define RX_BUFFER_MAX (0xFF * RX_BUFFER_MULTIPLE) /* 16320 bytes */
#define DEFAULT_RX_RING_SIZE 512 /* must be power of 2 */
#define MIN_RX_RING_SIZE 64
@ -2601,7 +2602,7 @@ static void macb_init_rx_buffer_size(struct macb *bp, size_t size)
if (!macb_is_gem(bp)) {
bp->rx_buffer_size = MACB_RX_BUFFER_SIZE;
} else {
bp->rx_buffer_size = size;
bp->rx_buffer_size = MIN(size, RX_BUFFER_MAX);
if (bp->rx_buffer_size % RX_BUFFER_MULTIPLE) {
netdev_dbg(bp->dev,
@ -5622,6 +5623,14 @@ static const struct macb_config raspberrypi_rp1_config = {
.jumbo_max_len = 10240,
};
static const struct macb_config pic64hpsc_config = {
.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |
MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_USRIO_DISABLED,
.dma_burst_length = 16,
.init = init_reset_optional,
.jumbo_max_len = 16383,
};
static const struct of_device_id macb_dt_ids[] = {
{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
{ .compatible = "cdns,macb" },
@ -5640,6 +5649,7 @@ static const struct of_device_id macb_dt_ids[] = {
{ .compatible = "cdns,zynq-gem", .data = &zynq_config }, /* deprecated */
{ .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config },
{ .compatible = "microchip,mpfs-macb", .data = &mpfs_config },
{ .compatible = "microchip,pic64hpsc-gem", .data = &pic64hpsc_config},
{ .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config },
{ .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config },
{ .compatible = "mobileye,eyeq5-gem", .data = &eyeq5_config },
@ -5791,7 +5801,8 @@ static int macb_probe(struct platform_device *pdev)
/* MTU range: 68 - 1518 or 10240 */
dev->min_mtu = GEM_MTU_MIN_SIZE;
if ((bp->caps & MACB_CAPS_JUMBO) && bp->jumbo_max_len)
dev->max_mtu = bp->jumbo_max_len - ETH_HLEN - ETH_FCS_LEN;
dev->max_mtu = MIN(bp->jumbo_max_len, RX_BUFFER_MAX) -
ETH_HLEN - ETH_FCS_LEN;
else
dev->max_mtu = 1536 - ETH_HLEN - ETH_FCS_LEN;