Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR (net-7.0-rc4). drivers/net/ethernet/mellanox/mlx5/core/en_rx.cmasterdb25c42c2e("net/mlx5e: RX, Fix XDP multi-buf frag counting for striding RQ")dff1c3164a("net/mlx5e: SHAMPO, Always calculate page size") https://lore.kernel.org/aa7ORohmf67EKihj@sirena.org.uk drivers/net/ethernet/ti/am65-cpsw-nuss.c840c9d13cb("net: ethernet: ti: am65-cpsw-nuss: Fix rx_filter value for PTP support")a23c657e33("net: ethernet: ti: am65-cpsw: Use also port number to identify timestamps") https://lore.kernel.org/abK3EkIXuVgMyGI7@sirena.org.uk No adjacent changes. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Jakub Kicinski
commit
72374257ed
4
.mailmap
4
.mailmap
|
|
@ -219,6 +219,7 @@ Daniele Alessandrelli <daniele.alessandrelli@gmail.com> <daniele.alessandrelli@i
|
|||
Danilo Krummrich <dakr@kernel.org> <dakr@redhat.com>
|
||||
David Brownell <david-b@pacbell.net>
|
||||
David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org>
|
||||
David Gow <david@davidgow.net> <davidgow@google.com>
|
||||
David Heidelberg <david@ixit.cz> <d.okias@gmail.com>
|
||||
David Hildenbrand <david@kernel.org> <david@redhat.com>
|
||||
David Rheinsberg <david@readahead.eu> <dh.herrmann@gmail.com>
|
||||
|
|
@ -497,7 +498,8 @@ Lior David <quic_liord@quicinc.com> <liord@codeaurora.org>
|
|||
Loic Poulain <loic.poulain@oss.qualcomm.com> <loic.poulain@linaro.org>
|
||||
Loic Poulain <loic.poulain@oss.qualcomm.com> <loic.poulain@intel.com>
|
||||
Lorenzo Pieralisi <lpieralisi@kernel.org> <lorenzo.pieralisi@arm.com>
|
||||
Lorenzo Stoakes <lorenzo.stoakes@oracle.com> <lstoakes@gmail.com>
|
||||
Lorenzo Stoakes <ljs@kernel.org> <lstoakes@gmail.com>
|
||||
Lorenzo Stoakes <ljs@kernel.org> <lorenzo.stoakes@oracle.com>
|
||||
Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net>
|
||||
Luca Weiss <luca@lucaweiss.eu> <luca@z3ntu.xyz>
|
||||
Lucas De Marchi <demarchi@kernel.org> <lucas.demarchi@intel.com>
|
||||
|
|
|
|||
|
|
@ -151,11 +151,11 @@ Description:
|
|||
The algorithm_params file is write-only and is used to setup
|
||||
compression algorithm parameters.
|
||||
|
||||
What: /sys/block/zram<id>/writeback_compressed
|
||||
What: /sys/block/zram<id>/compressed_writeback
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||||
Date: Decemeber 2025
|
||||
Contact: Richard Chang <richardycc@google.com>
|
||||
Description:
|
||||
The writeback_compressed device atrribute toggles compressed
|
||||
The compressed_writeback device atrribute toggles compressed
|
||||
writeback feature.
|
||||
|
||||
What: /sys/block/zram<id>/writeback_batch_size
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
What: /sys/bus/platform/devices/INOU0000:XX/fn_lock_toggle_enable
|
||||
What: /sys/bus/platform/devices/INOU0000:XX/fn_lock
|
||||
Date: November 2025
|
||||
KernelVersion: 6.19
|
||||
Contact: Armin Wolf <W_Armin@gmx.de>
|
||||
|
|
@ -8,15 +8,15 @@ Description:
|
|||
|
||||
Reading this file returns the current enable status of the FN lock functionality.
|
||||
|
||||
What: /sys/bus/platform/devices/INOU0000:XX/super_key_toggle_enable
|
||||
What: /sys/bus/platform/devices/INOU0000:XX/super_key_enable
|
||||
Date: November 2025
|
||||
KernelVersion: 6.19
|
||||
Contact: Armin Wolf <W_Armin@gmx.de>
|
||||
Description:
|
||||
Allows userspace applications to enable/disable the super key functionality
|
||||
of the integrated keyboard by writing "1"/"0" into this file.
|
||||
Allows userspace applications to enable/disable the super key of the integrated
|
||||
keyboard by writing "1"/"0" into this file.
|
||||
|
||||
Reading this file returns the current enable status of the super key functionality.
|
||||
Reading this file returns the current enable status of the super key.
|
||||
|
||||
What: /sys/bus/platform/devices/INOU0000:XX/touchpad_toggle_enable
|
||||
Date: November 2025
|
||||
|
|
|
|||
|
|
@ -216,7 +216,7 @@ writeback_limit WO specifies the maximum amount of write IO zram
|
|||
writeback_limit_enable RW show and set writeback_limit feature
|
||||
writeback_batch_size RW show and set maximum number of in-flight
|
||||
writeback operations
|
||||
writeback_compressed RW show and set compressed writeback feature
|
||||
compressed_writeback RW show and set compressed writeback feature
|
||||
comp_algorithm RW show and change the compression algorithm
|
||||
algorithm_params WO setup compression algorithm parameters
|
||||
compact WO trigger memory compaction
|
||||
|
|
@ -439,11 +439,11 @@ budget in next setting is user's job.
|
|||
By default zram stores written back pages in decompressed (raw) form, which
|
||||
means that writeback operation involves decompression of the page before
|
||||
writing it to the backing device. This behavior can be changed by enabling
|
||||
`writeback_compressed` feature, which causes zram to write compressed pages
|
||||
`compressed_writeback` feature, which causes zram to write compressed pages
|
||||
to the backing device, thus avoiding decompression overhead. To enable
|
||||
this feature, execute::
|
||||
|
||||
$ echo yes > /sys/block/zramX/writeback_compressed
|
||||
$ echo yes > /sys/block/zramX/compressed_writeback
|
||||
|
||||
Note that this feature should be configured before the `zramX` device is
|
||||
initialized.
|
||||
|
|
|
|||
|
|
@ -74,6 +74,7 @@
|
|||
TPM TPM drivers are enabled.
|
||||
UMS USB Mass Storage support is enabled.
|
||||
USB USB support is enabled.
|
||||
NVME NVMe support is enabled
|
||||
USBHID USB Human Interface Device support is enabled.
|
||||
V4L Video For Linux support is enabled.
|
||||
VGA The VGA console has been enabled.
|
||||
|
|
@ -4787,6 +4788,18 @@ Kernel parameters
|
|||
This can be set from sysctl after boot.
|
||||
See Documentation/admin-guide/sysctl/vm.rst for details.
|
||||
|
||||
nvme.quirks= [NVME] A list of quirk entries to augment the built-in
|
||||
nvme quirk list. List entries are separated by a
|
||||
'-' character.
|
||||
Each entry has the form VendorID:ProductID:quirk_names.
|
||||
The IDs are 4-digits hex numbers and quirk_names is a
|
||||
list of quirk names separated by commas. A quirk name
|
||||
can be prefixed by '^', meaning that the specified
|
||||
quirk must be disabled.
|
||||
|
||||
Example:
|
||||
nvme.quirks=7710:2267:bogus_nid,^identify_cns-9900:7711:broken_msi
|
||||
|
||||
ohci1394_dma=early [HW,EARLY] enable debugging via the ohci1394 driver.
|
||||
See Documentation/core-api/debugging-via-ohci1394.rst for more
|
||||
info.
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@ Keyboard settings
|
|||
|
||||
The ``uniwill-laptop`` driver allows the user to enable/disable:
|
||||
|
||||
- the FN and super key lock functionality of the integrated keyboard
|
||||
- the FN lock and super key of the integrated keyboard
|
||||
- the touchpad toggle functionality of the integrated touchpad
|
||||
|
||||
See Documentation/ABI/testing/sysfs-driver-uniwill-laptop for details.
|
||||
|
|
|
|||
|
|
@ -16,7 +16,6 @@ description: |
|
|||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- kontron,sa67mcu-hwmon
|
||||
- kontron,sl28cpld-fan
|
||||
|
||||
reg:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,93 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/powerpc/fsl/fsl,mpc83xx.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale PowerQUICC II Pro (MPC83xx) platforms
|
||||
|
||||
maintainers:
|
||||
- J. Neuschäfer <j.ne@posteo.net>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: MPC83xx Reference Design Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,mpc8308rdb
|
||||
- fsl,mpc8315erdb
|
||||
- fsl,mpc8360rdk
|
||||
- fsl,mpc8377rdb
|
||||
- fsl,mpc8377wlan
|
||||
- fsl,mpc8378rdb
|
||||
- fsl,mpc8379rdb
|
||||
|
||||
- description: MPC8313E Reference Design Board
|
||||
items:
|
||||
- const: MPC8313ERDB
|
||||
- const: MPC831xRDB
|
||||
- const: MPC83xxRDB
|
||||
|
||||
- description: MPC8323E Reference Design Board
|
||||
items:
|
||||
- const: MPC8323ERDB
|
||||
- const: MPC832xRDB
|
||||
- const: MPC83xxRDB
|
||||
|
||||
- description: MPC8349E-mITX(-GP) Reference Design Platform
|
||||
items:
|
||||
- enum:
|
||||
- MPC8349EMITX
|
||||
- MPC8349EMITXGP
|
||||
- const: MPC834xMITX
|
||||
- const: MPC83xxMITX
|
||||
|
||||
- description: Keymile KMETER1 board
|
||||
const: keymile,KMETER1
|
||||
|
||||
- description: MPC8308 P1M board
|
||||
const: denx,mpc8308_p1m
|
||||
|
||||
patternProperties:
|
||||
"^soc@.*$":
|
||||
type: object
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,mpc8315-immr
|
||||
- fsl,mpc8308-immr
|
||||
- const: simple-bus
|
||||
- items:
|
||||
- const: fsl,mpc8360-immr
|
||||
- const: fsl,immr
|
||||
- const: fsl,soc
|
||||
- const: simple-bus
|
||||
- const: simple-bus
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
- |
|
||||
/ {
|
||||
compatible = "fsl,mpc8315erdb";
|
||||
model = "MPC8315E-RDB";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
soc@e0000000 {
|
||||
compatible = "fsl,mpc8315-immr", "simple-bus";
|
||||
reg = <0xe0000000 0x00000200>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
ranges = <0 0xe0000000 0x00100000>;
|
||||
bus-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -23,6 +23,7 @@ properties:
|
|||
enum:
|
||||
- nvidia,tegra210-audio-graph-card
|
||||
- nvidia,tegra186-audio-graph-card
|
||||
- nvidia,tegra238-audio-graph-card
|
||||
- nvidia,tegra264-audio-graph-card
|
||||
|
||||
clocks:
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@ properties:
|
|||
- renesas,r9a07g044-ssi # RZ/G2{L,LC}
|
||||
- renesas,r9a07g054-ssi # RZ/V2L
|
||||
- renesas,r9a08g045-ssi # RZ/G3S
|
||||
- renesas,r9a08g046-ssi # RZ/G3L
|
||||
- const: renesas,rz-ssi
|
||||
|
||||
reg:
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ Supported chips:
|
|||
- https://ww1.microchip.com/downloads/en/DeviceDoc/EMC1438%20DS%20Rev.%201.0%20(04-29-10).pdf
|
||||
|
||||
Author:
|
||||
Kalhan Trisal <kalhan.trisal@intel.com
|
||||
Kalhan Trisal <kalhan.trisal@intel.com>
|
||||
|
||||
|
||||
Description
|
||||
|
|
|
|||
|
|
@ -220,7 +220,6 @@ Hardware Monitoring Kernel Drivers
|
|||
q54sj108a2
|
||||
qnap-mcu-hwmon
|
||||
raspberrypi-hwmon
|
||||
sa67
|
||||
sbrmi
|
||||
sbtsi_temp
|
||||
sch5627
|
||||
|
|
|
|||
|
|
@ -1,41 +0,0 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0-only
|
||||
|
||||
Kernel driver sa67mcu
|
||||
=====================
|
||||
|
||||
Supported chips:
|
||||
|
||||
* Kontron sa67mcu
|
||||
|
||||
Prefix: 'sa67mcu'
|
||||
|
||||
Datasheet: not available
|
||||
|
||||
Authors: Michael Walle <mwalle@kernel.org>
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
The sa67mcu is a board management controller which also exposes a hardware
|
||||
monitoring controller.
|
||||
|
||||
The controller has two voltage and one temperature sensor. The values are
|
||||
hold in two 8 bit registers to form one 16 bit value. Reading the lower byte
|
||||
will also capture the high byte to make the access atomic. The unit of the
|
||||
volatge sensors are 1mV and the unit of the temperature sensor is 0.1degC.
|
||||
|
||||
Sysfs entries
|
||||
-------------
|
||||
|
||||
The following attributes are supported.
|
||||
|
||||
======================= ========================================================
|
||||
in0_label "VDDIN"
|
||||
in0_input Measured VDDIN voltage.
|
||||
|
||||
in1_label "VDD_RTC"
|
||||
in1_input Measured VDD_RTC voltage.
|
||||
|
||||
temp1_input MCU temperature. Roughly the board temperature.
|
||||
======================= ========================================================
|
||||
|
||||
|
|
@ -2372,6 +2372,10 @@ quirk_flags
|
|||
audible volume
|
||||
* bit 25: ``mixer_capture_min_mute``
|
||||
Similar to bit 24 but for capture streams
|
||||
* bit 26: ``skip_iface_setup``
|
||||
Skip the probe-time interface setup (usb_set_interface,
|
||||
init_pitch, init_sample_rate); redundant with
|
||||
snd_usb_endpoint_prepare() at stream-open time
|
||||
|
||||
This module supports multiple devices, autoprobe and hotplugging.
|
||||
|
||||
|
|
|
|||
46
MAINTAINERS
46
MAINTAINERS
|
|
@ -13937,7 +13937,7 @@ F: fs/smb/server/
|
|||
|
||||
KERNEL UNIT TESTING FRAMEWORK (KUnit)
|
||||
M: Brendan Higgins <brendan.higgins@linux.dev>
|
||||
M: David Gow <davidgow@google.com>
|
||||
M: David Gow <david@davidgow.net>
|
||||
R: Rae Moar <raemoar63@gmail.com>
|
||||
L: linux-kselftest@vger.kernel.org
|
||||
L: kunit-dev@googlegroups.com
|
||||
|
|
@ -14757,7 +14757,7 @@ F: drivers/misc/lis3lv02d/
|
|||
F: drivers/platform/x86/hp/hp_accel.c
|
||||
|
||||
LIST KUNIT TEST
|
||||
M: David Gow <davidgow@google.com>
|
||||
M: David Gow <david@davidgow.net>
|
||||
L: linux-kselftest@vger.kernel.org
|
||||
L: kunit-dev@googlegroups.com
|
||||
S: Maintained
|
||||
|
|
@ -16357,7 +16357,6 @@ F: net/dsa/tag_mtk.c
|
|||
|
||||
MEDIATEK T7XX 5G WWAN MODEM DRIVER
|
||||
M: Chandrashekar Devegowda <chandrashekar.devegowda@intel.com>
|
||||
R: Chiranjeevi Rapolu <chiranjeevi.rapolu@linux.intel.com>
|
||||
R: Liu Haijun <haijun.liu@mediatek.com>
|
||||
R: Ricardo Martinez <ricardo.martinez@linux.intel.com>
|
||||
L: netdev@vger.kernel.org
|
||||
|
|
@ -16642,7 +16641,7 @@ F: mm/balloon.c
|
|||
MEMORY MANAGEMENT - CORE
|
||||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
M: David Hildenbrand <david@kernel.org>
|
||||
R: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
|
||||
R: Lorenzo Stoakes <ljs@kernel.org>
|
||||
R: Liam R. Howlett <Liam.Howlett@oracle.com>
|
||||
R: Vlastimil Babka <vbabka@kernel.org>
|
||||
R: Mike Rapoport <rppt@kernel.org>
|
||||
|
|
@ -16772,7 +16771,7 @@ F: mm/workingset.c
|
|||
MEMORY MANAGEMENT - MISC
|
||||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
M: David Hildenbrand <david@kernel.org>
|
||||
R: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
|
||||
R: Lorenzo Stoakes <ljs@kernel.org>
|
||||
R: Liam R. Howlett <Liam.Howlett@oracle.com>
|
||||
R: Vlastimil Babka <vbabka@kernel.org>
|
||||
R: Mike Rapoport <rppt@kernel.org>
|
||||
|
|
@ -16863,7 +16862,7 @@ R: David Hildenbrand <david@kernel.org>
|
|||
R: Michal Hocko <mhocko@kernel.org>
|
||||
R: Qi Zheng <zhengqi.arch@bytedance.com>
|
||||
R: Shakeel Butt <shakeel.butt@linux.dev>
|
||||
R: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
|
||||
R: Lorenzo Stoakes <ljs@kernel.org>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/vmscan.c
|
||||
|
|
@ -16872,7 +16871,7 @@ F: mm/workingset.c
|
|||
MEMORY MANAGEMENT - RMAP (REVERSE MAPPING)
|
||||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
M: David Hildenbrand <david@kernel.org>
|
||||
M: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
|
||||
M: Lorenzo Stoakes <ljs@kernel.org>
|
||||
R: Rik van Riel <riel@surriel.com>
|
||||
R: Liam R. Howlett <Liam.Howlett@oracle.com>
|
||||
R: Vlastimil Babka <vbabka@kernel.org>
|
||||
|
|
@ -16917,7 +16916,7 @@ F: mm/swapfile.c
|
|||
MEMORY MANAGEMENT - THP (TRANSPARENT HUGE PAGE)
|
||||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
M: David Hildenbrand <david@kernel.org>
|
||||
M: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
|
||||
M: Lorenzo Stoakes <ljs@kernel.org>
|
||||
R: Zi Yan <ziy@nvidia.com>
|
||||
R: Baolin Wang <baolin.wang@linux.alibaba.com>
|
||||
R: Liam R. Howlett <Liam.Howlett@oracle.com>
|
||||
|
|
@ -16957,7 +16956,7 @@ F: tools/testing/selftests/mm/uffd-*.[ch]
|
|||
|
||||
MEMORY MANAGEMENT - RUST
|
||||
M: Alice Ryhl <aliceryhl@google.com>
|
||||
R: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
|
||||
R: Lorenzo Stoakes <ljs@kernel.org>
|
||||
R: Liam R. Howlett <Liam.Howlett@oracle.com>
|
||||
L: linux-mm@kvack.org
|
||||
L: rust-for-linux@vger.kernel.org
|
||||
|
|
@ -16973,7 +16972,7 @@ F: rust/kernel/page.rs
|
|||
MEMORY MAPPING
|
||||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
M: Liam R. Howlett <Liam.Howlett@oracle.com>
|
||||
M: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
|
||||
M: Lorenzo Stoakes <ljs@kernel.org>
|
||||
R: Vlastimil Babka <vbabka@kernel.org>
|
||||
R: Jann Horn <jannh@google.com>
|
||||
R: Pedro Falcato <pfalcato@suse.de>
|
||||
|
|
@ -17003,7 +17002,7 @@ MEMORY MAPPING - LOCKING
|
|||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
M: Suren Baghdasaryan <surenb@google.com>
|
||||
M: Liam R. Howlett <Liam.Howlett@oracle.com>
|
||||
M: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
|
||||
M: Lorenzo Stoakes <ljs@kernel.org>
|
||||
R: Vlastimil Babka <vbabka@kernel.org>
|
||||
R: Shakeel Butt <shakeel.butt@linux.dev>
|
||||
L: linux-mm@kvack.org
|
||||
|
|
@ -17018,7 +17017,7 @@ F: mm/mmap_lock.c
|
|||
MEMORY MAPPING - MADVISE (MEMORY ADVICE)
|
||||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
M: Liam R. Howlett <Liam.Howlett@oracle.com>
|
||||
M: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
|
||||
M: Lorenzo Stoakes <ljs@kernel.org>
|
||||
M: David Hildenbrand <david@kernel.org>
|
||||
R: Vlastimil Babka <vbabka@kernel.org>
|
||||
R: Jann Horn <jannh@google.com>
|
||||
|
|
@ -20107,9 +20106,8 @@ F: Documentation/devicetree/bindings/pci/marvell,armada-3700-pcie.yaml
|
|||
F: drivers/pci/controller/pci-aardvark.c
|
||||
|
||||
PCI DRIVER FOR ALTERA PCIE IP
|
||||
M: Joyce Ooi <joyce.ooi@intel.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Supported
|
||||
S: Orphan
|
||||
F: Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml
|
||||
F: drivers/pci/controller/pcie-altera.c
|
||||
|
||||
|
|
@ -20354,9 +20352,8 @@ S: Supported
|
|||
F: Documentation/PCI/pci-error-recovery.rst
|
||||
|
||||
PCI MSI DRIVER FOR ALTERA MSI IP
|
||||
M: Joyce Ooi <joyce.ooi@intel.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Supported
|
||||
S: Orphan
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml
|
||||
F: drivers/pci/controller/pcie-altera-msi.c
|
||||
|
||||
|
|
@ -22268,6 +22265,16 @@ L: linux-wireless@vger.kernel.org
|
|||
S: Orphan
|
||||
F: drivers/net/wireless/rsi/
|
||||
|
||||
RELAY
|
||||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
M: Jens Axboe <axboe@kernel.dk>
|
||||
M: Jason Xing <kernelxing@tencent.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/filesystems/relay.rst
|
||||
F: include/linux/relay.h
|
||||
F: kernel/relay.c
|
||||
|
||||
REGISTER MAP ABSTRACTION
|
||||
M: Mark Brown <broonie@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
|
|
@ -23157,7 +23164,7 @@ K: \b(?i:rust)\b
|
|||
|
||||
RUST [ALLOC]
|
||||
M: Danilo Krummrich <dakr@kernel.org>
|
||||
R: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
|
||||
R: Lorenzo Stoakes <ljs@kernel.org>
|
||||
R: Vlastimil Babka <vbabka@kernel.org>
|
||||
R: Liam R. Howlett <Liam.Howlett@oracle.com>
|
||||
R: Uladzislau Rezki <urezki@gmail.com>
|
||||
|
|
@ -24321,7 +24328,6 @@ F: Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.
|
|||
F: Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml
|
||||
F: Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml
|
||||
F: drivers/gpio/gpio-sl28cpld.c
|
||||
F: drivers/hwmon/sa67mcu-hwmon.c
|
||||
F: drivers/hwmon/sl28cpld-hwmon.c
|
||||
F: drivers/irqchip/irq-sl28cpld.c
|
||||
F: drivers/pwm/pwm-sl28cpld.c
|
||||
|
|
@ -24335,11 +24341,12 @@ F: drivers/nvmem/layouts/sl28vpd.c
|
|||
|
||||
SLAB ALLOCATOR
|
||||
M: Vlastimil Babka <vbabka@kernel.org>
|
||||
M: Harry Yoo <harry.yoo@oracle.com>
|
||||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
R: Hao Li <hao.li@linux.dev>
|
||||
R: Christoph Lameter <cl@gentwo.org>
|
||||
R: David Rientjes <rientjes@google.com>
|
||||
R: Roman Gushchin <roman.gushchin@linux.dev>
|
||||
R: Harry Yoo <harry.yoo@oracle.com>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/vbabka/slab.git
|
||||
|
|
@ -25750,6 +25757,7 @@ F: include/net/pkt_cls.h
|
|||
F: include/net/pkt_sched.h
|
||||
F: include/net/sch_priv.h
|
||||
F: include/net/tc_act/
|
||||
F: include/net/tc_wrapper.h
|
||||
F: include/uapi/linux/pkt_cls.h
|
||||
F: include/uapi/linux/pkt_sched.h
|
||||
F: include/uapi/linux/tc_act/
|
||||
|
|
|
|||
10
Makefile
10
Makefile
|
|
@ -2,7 +2,7 @@
|
|||
VERSION = 7
|
||||
PATCHLEVEL = 0
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc3
|
||||
NAME = Baby Opossum Posse
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
@ -1497,13 +1497,13 @@ ifneq ($(wildcard $(resolve_btfids_O)),)
|
|||
$(Q)$(MAKE) -sC $(srctree)/tools/bpf/resolve_btfids O=$(resolve_btfids_O) clean
|
||||
endif
|
||||
|
||||
PHONY += objtool_clean
|
||||
PHONY += objtool_clean objtool_mrproper
|
||||
|
||||
objtool_O = $(abspath $(objtree))/tools/objtool
|
||||
|
||||
objtool_clean:
|
||||
objtool_clean objtool_mrproper:
|
||||
ifneq ($(wildcard $(objtool_O)),)
|
||||
$(Q)$(MAKE) -sC $(abs_srctree)/tools/objtool O=$(objtool_O) srctree=$(abs_srctree) clean
|
||||
$(Q)$(MAKE) -sC $(abs_srctree)/tools/objtool O=$(objtool_O) srctree=$(abs_srctree) $(patsubst objtool_%,%,$@)
|
||||
endif
|
||||
|
||||
tools/: FORCE
|
||||
|
|
@ -1686,7 +1686,7 @@ PHONY += $(mrproper-dirs) mrproper
|
|||
$(mrproper-dirs):
|
||||
$(Q)$(MAKE) $(clean)=$(patsubst _mrproper_%,%,$@)
|
||||
|
||||
mrproper: clean $(mrproper-dirs)
|
||||
mrproper: clean objtool_mrproper $(mrproper-dirs)
|
||||
$(call cmd,rmfiles)
|
||||
@find . $(RCS_FIND_IGNORE) \
|
||||
\( -name '*.rmeta' \) \
|
||||
|
|
|
|||
|
|
@ -71,6 +71,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
DISCARDS
|
||||
|
|
|
|||
|
|
@ -123,6 +123,7 @@ SECTIONS
|
|||
_end = . ;
|
||||
|
||||
STABS_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
DISCARDS
|
||||
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ SECTIONS
|
|||
COMMON_DISCARDS
|
||||
*(.ARM.exidx*)
|
||||
*(.ARM.extab*)
|
||||
*(.modinfo)
|
||||
*(.note.*)
|
||||
*(.rel.*)
|
||||
*(.printk_index)
|
||||
|
|
|
|||
|
|
@ -154,6 +154,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ARM_DETAILS
|
||||
|
||||
ARM_ASSERTS
|
||||
|
|
|
|||
|
|
@ -153,6 +153,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ARM_DETAILS
|
||||
|
||||
ARM_ASSERTS
|
||||
|
|
|
|||
|
|
@ -91,8 +91,9 @@ __XCHG_GEN(_mb)
|
|||
#define __xchg_wrapper(sfx, ptr, x) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) __ret; \
|
||||
__ret = (__typeof__(*(ptr))) \
|
||||
__arch_xchg##sfx((unsigned long)(x), (ptr), sizeof(*(ptr))); \
|
||||
__ret = (__force __typeof__(*(ptr))) \
|
||||
__arch_xchg##sfx((__force unsigned long)(x), (ptr), \
|
||||
sizeof(*(ptr))); \
|
||||
__ret; \
|
||||
})
|
||||
|
||||
|
|
@ -175,9 +176,10 @@ __CMPXCHG_GEN(_mb)
|
|||
#define __cmpxchg_wrapper(sfx, ptr, o, n) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) __ret; \
|
||||
__ret = (__typeof__(*(ptr))) \
|
||||
__cmpxchg##sfx((ptr), (unsigned long)(o), \
|
||||
(unsigned long)(n), sizeof(*(ptr))); \
|
||||
__ret = (__force __typeof__(*(ptr))) \
|
||||
__cmpxchg##sfx((ptr), (__force unsigned long)(o), \
|
||||
(__force unsigned long)(n), \
|
||||
sizeof(*(ptr))); \
|
||||
__ret; \
|
||||
})
|
||||
|
||||
|
|
|
|||
|
|
@ -50,11 +50,11 @@
|
|||
|
||||
#define _PAGE_DEFAULT (_PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
|
||||
|
||||
#define _PAGE_KERNEL (PROT_NORMAL)
|
||||
#define _PAGE_KERNEL_RO ((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY)
|
||||
#define _PAGE_KERNEL_ROX ((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY)
|
||||
#define _PAGE_KERNEL_EXEC (PROT_NORMAL & ~PTE_PXN)
|
||||
#define _PAGE_KERNEL_EXEC_CONT ((PROT_NORMAL & ~PTE_PXN) | PTE_CONT)
|
||||
#define _PAGE_KERNEL (PROT_NORMAL | PTE_DIRTY)
|
||||
#define _PAGE_KERNEL_RO ((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY | PTE_DIRTY)
|
||||
#define _PAGE_KERNEL_ROX ((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY | PTE_DIRTY)
|
||||
#define _PAGE_KERNEL_EXEC ((PROT_NORMAL & ~PTE_PXN) | PTE_DIRTY)
|
||||
#define _PAGE_KERNEL_EXEC_CONT ((PROT_NORMAL & ~PTE_PXN) | PTE_CONT | PTE_DIRTY)
|
||||
|
||||
#define _PAGE_SHARED (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
|
||||
#define _PAGE_SHARED_EXEC (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_WRITE)
|
||||
|
|
|
|||
|
|
@ -2,6 +2,10 @@
|
|||
#ifndef _ASM_RUNTIME_CONST_H
|
||||
#define _ASM_RUNTIME_CONST_H
|
||||
|
||||
#ifdef MODULE
|
||||
#error "Cannot use runtime-const infrastructure from modules"
|
||||
#endif
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
|
||||
/* Sigh. You can still run arm64 in BE mode */
|
||||
|
|
|
|||
|
|
@ -349,6 +349,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
HEAD_SYMBOLS
|
||||
|
|
|
|||
|
|
@ -599,6 +599,27 @@ void contpte_clear_young_dirty_ptes(struct vm_area_struct *vma,
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(contpte_clear_young_dirty_ptes);
|
||||
|
||||
static bool contpte_all_subptes_match_access_flags(pte_t *ptep, pte_t entry)
|
||||
{
|
||||
pte_t *cont_ptep = contpte_align_down(ptep);
|
||||
/*
|
||||
* PFNs differ per sub-PTE. Match only bits consumed by
|
||||
* __ptep_set_access_flags(): AF, DIRTY and write permission.
|
||||
*/
|
||||
const pteval_t cmp_mask = PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
|
||||
pteval_t entry_cmp = pte_val(entry) & cmp_mask;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < CONT_PTES; i++) {
|
||||
pteval_t pte_cmp = pte_val(__ptep_get(cont_ptep + i)) & cmp_mask;
|
||||
|
||||
if (pte_cmp != entry_cmp)
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
int contpte_ptep_set_access_flags(struct vm_area_struct *vma,
|
||||
unsigned long addr, pte_t *ptep,
|
||||
pte_t entry, int dirty)
|
||||
|
|
@ -608,13 +629,37 @@ int contpte_ptep_set_access_flags(struct vm_area_struct *vma,
|
|||
int i;
|
||||
|
||||
/*
|
||||
* Gather the access/dirty bits for the contiguous range. If nothing has
|
||||
* changed, its a noop.
|
||||
* Check whether all sub-PTEs in the CONT block already match the
|
||||
* requested access flags/write permission, using raw per-PTE values
|
||||
* rather than the gathered ptep_get() view.
|
||||
*
|
||||
* __ptep_set_access_flags() can update AF, dirty and write
|
||||
* permission, but only to make the mapping more permissive.
|
||||
*
|
||||
* ptep_get() gathers AF/dirty state across the whole CONT block,
|
||||
* which is correct for a CPU with FEAT_HAFDBS. But page-table
|
||||
* walkers that evaluate each descriptor individually (e.g. a CPU
|
||||
* without DBM support, or an SMMU without HTTU, or with HA/HD
|
||||
* disabled in CD.TCR) can keep faulting on the target sub-PTE if
|
||||
* only a sibling has been updated. Gathering can therefore cause
|
||||
* false no-ops when only a sibling has been updated:
|
||||
* - write faults: target still has PTE_RDONLY (needs PTE_RDONLY cleared)
|
||||
* - read faults: target still lacks PTE_AF
|
||||
*
|
||||
* Per Arm ARM (DDI 0487) D8.7.1, any sub-PTE in a CONT range may
|
||||
* become the effective cached translation, so all entries must have
|
||||
* consistent attributes. Check the full CONT block before returning
|
||||
* no-op, and when any sub-PTE mismatches, proceed to update the whole
|
||||
* range.
|
||||
*/
|
||||
orig_pte = pte_mknoncont(ptep_get(ptep));
|
||||
if (pte_val(orig_pte) == pte_val(entry))
|
||||
if (contpte_all_subptes_match_access_flags(ptep, entry))
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Use raw target pte (not gathered) for write-bit unfold decision.
|
||||
*/
|
||||
orig_pte = pte_mknoncont(__ptep_get(ptep));
|
||||
|
||||
/*
|
||||
* We can fix up access/dirty bits without having to unfold the contig
|
||||
* range. But if the write bit is changing, we must unfold.
|
||||
|
|
|
|||
|
|
@ -109,6 +109,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
DISCARDS
|
||||
|
|
|
|||
|
|
@ -62,6 +62,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
.hexagon.attributes 0 : { *(.hexagon.attributes) }
|
||||
|
||||
|
|
|
|||
|
|
@ -147,6 +147,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
#ifdef CONFIG_EFI_STUB
|
||||
|
|
|
|||
|
|
@ -85,6 +85,7 @@ SECTIONS {
|
|||
_end = .;
|
||||
|
||||
STABS_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
/* Sections to be discarded */
|
||||
|
|
|
|||
|
|
@ -58,6 +58,7 @@ SECTIONS
|
|||
_end = . ;
|
||||
|
||||
STABS_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
/* Sections to be discarded */
|
||||
|
|
|
|||
|
|
@ -51,6 +51,7 @@ __init_begin = .;
|
|||
_end = . ;
|
||||
|
||||
STABS_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
/* Sections to be discarded */
|
||||
|
|
|
|||
|
|
@ -217,6 +217,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
/* These must appear regardless of . */
|
||||
|
|
|
|||
|
|
@ -57,6 +57,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
DISCARDS
|
||||
|
|
|
|||
|
|
@ -101,6 +101,7 @@ SECTIONS
|
|||
/* Throw in the debugging sections */
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
/* Sections to be discarded -- must be last */
|
||||
|
|
|
|||
|
|
@ -90,6 +90,7 @@ SECTIONS
|
|||
/* Sections to be discarded */
|
||||
DISCARDS
|
||||
/DISCARD/ : {
|
||||
*(.modinfo)
|
||||
#ifdef CONFIG_64BIT
|
||||
/* temporary hack until binutils is fixed to not emit these
|
||||
* for static binaries
|
||||
|
|
|
|||
|
|
@ -85,7 +85,7 @@ extern void __update_cache(pte_t pte);
|
|||
printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
|
||||
|
||||
/* This is the size of the initially mapped kernel memory */
|
||||
#if defined(CONFIG_64BIT)
|
||||
#if defined(CONFIG_64BIT) || defined(CONFIG_KALLSYMS)
|
||||
#define KERNEL_INITIAL_ORDER 26 /* 1<<26 = 64MB */
|
||||
#else
|
||||
#define KERNEL_INITIAL_ORDER 25 /* 1<<25 = 32MB */
|
||||
|
|
|
|||
|
|
@ -56,6 +56,7 @@ ENTRY(parisc_kernel_start)
|
|||
|
||||
.import __bss_start,data
|
||||
.import __bss_stop,data
|
||||
.import __end,data
|
||||
|
||||
load32 PA(__bss_start),%r3
|
||||
load32 PA(__bss_stop),%r4
|
||||
|
|
@ -149,7 +150,11 @@ $cpu_ok:
|
|||
* everything ... it will get remapped correctly later */
|
||||
ldo 0+_PAGE_KERNEL_RWX(%r0),%r3 /* Hardwired 0 phys addr start */
|
||||
load32 (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
|
||||
load32 PA(pg0),%r1
|
||||
load32 PA(_end),%r1
|
||||
SHRREG %r1,PAGE_SHIFT,%r1 /* %r1 is PFN count for _end symbol */
|
||||
cmpb,<<,n %r11,%r1,1f
|
||||
copy %r1,%r11 /* %r1 PFN count smaller than %r11 */
|
||||
1: load32 PA(pg0),%r1
|
||||
|
||||
$pgt_fill_loop:
|
||||
STREGM %r3,ASM_PTE_ENTRY_SIZE(%r1)
|
||||
|
|
|
|||
|
|
@ -120,14 +120,6 @@ void __init setup_arch(char **cmdline_p)
|
|||
#endif
|
||||
printk(KERN_CONT ".\n");
|
||||
|
||||
/*
|
||||
* Check if initial kernel page mappings are sufficient.
|
||||
* panic early if not, else we may access kernel functions
|
||||
* and variables which can't be reached.
|
||||
*/
|
||||
if (__pa((unsigned long) &_end) >= KERNEL_INITIAL_SIZE)
|
||||
panic("KERNEL_INITIAL_ORDER too small!");
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
if(parisc_narrow_firmware) {
|
||||
printk(KERN_INFO "Kernel is using PDC in 32-bit mode.\n");
|
||||
|
|
@ -279,6 +271,18 @@ void __init start_parisc(void)
|
|||
int ret, cpunum;
|
||||
struct pdc_coproc_cfg coproc_cfg;
|
||||
|
||||
/*
|
||||
* Check if initial kernel page mapping is sufficient.
|
||||
* Print warning if not, because we may access kernel functions and
|
||||
* variables which can't be reached yet through the initial mappings.
|
||||
* Note that the panic() and printk() functions are not functional
|
||||
* yet, so we need to use direct iodc() firmware calls instead.
|
||||
*/
|
||||
const char warn1[] = "CRITICAL: Kernel may crash because "
|
||||
"KERNEL_INITIAL_ORDER is too small.\n";
|
||||
if (__pa((unsigned long) &_end) >= KERNEL_INITIAL_SIZE)
|
||||
pdc_iodc_print(warn1, sizeof(warn1) - 1);
|
||||
|
||||
/* check QEMU/SeaBIOS marker in PAGE0 */
|
||||
running_on_qemu = (memcmp(&PAGE0->pad0, "SeaBIOS", 8) == 0);
|
||||
|
||||
|
|
|
|||
|
|
@ -165,6 +165,7 @@ SECTIONS
|
|||
_end = . ;
|
||||
|
||||
STABS_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
.note 0 : { *(.note) }
|
||||
|
||||
|
|
|
|||
|
|
@ -573,8 +573,8 @@ config ARCH_USING_PATCHABLE_FUNCTION_ENTRY
|
|||
depends on FUNCTION_TRACER && (PPC32 || PPC64_ELF_ABI_V2)
|
||||
depends on $(cc-option,-fpatchable-function-entry=2)
|
||||
def_bool y if PPC32
|
||||
def_bool $(success,$(srctree)/arch/powerpc/tools/gcc-check-fpatchable-function-entry.sh $(CC) -mlittle-endian) if PPC64 && CPU_LITTLE_ENDIAN
|
||||
def_bool $(success,$(srctree)/arch/powerpc/tools/gcc-check-fpatchable-function-entry.sh $(CC) -mbig-endian) if PPC64 && CPU_BIG_ENDIAN
|
||||
def_bool $(success,$(srctree)/arch/powerpc/tools/check-fpatchable-function-entry.sh $(CC) $(CLANG_FLAGS) -mlittle-endian) if PPC64 && CPU_LITTLE_ENDIAN
|
||||
def_bool $(success,$(srctree)/arch/powerpc/tools/check-fpatchable-function-entry.sh $(CC) -mbig-endian) if PPC64 && CPU_BIG_ENDIAN
|
||||
|
||||
config PPC_FTRACE_OUT_OF_LINE
|
||||
def_bool PPC64 && ARCH_USING_PATCHABLE_FUNCTION_ENTRY
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x8000000>; // 128MB at 0
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,156 +0,0 @@
|
|||
/* T4240 Interlaken LAC Portal device tree stub with 24 portals.
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
compatible = "fsl,interlaken-lac-portals";
|
||||
|
||||
lportal0: lac-portal@0 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
|
||||
lportal1: lac-portal@1000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x1000 0x1000>;
|
||||
};
|
||||
|
||||
lportal2: lac-portal@2000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
|
||||
lportal3: lac-portal@3000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x3000 0x1000>;
|
||||
};
|
||||
|
||||
lportal4: lac-portal@4000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x4000 0x1000>;
|
||||
};
|
||||
|
||||
lportal5: lac-portal@5000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x5000 0x1000>;
|
||||
};
|
||||
|
||||
lportal6: lac-portal@6000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x6000 0x1000>;
|
||||
};
|
||||
|
||||
lportal7: lac-portal@7000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x7000 0x1000>;
|
||||
};
|
||||
|
||||
lportal8: lac-portal@8000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x8000 0x1000>;
|
||||
};
|
||||
|
||||
lportal9: lac-portal@9000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
|
||||
lportal10: lac-portal@A000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xA000 0x1000>;
|
||||
};
|
||||
|
||||
lportal11: lac-portal@B000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xB000 0x1000>;
|
||||
};
|
||||
|
||||
lportal12: lac-portal@C000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xC000 0x1000>;
|
||||
};
|
||||
|
||||
lportal13: lac-portal@D000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xD000 0x1000>;
|
||||
};
|
||||
|
||||
lportal14: lac-portal@E000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xE000 0x1000>;
|
||||
};
|
||||
|
||||
lportal15: lac-portal@F000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xF000 0x1000>;
|
||||
};
|
||||
|
||||
lportal16: lac-portal@10000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x10000 0x1000>;
|
||||
};
|
||||
|
||||
lportal17: lac-portal@11000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
|
||||
lportal18: lac-portal@1200 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
|
||||
lportal19: lac-portal@13000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x13000 0x1000>;
|
||||
};
|
||||
|
||||
lportal20: lac-portal@14000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x14000 0x1000>;
|
||||
};
|
||||
|
||||
lportal21: lac-portal@15000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x15000 0x1000>;
|
||||
};
|
||||
|
||||
lportal22: lac-portal@16000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x16000 0x1000>;
|
||||
};
|
||||
|
||||
lportal23: lac-portal@17000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x17000 0x1000>;
|
||||
};
|
||||
|
|
@ -1,45 +0,0 @@
|
|||
/*
|
||||
* T4 Interlaken Look-aside Controller (LAC) device tree stub
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
lac: lac@229000 {
|
||||
compatible = "fsl,interlaken-lac";
|
||||
reg = <0x229000 0x1000>;
|
||||
interrupts = <16 2 1 18>;
|
||||
};
|
||||
|
||||
lac-hv@228000 {
|
||||
compatible = "fsl,interlaken-lac-hv";
|
||||
reg = <0x228000 0x1000>;
|
||||
fsl,non-hv-node = <&lac>;
|
||||
};
|
||||
|
|
@ -1,43 +0,0 @@
|
|||
/*
|
||||
* PQ3 MPIC Message (Group B) device tree stub [ controller @ offset 0x42400 ]
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
message@42400 {
|
||||
compatible = "fsl,mpic-v3.1-msgr";
|
||||
reg = <0x42400 0x200>;
|
||||
interrupts = <
|
||||
0xb4 2 0 0
|
||||
0xb5 2 0 0
|
||||
0xb6 2 0 0
|
||||
0xb7 2 0 0>;
|
||||
};
|
||||
|
|
@ -1,80 +0,0 @@
|
|||
/*
|
||||
* QorIQ FMan v3 1g port #1 device tree stub [ controller @ offset 0x400000 ]
|
||||
*
|
||||
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
fman@400000 {
|
||||
fman0_rx_0x09: port@89000 {
|
||||
cell-index = <0x9>;
|
||||
compatible = "fsl,fman-v3-port-rx";
|
||||
reg = <0x89000 0x1000>;
|
||||
fsl,fman-10g-port;
|
||||
fsl,fman-best-effort-port;
|
||||
};
|
||||
|
||||
fman0_tx_0x29: port@a9000 {
|
||||
cell-index = <0x29>;
|
||||
compatible = "fsl,fman-v3-port-tx";
|
||||
reg = <0xa9000 0x1000>;
|
||||
fsl,fman-10g-port;
|
||||
fsl,fman-best-effort-port;
|
||||
};
|
||||
|
||||
ethernet@e2000 {
|
||||
cell-index = <1>;
|
||||
compatible = "fsl,fman-memac";
|
||||
reg = <0xe2000 0x1000>;
|
||||
fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
|
||||
ptp-timer = <&ptp_timer0>;
|
||||
pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
|
||||
pcs-handle-names = "sgmii", "qsgmii";
|
||||
};
|
||||
|
||||
mdio@e1000 {
|
||||
qsgmiia_pcs1: ethernet-pcs@1 {
|
||||
compatible = "fsl,lynx-pcs";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio@e3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
|
||||
reg = <0xe3000 0x1000>;
|
||||
fsl,erratum-a011043; /* must ignore read errors */
|
||||
|
||||
pcsphy1: ethernet-phy@0 {
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -37,7 +37,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x08000000>; // 128MB at 0
|
||||
};
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x08000000>; // 128MB at 0
|
||||
};
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@
|
|||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
model = "MPC8313ERDB";
|
||||
|
|
@ -38,7 +39,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x08000000>; // 128MB at 0
|
||||
};
|
||||
|
|
@ -48,7 +49,7 @@
|
|||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
|
||||
reg = <0xe0005000 0x1000>;
|
||||
interrupts = <77 0x8>;
|
||||
interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
|
||||
// CS0 and CS1 are swapped when
|
||||
|
|
@ -118,7 +119,7 @@
|
|||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <14 0x8>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
dfsrr;
|
||||
rtc@68 {
|
||||
|
|
@ -131,7 +132,7 @@
|
|||
compatible = "fsl,sec2.2", "fsl,sec2.1",
|
||||
"fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <11 0x8>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
fsl,num-channels = <1>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
|
|
@ -146,7 +147,7 @@
|
|||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <15 0x8>;
|
||||
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
|
@ -155,7 +156,7 @@
|
|||
cell-index = <0>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <0x7000 0x1000>;
|
||||
interrupts = <16 0x8>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
mode = "cpu";
|
||||
};
|
||||
|
|
@ -167,7 +168,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <38 0x8>;
|
||||
interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
|
||||
phy_type = "utmi_wide";
|
||||
sleep = <&pmc 0x00300000>;
|
||||
};
|
||||
|
|
@ -175,7 +176,8 @@
|
|||
ptp_clock@24E00 {
|
||||
compatible = "fsl,etsec-ptp";
|
||||
reg = <0x24E00 0xB0>;
|
||||
interrupts = <12 0x8 13 0x8>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
|
||||
<13 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = < &ipic >;
|
||||
fsl,tclk-period = <10>;
|
||||
fsl,tmr-prsc = <100>;
|
||||
|
|
@ -197,7 +199,9 @@
|
|||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <37 0x8 36 0x8 35 0x8>;
|
||||
interrupts = <37 IRQ_TYPE_LEVEL_LOW>,
|
||||
<36 IRQ_TYPE_LEVEL_LOW>,
|
||||
<35 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
tbi-handle = < &tbi0 >;
|
||||
/* Vitesse 7385 isn't on the MDIO bus */
|
||||
|
|
@ -211,7 +215,7 @@
|
|||
reg = <0x520 0x20>;
|
||||
phy4: ethernet-phy@4 {
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <20 0x8>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
|
||||
reg = <0x4>;
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
|
|
@ -231,7 +235,9 @@
|
|||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <34 0x8 33 0x8 32 0x8>;
|
||||
interrupts = <34 IRQ_TYPE_LEVEL_LOW>,
|
||||
<33 IRQ_TYPE_LEVEL_LOW>,
|
||||
<32 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
tbi-handle = < &tbi1 >;
|
||||
phy-handle = < &phy4 >;
|
||||
|
|
@ -259,7 +265,7 @@
|
|||
compatible = "fsl,ns16550", "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <9 0x8>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
|
|
@ -269,15 +275,12 @@
|
|||
compatible = "fsl,ns16550", "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <10 0x8>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
/* IPIC
|
||||
* interrupts cell = <intr #, sense>
|
||||
* sense values match linux IORESOURCE_IRQ_* defines:
|
||||
* sense == 8: Level, low assertion
|
||||
* sense == 2: Edge, high-to-low change
|
||||
* interrupts cell = <intr #, type>
|
||||
*/
|
||||
ipic: pic@700 {
|
||||
interrupt-controller;
|
||||
|
|
@ -290,7 +293,7 @@
|
|||
pmc: power@b00 {
|
||||
compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc";
|
||||
reg = <0xb00 0x100 0xa00 0x100>;
|
||||
interrupts = <80 8>;
|
||||
interrupts = <80 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
fsl,mpc8313-wakeup-timer = <>m1>;
|
||||
|
||||
|
|
@ -306,14 +309,20 @@
|
|||
gtm1: timer@500 {
|
||||
compatible = "fsl,mpc8313-gtm", "fsl,gtm";
|
||||
reg = <0x500 0x100>;
|
||||
interrupts = <90 8 78 8 84 8 72 8>;
|
||||
interrupts = <90 IRQ_TYPE_LEVEL_LOW>,
|
||||
<78 IRQ_TYPE_LEVEL_LOW>,
|
||||
<84 IRQ_TYPE_LEVEL_LOW>,
|
||||
<72 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
timer@600 {
|
||||
compatible = "fsl,mpc8313-gtm", "fsl,gtm";
|
||||
reg = <0x600 0x100>;
|
||||
interrupts = <91 8 79 8 85 8 73 8>;
|
||||
interrupts = <91 IRQ_TYPE_LEVEL_LOW>,
|
||||
<79 IRQ_TYPE_LEVEL_LOW>,
|
||||
<85 IRQ_TYPE_LEVEL_LOW>,
|
||||
<73 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
};
|
||||
|
|
@ -341,7 +350,7 @@
|
|||
0x7800 0x0 0x0 0x3 &ipic 17 0x8
|
||||
0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <66 0x8>;
|
||||
interrupts = <66 IRQ_TYPE_LEVEL_LOW>;
|
||||
bus-range = <0x0 0x0>;
|
||||
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
|
||||
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
|
||||
|
|
@ -363,14 +372,14 @@
|
|||
reg = <0xe00082a8 4>;
|
||||
ranges = <0 0xe0008100 0x1a8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8313-dma-channel",
|
||||
"fsl,elo-dma-channel";
|
||||
reg = <0 0x28>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
|
||||
cell-index = <0>;
|
||||
};
|
||||
|
||||
|
|
@ -379,7 +388,7 @@
|
|||
"fsl,elo-dma-channel";
|
||||
reg = <0x80 0x28>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
|
||||
cell-index = <1>;
|
||||
};
|
||||
|
||||
|
|
@ -388,7 +397,7 @@
|
|||
"fsl,elo-dma-channel";
|
||||
reg = <0x100 0x28>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
|
||||
cell-index = <2>;
|
||||
};
|
||||
|
||||
|
|
@ -397,7 +406,7 @@
|
|||
"fsl,elo-dma-channel";
|
||||
reg = <0x180 0x28>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
|
||||
cell-index = <3>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x08000000>; // 128MB at 0
|
||||
};
|
||||
|
|
@ -50,7 +50,7 @@
|
|||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
|
||||
reg = <0xe0005000 0x1000>;
|
||||
interrupts = <77 0x8>;
|
||||
interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
|
||||
// CS0 and CS1 are swapped when
|
||||
|
|
@ -112,7 +112,7 @@
|
|||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <14 0x8>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
dfsrr;
|
||||
rtc@68 {
|
||||
|
|
@ -133,8 +133,10 @@
|
|||
cell-index = <0>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <0x7000 0x1000>;
|
||||
interrupts = <16 0x8>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mode = "cpu";
|
||||
};
|
||||
|
||||
|
|
@ -145,35 +147,35 @@
|
|||
reg = <0x82a8 4>;
|
||||
ranges = <0 0x8100 0x1a8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
|
||||
reg = <0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
|
||||
reg = <0x180 0x28>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <71 8>;
|
||||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -183,7 +185,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <38 0x8>;
|
||||
interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
|
||||
phy_type = "utmi";
|
||||
};
|
||||
|
||||
|
|
@ -197,7 +199,9 @@
|
|||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <32 0x8 33 0x8 34 0x8>;
|
||||
interrupts = <32 IRQ_TYPE_LEVEL_LOW>,
|
||||
<33 IRQ_TYPE_LEVEL_LOW>,
|
||||
<34 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = < &phy0 >;
|
||||
|
|
@ -238,7 +242,9 @@
|
|||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 0x8 36 0x8 37 0x8>;
|
||||
interrupts = <35 IRQ_TYPE_LEVEL_LOW>,
|
||||
<36 IRQ_TYPE_LEVEL_LOW>,
|
||||
<37 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = < &phy1 >;
|
||||
|
|
@ -263,7 +269,7 @@
|
|||
compatible = "fsl,ns16550", "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <133333333>;
|
||||
interrupts = <9 0x8>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
|
|
@ -273,7 +279,7 @@
|
|||
compatible = "fsl,ns16550", "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <133333333>;
|
||||
interrupts = <10 0x8>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
|
|
@ -282,7 +288,7 @@
|
|||
"fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
|
||||
"fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <11 0x8>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
|
|
@ -294,7 +300,7 @@
|
|||
compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
|
||||
reg = <0x18000 0x1000>;
|
||||
cell-index = <1>;
|
||||
interrupts = <44 0x8>;
|
||||
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
|
|
@ -302,14 +308,17 @@
|
|||
compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
|
||||
reg = <0x19000 0x1000>;
|
||||
cell-index = <2>;
|
||||
interrupts = <45 0x8>;
|
||||
interrupts = <45 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
gtm1: timer@500 {
|
||||
compatible = "fsl,mpc8315-gtm", "fsl,gtm";
|
||||
reg = <0x500 0x100>;
|
||||
interrupts = <90 8 78 8 84 8 72 8>;
|
||||
interrupts = <90 IRQ_TYPE_LEVEL_LOW>,
|
||||
<78 IRQ_TYPE_LEVEL_LOW>,
|
||||
<84 IRQ_TYPE_LEVEL_LOW>,
|
||||
<72 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
clock-frequency = <133333333>;
|
||||
};
|
||||
|
|
@ -317,16 +326,16 @@
|
|||
timer@600 {
|
||||
compatible = "fsl,mpc8315-gtm", "fsl,gtm";
|
||||
reg = <0x600 0x100>;
|
||||
interrupts = <91 8 79 8 85 8 73 8>;
|
||||
interrupts = <91 IRQ_TYPE_LEVEL_LOW>,
|
||||
<79 IRQ_TYPE_LEVEL_LOW>,
|
||||
<85 IRQ_TYPE_LEVEL_LOW>,
|
||||
<73 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
clock-frequency = <133333333>;
|
||||
};
|
||||
|
||||
/* IPIC
|
||||
* interrupts cell = <intr #, sense>
|
||||
* sense values match linux IORESOURCE_IRQ_* defines:
|
||||
* sense == 8: Level, low assertion
|
||||
* sense == 2: Edge, high-to-low change
|
||||
* interrupts cell = <intr #, type>
|
||||
*/
|
||||
ipic: interrupt-controller@700 {
|
||||
interrupt-controller;
|
||||
|
|
@ -340,14 +349,14 @@
|
|||
compatible = "fsl,ipic-msi";
|
||||
reg = <0x7c0 0x40>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <0x43 0x8
|
||||
0x4 0x8
|
||||
0x51 0x8
|
||||
0x52 0x8
|
||||
0x56 0x8
|
||||
0x57 0x8
|
||||
0x58 0x8
|
||||
0x59 0x8>;
|
||||
interrupts = <0x43 IRQ_TYPE_LEVEL_LOW
|
||||
0x4 IRQ_TYPE_LEVEL_LOW
|
||||
0x51 IRQ_TYPE_LEVEL_LOW
|
||||
0x52 IRQ_TYPE_LEVEL_LOW
|
||||
0x56 IRQ_TYPE_LEVEL_LOW
|
||||
0x57 IRQ_TYPE_LEVEL_LOW
|
||||
0x58 IRQ_TYPE_LEVEL_LOW
|
||||
0x59 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = < &ipic >;
|
||||
};
|
||||
|
||||
|
|
@ -355,7 +364,7 @@
|
|||
compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc",
|
||||
"fsl,mpc8349-pmc";
|
||||
reg = <0xb00 0x100 0xa00 0x100>;
|
||||
interrupts = <80 8>;
|
||||
interrupts = <80 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
fsl,mpc8313-wakeup-timer = <>m1>;
|
||||
};
|
||||
|
|
@ -374,24 +383,24 @@
|
|||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0E -mini PCI */
|
||||
0x7000 0x0 0x0 0x1 &ipic 18 0x8
|
||||
0x7000 0x0 0x0 0x2 &ipic 18 0x8
|
||||
0x7000 0x0 0x0 0x3 &ipic 18 0x8
|
||||
0x7000 0x0 0x0 0x4 &ipic 18 0x8
|
||||
0x7000 0x0 0x0 0x1 &ipic 18 IRQ_TYPE_LEVEL_LOW
|
||||
0x7000 0x0 0x0 0x2 &ipic 18 IRQ_TYPE_LEVEL_LOW
|
||||
0x7000 0x0 0x0 0x3 &ipic 18 IRQ_TYPE_LEVEL_LOW
|
||||
0x7000 0x0 0x0 0x4 &ipic 18 IRQ_TYPE_LEVEL_LOW
|
||||
|
||||
/* IDSEL 0x0F -mini PCI */
|
||||
0x7800 0x0 0x0 0x1 &ipic 17 0x8
|
||||
0x7800 0x0 0x0 0x2 &ipic 17 0x8
|
||||
0x7800 0x0 0x0 0x3 &ipic 17 0x8
|
||||
0x7800 0x0 0x0 0x4 &ipic 17 0x8
|
||||
0x7800 0x0 0x0 0x1 &ipic 17 IRQ_TYPE_LEVEL_LOW
|
||||
0x7800 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW
|
||||
0x7800 0x0 0x0 0x3 &ipic 17 IRQ_TYPE_LEVEL_LOW
|
||||
0x7800 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW
|
||||
|
||||
/* IDSEL 0x10 - PCI slot */
|
||||
0x8000 0x0 0x0 0x1 &ipic 48 0x8
|
||||
0x8000 0x0 0x0 0x2 &ipic 17 0x8
|
||||
0x8000 0x0 0x0 0x3 &ipic 48 0x8
|
||||
0x8000 0x0 0x0 0x4 &ipic 17 0x8>;
|
||||
0x8000 0x0 0x0 0x1 &ipic 48 IRQ_TYPE_LEVEL_LOW
|
||||
0x8000 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW
|
||||
0x8000 0x0 0x0 0x3 &ipic 48 IRQ_TYPE_LEVEL_LOW
|
||||
0x8000 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <66 0x8>;
|
||||
interrupts = <66 IRQ_TYPE_LEVEL_LOW>;
|
||||
bus-range = <0x0 0x0>;
|
||||
ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
|
||||
0x42000000 0 0x80000000 0x80000000 0 0x10000000
|
||||
|
|
@ -417,10 +426,10 @@
|
|||
0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
|
||||
bus-range = <0 255>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &ipic 1 8
|
||||
0 0 0 2 &ipic 1 8
|
||||
0 0 0 3 &ipic 1 8
|
||||
0 0 0 4 &ipic 1 8>;
|
||||
interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW
|
||||
0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW
|
||||
0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW
|
||||
0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>;
|
||||
clock-frequency = <0>;
|
||||
|
||||
pcie@0 {
|
||||
|
|
@ -448,10 +457,10 @@
|
|||
0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
|
||||
bus-range = <0 255>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &ipic 2 8
|
||||
0 0 0 2 &ipic 2 8
|
||||
0 0 0 3 &ipic 2 8
|
||||
0 0 0 4 &ipic 2 8>;
|
||||
interrupt-map = <0 0 0 1 &ipic 2 IRQ_TYPE_LEVEL_LOW
|
||||
0 0 0 2 &ipic 2 IRQ_TYPE_LEVEL_LOW
|
||||
0 0 0 3 &ipic 2 IRQ_TYPE_LEVEL_LOW
|
||||
0 0 0 4 &ipic 2 IRQ_TYPE_LEVEL_LOW>;
|
||||
clock-frequency = <0>;
|
||||
|
||||
pcie@0 {
|
||||
|
|
@ -471,12 +480,12 @@
|
|||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
pwr {
|
||||
led-pwr {
|
||||
gpios = <&mcu_pio 0 0>;
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
hdd {
|
||||
led-hdd {
|
||||
gpios = <&mcu_pio 1 0>;
|
||||
linux,default-trigger = "disk-activity";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x04000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -39,7 +39,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x10000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x10000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -39,7 +39,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x10000000>; // 256MB at 0
|
||||
};
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; // 512MB at 0
|
||||
};
|
||||
|
|
|
|||
|
|
@ -39,7 +39,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x10000000>; // 256MB at 0
|
||||
};
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x10000000>; // 256MB at 0
|
||||
};
|
||||
|
|
|
|||
|
|
@ -120,10 +120,8 @@
|
|||
|
||||
#if defined(CONFIG_44x)
|
||||
#include <asm/nohash/32/pte-44x.h>
|
||||
#elif defined(CONFIG_PPC_85xx) && defined(CONFIG_PTE_64BIT)
|
||||
#include <asm/nohash/pte-e500.h>
|
||||
#elif defined(CONFIG_PPC_85xx)
|
||||
#include <asm/nohash/32/pte-85xx.h>
|
||||
#include <asm/nohash/pte-e500.h>
|
||||
#elif defined(CONFIG_PPC_8xx)
|
||||
#include <asm/nohash/32/pte-8xx.h>
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,59 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _ASM_POWERPC_NOHASH_32_PTE_85xx_H
|
||||
#define _ASM_POWERPC_NOHASH_32_PTE_85xx_H
|
||||
#ifdef __KERNEL__
|
||||
|
||||
/* PTE bit definitions for Freescale BookE SW loaded TLB MMU based
|
||||
* processors
|
||||
*
|
||||
MMU Assist Register 3:
|
||||
|
||||
32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63
|
||||
RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR
|
||||
|
||||
- PRESENT *must* be in the bottom two bits because swap PTEs use
|
||||
the top 30 bits.
|
||||
|
||||
*/
|
||||
|
||||
/* Definitions for FSL Book-E Cores */
|
||||
#define _PAGE_READ 0x00001 /* H: Read permission (SR) */
|
||||
#define _PAGE_PRESENT 0x00002 /* S: PTE contains a translation */
|
||||
#define _PAGE_WRITE 0x00004 /* S: Write permission (SW) */
|
||||
#define _PAGE_DIRTY 0x00008 /* S: Page dirty */
|
||||
#define _PAGE_EXEC 0x00010 /* H: SX permission */
|
||||
#define _PAGE_ACCESSED 0x00020 /* S: Page referenced */
|
||||
|
||||
#define _PAGE_ENDIAN 0x00040 /* H: E bit */
|
||||
#define _PAGE_GUARDED 0x00080 /* H: G bit */
|
||||
#define _PAGE_COHERENT 0x00100 /* H: M bit */
|
||||
#define _PAGE_NO_CACHE 0x00200 /* H: I bit */
|
||||
#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
|
||||
#define _PAGE_SPECIAL 0x00800 /* S: Special page */
|
||||
|
||||
#define _PMD_PRESENT 0
|
||||
#define _PMD_PRESENT_MASK (PAGE_MASK)
|
||||
#define _PMD_BAD (~PAGE_MASK)
|
||||
#define _PMD_USER 0
|
||||
|
||||
#define _PTE_NONE_MASK 0
|
||||
|
||||
#define PTE_WIMGE_SHIFT (6)
|
||||
|
||||
/*
|
||||
* We define 2 sets of base prot bits, one for basic pages (ie,
|
||||
* cacheable kernel and user pages) and one for non cacheable
|
||||
* pages. We always set _PAGE_COHERENT when SMP is enabled or
|
||||
* the processor might need it for DMA coherency.
|
||||
*/
|
||||
#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
|
||||
#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
|
||||
#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
|
||||
#else
|
||||
#define _PAGE_BASE (_PAGE_BASE_NC)
|
||||
#endif
|
||||
|
||||
#include <asm/pgtable-masks.h>
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_POWERPC_NOHASH_32_PTE_FSL_85xx_H */
|
||||
|
|
@ -49,7 +49,7 @@ static inline unsigned long pud_val(pud_t x)
|
|||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
/* PGD level */
|
||||
#if defined(CONFIG_PPC_85xx) && defined(CONFIG_PTE_64BIT)
|
||||
#if defined(CONFIG_PPC_85xx)
|
||||
typedef struct { unsigned long long pgd; } pgd_t;
|
||||
|
||||
static inline unsigned long long pgd_val(pgd_t x)
|
||||
|
|
|
|||
|
|
@ -255,7 +255,7 @@ __gus_failed: \
|
|||
".section .fixup,\"ax\"\n" \
|
||||
"4: li %0,%3\n" \
|
||||
" li %1,0\n" \
|
||||
" li %1+1,0\n" \
|
||||
" li %L1,0\n" \
|
||||
" b 3b\n" \
|
||||
".previous\n" \
|
||||
EX_TABLE(1b, 4b) \
|
||||
|
|
|
|||
|
|
@ -305,7 +305,6 @@ set_ivor:
|
|||
* r12 is pointer to the pte
|
||||
* r10 is the pshift from the PGD, if we're a hugepage
|
||||
*/
|
||||
#ifdef CONFIG_PTE_64BIT
|
||||
#ifdef CONFIG_HUGETLB_PAGE
|
||||
#define FIND_PTE \
|
||||
rlwinm r12, r13, 14, 18, 28; /* Compute pgdir/pmd offset */ \
|
||||
|
|
@ -329,15 +328,6 @@ set_ivor:
|
|||
rlwimi r12, r13, 23, 20, 28; /* Compute pte address */ \
|
||||
lwz r11, 4(r12); /* Get pte entry */
|
||||
#endif /* HUGEPAGE */
|
||||
#else /* !PTE_64BIT */
|
||||
#define FIND_PTE \
|
||||
rlwimi r11, r13, 12, 20, 29; /* Create L1 (pgdir/pmd) address */ \
|
||||
lwz r11, 0(r11); /* Get L1 entry */ \
|
||||
rlwinm. r12, r11, 0, 0, 19; /* Extract L2 (pte) base address */ \
|
||||
beq 2f; /* Bail if no table */ \
|
||||
rlwimi r12, r13, 22, 20, 29; /* Compute PTE address */ \
|
||||
lwz r11, 0(r12); /* Get Linux PTE */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Interrupt vector entry code
|
||||
|
|
@ -473,21 +463,15 @@ END_BTB_FLUSH_SECTION
|
|||
4:
|
||||
FIND_PTE
|
||||
|
||||
#ifdef CONFIG_PTE_64BIT
|
||||
li r13,_PAGE_PRESENT|_PAGE_BAP_SR
|
||||
oris r13,r13,_PAGE_ACCESSED@h
|
||||
#else
|
||||
li r13,_PAGE_PRESENT|_PAGE_READ|_PAGE_ACCESSED
|
||||
#endif
|
||||
andc. r13,r13,r11 /* Check permission */
|
||||
|
||||
#ifdef CONFIG_PTE_64BIT
|
||||
#ifdef CONFIG_SMP
|
||||
subf r13,r11,r12 /* create false data dep */
|
||||
lwzx r13,r11,r13 /* Get upper pte bits */
|
||||
#else
|
||||
lwz r13,0(r12) /* Get upper pte bits */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
bne 2f /* Bail if permission/valid mismatch */
|
||||
|
|
@ -552,12 +536,8 @@ END_BTB_FLUSH_SECTION
|
|||
|
||||
FIND_PTE
|
||||
/* Make up the required permissions for kernel code */
|
||||
#ifdef CONFIG_PTE_64BIT
|
||||
li r13,_PAGE_PRESENT | _PAGE_BAP_SX
|
||||
oris r13,r13,_PAGE_ACCESSED@h
|
||||
#else
|
||||
li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
|
||||
#endif
|
||||
b 4f
|
||||
|
||||
/* Get the PGD for the current thread */
|
||||
|
|
@ -573,23 +553,17 @@ END_BTB_FLUSH_SECTION
|
|||
|
||||
FIND_PTE
|
||||
/* Make up the required permissions for user code */
|
||||
#ifdef CONFIG_PTE_64BIT
|
||||
li r13,_PAGE_PRESENT | _PAGE_BAP_UX
|
||||
oris r13,r13,_PAGE_ACCESSED@h
|
||||
#else
|
||||
li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
|
||||
#endif
|
||||
|
||||
4:
|
||||
andc. r13,r13,r11 /* Check permission */
|
||||
|
||||
#ifdef CONFIG_PTE_64BIT
|
||||
#ifdef CONFIG_SMP
|
||||
subf r13,r11,r12 /* create false data dep */
|
||||
lwzx r13,r11,r13 /* Get upper pte bits */
|
||||
#else
|
||||
lwz r13,0(r12) /* Get upper pte bits */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
bne 2f /* Bail if permission mismatch */
|
||||
|
|
@ -683,7 +657,7 @@ interrupt_end:
|
|||
* r10 - tsize encoding (if HUGETLB_PAGE) or available to use
|
||||
* r11 - TLB (info from Linux PTE)
|
||||
* r12 - available to use
|
||||
* r13 - upper bits of PTE (if PTE_64BIT) or available to use
|
||||
* r13 - upper bits of PTE
|
||||
* CR5 - results of addr >= PAGE_OFFSET
|
||||
* MAS0, MAS1 - loaded with proper value when we get here
|
||||
* MAS2, MAS3 - will need additional info from Linux PTE
|
||||
|
|
@ -751,7 +725,6 @@ finish_tlb_load:
|
|||
* here we (properly should) assume have the appropriate value.
|
||||
*/
|
||||
finish_tlb_load_cont:
|
||||
#ifdef CONFIG_PTE_64BIT
|
||||
rlwinm r12, r11, 32-2, 26, 31 /* Move in perm bits */
|
||||
andi. r10, r11, _PAGE_DIRTY
|
||||
bne 1f
|
||||
|
|
@ -764,26 +737,9 @@ BEGIN_MMU_FTR_SECTION
|
|||
srwi r10, r13, 12 /* grab RPN[12:31] */
|
||||
mtspr SPRN_MAS7, r10
|
||||
END_MMU_FTR_SECTION_IFSET(MMU_FTR_BIG_PHYS)
|
||||
#else
|
||||
li r10, (_PAGE_EXEC | _PAGE_READ)
|
||||
mr r13, r11
|
||||
rlwimi r10, r11, 31, 29, 29 /* extract _PAGE_DIRTY into SW */
|
||||
and r12, r11, r10
|
||||
mcrf cr0, cr5 /* Test for user page */
|
||||
slwi r10, r12, 1
|
||||
or r10, r10, r12
|
||||
rlwinm r10, r10, 0, ~_PAGE_EXEC /* Clear SX on user pages */
|
||||
isellt r12, r10, r12
|
||||
rlwimi r13, r12, 0, 20, 31 /* Get RPN from PTE, merge w/ perms */
|
||||
mtspr SPRN_MAS3, r13
|
||||
#endif
|
||||
|
||||
mfspr r12, SPRN_MAS2
|
||||
#ifdef CONFIG_PTE_64BIT
|
||||
rlwimi r12, r11, 32-19, 27, 31 /* extract WIMGE from pte */
|
||||
#else
|
||||
rlwimi r12, r11, 26, 27, 31 /* extract WIMGE from pte */
|
||||
#endif
|
||||
#ifdef CONFIG_HUGETLB_PAGE
|
||||
beq 6, 3f /* don't mask if page isn't huge */
|
||||
li r13, 1
|
||||
|
|
|
|||
|
|
@ -212,6 +212,13 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
|
|||
dev->error_state = pci_channel_io_normal;
|
||||
dev->dma_mask = 0xffffffff;
|
||||
|
||||
/*
|
||||
* Assume 64-bit addresses for MSI initially. Will be changed to 32-bit
|
||||
* if MSI (rather than MSI-X) capability does not have
|
||||
* PCI_MSI_FLAGS_64BIT. Can also be overridden by driver.
|
||||
*/
|
||||
dev->msi_addr_mask = DMA_BIT_MASK(64);
|
||||
|
||||
/* Early fixups, before probing the BARs */
|
||||
pci_fixup_device(pci_fixup_early, dev);
|
||||
|
||||
|
|
|
|||
|
|
@ -2893,7 +2893,8 @@ static void __init fixup_device_tree_pmac(void)
|
|||
for (node = 0; prom_next_node(&node); ) {
|
||||
type[0] = '\0';
|
||||
prom_getprop(node, "device_type", type, sizeof(type));
|
||||
if (prom_strcmp(type, "escc") && prom_strcmp(type, "i2s"))
|
||||
if (prom_strcmp(type, "escc") && prom_strcmp(type, "i2s") &&
|
||||
prom_strcmp(type, "media-bay"))
|
||||
continue;
|
||||
|
||||
if (prom_getproplen(node, "#size-cells") != PROM_ERROR)
|
||||
|
|
|
|||
|
|
@ -37,11 +37,29 @@ unsigned long ftrace_call_adjust(unsigned long addr)
|
|||
if (addr >= (unsigned long)__exittext_begin && addr < (unsigned long)__exittext_end)
|
||||
return 0;
|
||||
|
||||
if (IS_ENABLED(CONFIG_ARCH_USING_PATCHABLE_FUNCTION_ENTRY) &&
|
||||
!IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {
|
||||
addr += MCOUNT_INSN_SIZE;
|
||||
if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS))
|
||||
if (IS_ENABLED(CONFIG_ARCH_USING_PATCHABLE_FUNCTION_ENTRY)) {
|
||||
if (!IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {
|
||||
addr += MCOUNT_INSN_SIZE;
|
||||
if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS))
|
||||
addr += MCOUNT_INSN_SIZE;
|
||||
} else if (IS_ENABLED(CONFIG_CC_IS_CLANG) && IS_ENABLED(CONFIG_PPC64)) {
|
||||
/*
|
||||
* addr points to global entry point though the NOP was emitted at local
|
||||
* entry point due to https://github.com/llvm/llvm-project/issues/163706
|
||||
* Handle that here with ppc_function_entry() for kernel symbols while
|
||||
* adjusting module addresses in the else case, by looking for the below
|
||||
* module global entry point sequence:
|
||||
* ld r2, -8(r12)
|
||||
* add r2, r2, r12
|
||||
*/
|
||||
if (is_kernel_text(addr) || is_kernel_inittext(addr))
|
||||
addr = ppc_function_entry((void *)addr);
|
||||
else if ((ppc_inst_val(ppc_inst_read((u32 *)addr)) ==
|
||||
PPC_RAW_LD(_R2, _R12, -8)) &&
|
||||
(ppc_inst_val(ppc_inst_read((u32 *)(addr+4))) ==
|
||||
PPC_RAW_ADD(_R2, _R2, _R12)))
|
||||
addr += 8;
|
||||
}
|
||||
}
|
||||
|
||||
return addr;
|
||||
|
|
|
|||
|
|
@ -397,6 +397,7 @@ SECTIONS
|
|||
_end = . ;
|
||||
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
DISCARDS
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
#include <asm/firmware.h>
|
||||
|
||||
#define cpu_to_be_ulong __PASTE(cpu_to_be, BITS_PER_LONG)
|
||||
#define __be_word __PASTE(__be, BITS_PER_LONG)
|
||||
|
||||
#ifdef CONFIG_CRASH_DUMP
|
||||
void machine_crash_shutdown(struct pt_regs *regs)
|
||||
|
|
@ -146,25 +147,25 @@ int __init overlaps_crashkernel(unsigned long start, unsigned long size)
|
|||
}
|
||||
|
||||
/* Values we need to export to the second kernel via the device tree. */
|
||||
static phys_addr_t crashk_base;
|
||||
static phys_addr_t crashk_size;
|
||||
static unsigned long long mem_limit;
|
||||
static __be_word crashk_base;
|
||||
static __be_word crashk_size;
|
||||
static __be_word mem_limit;
|
||||
|
||||
static struct property crashk_base_prop = {
|
||||
.name = "linux,crashkernel-base",
|
||||
.length = sizeof(phys_addr_t),
|
||||
.length = sizeof(__be_word),
|
||||
.value = &crashk_base
|
||||
};
|
||||
|
||||
static struct property crashk_size_prop = {
|
||||
.name = "linux,crashkernel-size",
|
||||
.length = sizeof(phys_addr_t),
|
||||
.length = sizeof(__be_word),
|
||||
.value = &crashk_size,
|
||||
};
|
||||
|
||||
static struct property memory_limit_prop = {
|
||||
.name = "linux,memory-limit",
|
||||
.length = sizeof(unsigned long long),
|
||||
.length = sizeof(__be_word),
|
||||
.value = &mem_limit,
|
||||
};
|
||||
|
||||
|
|
@ -193,11 +194,11 @@ static void __init export_crashk_values(struct device_node *node)
|
|||
}
|
||||
#endif /* CONFIG_CRASH_RESERVE */
|
||||
|
||||
static phys_addr_t kernel_end;
|
||||
static __be_word kernel_end;
|
||||
|
||||
static struct property kernel_end_prop = {
|
||||
.name = "linux,kernel-end",
|
||||
.length = sizeof(phys_addr_t),
|
||||
.length = sizeof(__be_word),
|
||||
.value = &kernel_end,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -450,6 +450,11 @@ static int load_elfcorehdr_segment(struct kimage *image, struct kexec_buf *kbuf)
|
|||
kbuf->buffer = headers;
|
||||
kbuf->mem = KEXEC_BUF_MEM_UNKNOWN;
|
||||
kbuf->bufsz = headers_sz;
|
||||
|
||||
/*
|
||||
* Account for extra space required to accommodate additional memory
|
||||
* ranges in elfcorehdr due to memory hotplug events.
|
||||
*/
|
||||
kbuf->memsz = headers_sz + kdump_extra_elfcorehdr_size(cmem);
|
||||
kbuf->top_down = false;
|
||||
|
||||
|
|
@ -460,7 +465,14 @@ static int load_elfcorehdr_segment(struct kimage *image, struct kexec_buf *kbuf)
|
|||
}
|
||||
|
||||
image->elf_load_addr = kbuf->mem;
|
||||
image->elf_headers_sz = headers_sz;
|
||||
|
||||
/*
|
||||
* If CONFIG_CRASH_HOTPLUG is enabled, the elfcorehdr kexec segment
|
||||
* memsz can be larger than bufsz. Always initialize elf_headers_sz
|
||||
* with memsz. This ensures the correct size is reserved for elfcorehdr
|
||||
* memory in the FDT prepared for kdump.
|
||||
*/
|
||||
image->elf_headers_sz = kbuf->memsz;
|
||||
image->elf_headers = headers;
|
||||
out:
|
||||
kfree(cmem);
|
||||
|
|
|
|||
|
|
@ -81,9 +81,6 @@
|
|||
|
||||
#ifdef CONFIG_PPC64
|
||||
|
||||
/* for gpr non volatile registers BPG_REG_6 to 10 */
|
||||
#define BPF_PPC_STACK_SAVE (6 * 8)
|
||||
|
||||
/* If dummy pass (!image), account for maximum possible instructions */
|
||||
#define PPC_LI64(d, i) do { \
|
||||
if (!image) \
|
||||
|
|
@ -219,8 +216,6 @@ int bpf_jit_emit_exit_insn(u32 *image, struct codegen_context *ctx, int tmp_reg,
|
|||
int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, u32 *fimage, int pass,
|
||||
struct codegen_context *ctx, int insn_idx,
|
||||
int jmp_off, int dst_reg, u32 code);
|
||||
|
||||
int bpf_jit_stack_tailcallinfo_offset(struct codegen_context *ctx);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -450,7 +450,7 @@ bool bpf_jit_supports_subprog_tailcalls(void)
|
|||
|
||||
bool bpf_jit_supports_kfunc_call(void)
|
||||
{
|
||||
return true;
|
||||
return IS_ENABLED(CONFIG_PPC64);
|
||||
}
|
||||
|
||||
bool bpf_jit_supports_arena(void)
|
||||
|
|
@ -638,19 +638,12 @@ static int invoke_bpf_mod_ret(u32 *image, u32 *ro_image, struct codegen_context
|
|||
* for the traced function (BPF subprog/callee) to fetch it.
|
||||
*/
|
||||
static void bpf_trampoline_setup_tail_call_info(u32 *image, struct codegen_context *ctx,
|
||||
int func_frame_offset,
|
||||
int bpf_dummy_frame_size, int r4_off)
|
||||
int bpf_frame_size, int r4_off)
|
||||
{
|
||||
if (IS_ENABLED(CONFIG_PPC64)) {
|
||||
/* See Generated stack layout */
|
||||
int tailcallinfo_offset = BPF_PPC_TAILCALL;
|
||||
|
||||
/*
|
||||
* func_frame_offset = ...(1)
|
||||
* bpf_dummy_frame_size + trampoline_frame_size
|
||||
*/
|
||||
EMIT(PPC_RAW_LD(_R4, _R1, func_frame_offset));
|
||||
EMIT(PPC_RAW_LD(_R3, _R4, -tailcallinfo_offset));
|
||||
EMIT(PPC_RAW_LD(_R4, _R1, bpf_frame_size));
|
||||
/* Refer to trampoline's Generated stack layout */
|
||||
EMIT(PPC_RAW_LD(_R3, _R4, -BPF_PPC_TAILCALL));
|
||||
|
||||
/*
|
||||
* Setting the tail_call_info in trampoline's frame
|
||||
|
|
@ -658,22 +651,14 @@ static void bpf_trampoline_setup_tail_call_info(u32 *image, struct codegen_conte
|
|||
*/
|
||||
EMIT(PPC_RAW_CMPLWI(_R3, MAX_TAIL_CALL_CNT));
|
||||
PPC_BCC_CONST_SHORT(COND_GT, 8);
|
||||
EMIT(PPC_RAW_ADDI(_R3, _R4, bpf_jit_stack_tailcallinfo_offset(ctx)));
|
||||
EMIT(PPC_RAW_ADDI(_R3, _R4, -BPF_PPC_TAILCALL));
|
||||
|
||||
/*
|
||||
* From ...(1) above:
|
||||
* trampoline_frame_bottom = ...(2)
|
||||
* func_frame_offset - bpf_dummy_frame_size
|
||||
*
|
||||
* Using ...(2) derived above:
|
||||
* trampoline_tail_call_info_offset = ...(3)
|
||||
* trampoline_frame_bottom - tailcallinfo_offset
|
||||
*
|
||||
* From ...(3):
|
||||
* Use trampoline_tail_call_info_offset to write reference of main's
|
||||
* tail_call_info in trampoline frame.
|
||||
* Trampoline's tail_call_info is at the same offset, as that of
|
||||
* any bpf program, with reference to previous frame. Update the
|
||||
* address of main's tail_call_info in trampoline frame.
|
||||
*/
|
||||
EMIT(PPC_RAW_STL(_R3, _R1, (func_frame_offset - bpf_dummy_frame_size)
|
||||
- tailcallinfo_offset));
|
||||
EMIT(PPC_RAW_STL(_R3, _R1, bpf_frame_size - BPF_PPC_TAILCALL));
|
||||
} else {
|
||||
/* See bpf_jit_stack_offsetof() and BPF_PPC_TC */
|
||||
EMIT(PPC_RAW_LL(_R4, _R1, r4_off));
|
||||
|
|
@ -681,7 +666,7 @@ static void bpf_trampoline_setup_tail_call_info(u32 *image, struct codegen_conte
|
|||
}
|
||||
|
||||
static void bpf_trampoline_restore_tail_call_cnt(u32 *image, struct codegen_context *ctx,
|
||||
int func_frame_offset, int r4_off)
|
||||
int bpf_frame_size, int r4_off)
|
||||
{
|
||||
if (IS_ENABLED(CONFIG_PPC32)) {
|
||||
/*
|
||||
|
|
@ -692,12 +677,12 @@ static void bpf_trampoline_restore_tail_call_cnt(u32 *image, struct codegen_cont
|
|||
}
|
||||
}
|
||||
|
||||
static void bpf_trampoline_save_args(u32 *image, struct codegen_context *ctx, int func_frame_offset,
|
||||
int nr_regs, int regs_off)
|
||||
static void bpf_trampoline_save_args(u32 *image, struct codegen_context *ctx,
|
||||
int bpf_frame_size, int nr_regs, int regs_off)
|
||||
{
|
||||
int param_save_area_offset;
|
||||
|
||||
param_save_area_offset = func_frame_offset; /* the two frames we alloted */
|
||||
param_save_area_offset = bpf_frame_size;
|
||||
param_save_area_offset += STACK_FRAME_MIN_SIZE; /* param save area is past frame header */
|
||||
|
||||
for (int i = 0; i < nr_regs; i++) {
|
||||
|
|
@ -720,11 +705,11 @@ static void bpf_trampoline_restore_args_regs(u32 *image, struct codegen_context
|
|||
|
||||
/* Used when we call into the traced function. Replicate parameter save area */
|
||||
static void bpf_trampoline_restore_args_stack(u32 *image, struct codegen_context *ctx,
|
||||
int func_frame_offset, int nr_regs, int regs_off)
|
||||
int bpf_frame_size, int nr_regs, int regs_off)
|
||||
{
|
||||
int param_save_area_offset;
|
||||
|
||||
param_save_area_offset = func_frame_offset; /* the two frames we alloted */
|
||||
param_save_area_offset = bpf_frame_size;
|
||||
param_save_area_offset += STACK_FRAME_MIN_SIZE; /* param save area is past frame header */
|
||||
|
||||
for (int i = 8; i < nr_regs; i++) {
|
||||
|
|
@ -741,10 +726,10 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_im
|
|||
void *func_addr)
|
||||
{
|
||||
int regs_off, nregs_off, ip_off, run_ctx_off, retval_off, nvr_off, alt_lr_off, r4_off = 0;
|
||||
int i, ret, nr_regs, bpf_frame_size = 0, bpf_dummy_frame_size = 0, func_frame_offset;
|
||||
struct bpf_tramp_links *fmod_ret = &tlinks[BPF_TRAMP_MODIFY_RETURN];
|
||||
struct bpf_tramp_links *fentry = &tlinks[BPF_TRAMP_FENTRY];
|
||||
struct bpf_tramp_links *fexit = &tlinks[BPF_TRAMP_FEXIT];
|
||||
int i, ret, nr_regs, retaddr_off, bpf_frame_size = 0;
|
||||
struct codegen_context codegen_ctx, *ctx;
|
||||
u32 *image = (u32 *)rw_image;
|
||||
ppc_inst_t branch_insn;
|
||||
|
|
@ -770,24 +755,19 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_im
|
|||
* Generated stack layout:
|
||||
*
|
||||
* func prev back chain [ back chain ]
|
||||
* [ ]
|
||||
* bpf prog redzone/tailcallcnt [ ... ] 64 bytes (64-bit powerpc)
|
||||
* [ ] --
|
||||
* LR save area [ r0 save (64-bit) ] | header
|
||||
* [ r0 save (32-bit) ] |
|
||||
* dummy frame for unwind [ back chain 1 ] --
|
||||
* [ tail_call_info ] optional - 64-bit powerpc
|
||||
* [ padding ] align stack frame
|
||||
* r4_off [ r4 (tailcallcnt) ] optional - 32-bit powerpc
|
||||
* alt_lr_off [ real lr (ool stub)] optional - actual lr
|
||||
* retaddr_off [ return address ]
|
||||
* [ r26 ]
|
||||
* nvr_off [ r25 ] nvr save area
|
||||
* retval_off [ return value ]
|
||||
* [ reg argN ]
|
||||
* [ ... ]
|
||||
* regs_off [ reg_arg1 ] prog ctx context
|
||||
* nregs_off [ args count ]
|
||||
* ip_off [ traced function ]
|
||||
* regs_off [ reg_arg1 ] prog_ctx
|
||||
* nregs_off [ args count ] ((u64 *)prog_ctx)[-1]
|
||||
* ip_off [ traced function ] ((u64 *)prog_ctx)[-2]
|
||||
* [ ... ]
|
||||
* run_ctx_off [ bpf_tramp_run_ctx ]
|
||||
* [ reg argN ]
|
||||
|
|
@ -843,6 +823,10 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_im
|
|||
nvr_off = bpf_frame_size;
|
||||
bpf_frame_size += 2 * SZL;
|
||||
|
||||
/* Save area for return address */
|
||||
retaddr_off = bpf_frame_size;
|
||||
bpf_frame_size += SZL;
|
||||
|
||||
/* Optional save area for actual LR in case of ool ftrace */
|
||||
if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {
|
||||
alt_lr_off = bpf_frame_size;
|
||||
|
|
@ -869,16 +853,8 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_im
|
|||
/* Padding to align stack frame, if any */
|
||||
bpf_frame_size = round_up(bpf_frame_size, SZL * 2);
|
||||
|
||||
/* Dummy frame size for proper unwind - includes 64-bytes red zone for 64-bit powerpc */
|
||||
bpf_dummy_frame_size = STACK_FRAME_MIN_SIZE + 64;
|
||||
|
||||
/* Offset to the traced function's stack frame */
|
||||
func_frame_offset = bpf_dummy_frame_size + bpf_frame_size;
|
||||
|
||||
/* Create dummy frame for unwind, store original return value */
|
||||
/* Store original return value */
|
||||
EMIT(PPC_RAW_STL(_R0, _R1, PPC_LR_STKOFF));
|
||||
/* Protect red zone where tail call count goes */
|
||||
EMIT(PPC_RAW_STLU(_R1, _R1, -bpf_dummy_frame_size));
|
||||
|
||||
/* Create our stack frame */
|
||||
EMIT(PPC_RAW_STLU(_R1, _R1, -bpf_frame_size));
|
||||
|
|
@ -893,34 +869,44 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_im
|
|||
if (IS_ENABLED(CONFIG_PPC32) && nr_regs < 2)
|
||||
EMIT(PPC_RAW_STL(_R4, _R1, r4_off));
|
||||
|
||||
bpf_trampoline_save_args(image, ctx, func_frame_offset, nr_regs, regs_off);
|
||||
bpf_trampoline_save_args(image, ctx, bpf_frame_size, nr_regs, regs_off);
|
||||
|
||||
/* Save our return address */
|
||||
/* Save our LR/return address */
|
||||
EMIT(PPC_RAW_MFLR(_R3));
|
||||
if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))
|
||||
EMIT(PPC_RAW_STL(_R3, _R1, alt_lr_off));
|
||||
else
|
||||
EMIT(PPC_RAW_STL(_R3, _R1, bpf_frame_size + PPC_LR_STKOFF));
|
||||
EMIT(PPC_RAW_STL(_R3, _R1, retaddr_off));
|
||||
|
||||
/*
|
||||
* Save ip address of the traced function.
|
||||
* We could recover this from LR, but we will need to address for OOL trampoline,
|
||||
* and optional GEP area.
|
||||
* Derive IP address of the traced function.
|
||||
* In case of CONFIG_PPC_FTRACE_OUT_OF_LINE or BPF program, LR points to the instruction
|
||||
* after the 'bl' instruction in the OOL stub. Refer to ftrace_init_ool_stub() and
|
||||
* bpf_arch_text_poke() for OOL stub of kernel functions and bpf programs respectively.
|
||||
* Relevant stub sequence:
|
||||
*
|
||||
* bl <tramp>
|
||||
* LR (R3) => mtlr r0
|
||||
* b <func_addr+4>
|
||||
*
|
||||
* Recover kernel function/bpf program address from the unconditional
|
||||
* branch instruction at the end of OOL stub.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE) || flags & BPF_TRAMP_F_IP_ARG) {
|
||||
EMIT(PPC_RAW_LWZ(_R4, _R3, 4));
|
||||
EMIT(PPC_RAW_SLWI(_R4, _R4, 6));
|
||||
EMIT(PPC_RAW_SRAWI(_R4, _R4, 6));
|
||||
EMIT(PPC_RAW_ADD(_R3, _R3, _R4));
|
||||
EMIT(PPC_RAW_ADDI(_R3, _R3, 4));
|
||||
}
|
||||
|
||||
if (flags & BPF_TRAMP_F_IP_ARG)
|
||||
EMIT(PPC_RAW_STL(_R3, _R1, ip_off));
|
||||
|
||||
if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))
|
||||
/* Fake our LR for unwind */
|
||||
EMIT(PPC_RAW_STL(_R3, _R1, bpf_frame_size + PPC_LR_STKOFF));
|
||||
if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {
|
||||
/* Fake our LR for BPF_TRAMP_F_CALL_ORIG case */
|
||||
EMIT(PPC_RAW_ADDI(_R3, _R3, 4));
|
||||
EMIT(PPC_RAW_STL(_R3, _R1, retaddr_off));
|
||||
}
|
||||
|
||||
/* Save function arg count -- see bpf_get_func_arg_cnt() */
|
||||
EMIT(PPC_RAW_LI(_R3, nr_regs));
|
||||
|
|
@ -958,20 +944,19 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_im
|
|||
/* Call the traced function */
|
||||
if (flags & BPF_TRAMP_F_CALL_ORIG) {
|
||||
/*
|
||||
* The address in LR save area points to the correct point in the original function
|
||||
* retaddr on trampoline stack points to the correct point in the original function
|
||||
* with both PPC_FTRACE_OUT_OF_LINE as well as with traditional ftrace instruction
|
||||
* sequence
|
||||
*/
|
||||
EMIT(PPC_RAW_LL(_R3, _R1, bpf_frame_size + PPC_LR_STKOFF));
|
||||
EMIT(PPC_RAW_LL(_R3, _R1, retaddr_off));
|
||||
EMIT(PPC_RAW_MTCTR(_R3));
|
||||
|
||||
/* Replicate tail_call_cnt before calling the original BPF prog */
|
||||
if (flags & BPF_TRAMP_F_TAIL_CALL_CTX)
|
||||
bpf_trampoline_setup_tail_call_info(image, ctx, func_frame_offset,
|
||||
bpf_dummy_frame_size, r4_off);
|
||||
bpf_trampoline_setup_tail_call_info(image, ctx, bpf_frame_size, r4_off);
|
||||
|
||||
/* Restore args */
|
||||
bpf_trampoline_restore_args_stack(image, ctx, func_frame_offset, nr_regs, regs_off);
|
||||
bpf_trampoline_restore_args_stack(image, ctx, bpf_frame_size, nr_regs, regs_off);
|
||||
|
||||
/* Restore TOC for 64-bit */
|
||||
if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2) && !IS_ENABLED(CONFIG_PPC_KERNEL_PCREL))
|
||||
|
|
@ -985,7 +970,7 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_im
|
|||
|
||||
/* Restore updated tail_call_cnt */
|
||||
if (flags & BPF_TRAMP_F_TAIL_CALL_CTX)
|
||||
bpf_trampoline_restore_tail_call_cnt(image, ctx, func_frame_offset, r4_off);
|
||||
bpf_trampoline_restore_tail_call_cnt(image, ctx, bpf_frame_size, r4_off);
|
||||
|
||||
/* Reserve space to patch branch instruction to skip fexit progs */
|
||||
if (ro_image) /* image is NULL for dummy pass */
|
||||
|
|
@ -1037,7 +1022,7 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_im
|
|||
EMIT(PPC_RAW_LD(_R2, _R1, 24));
|
||||
if (flags & BPF_TRAMP_F_SKIP_FRAME) {
|
||||
/* Skip the traced function and return to parent */
|
||||
EMIT(PPC_RAW_ADDI(_R1, _R1, func_frame_offset));
|
||||
EMIT(PPC_RAW_ADDI(_R1, _R1, bpf_frame_size));
|
||||
EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));
|
||||
EMIT(PPC_RAW_MTLR(_R0));
|
||||
EMIT(PPC_RAW_BLR());
|
||||
|
|
@ -1045,13 +1030,13 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_im
|
|||
if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {
|
||||
EMIT(PPC_RAW_LL(_R0, _R1, alt_lr_off));
|
||||
EMIT(PPC_RAW_MTLR(_R0));
|
||||
EMIT(PPC_RAW_ADDI(_R1, _R1, func_frame_offset));
|
||||
EMIT(PPC_RAW_ADDI(_R1, _R1, bpf_frame_size));
|
||||
EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));
|
||||
EMIT(PPC_RAW_BLR());
|
||||
} else {
|
||||
EMIT(PPC_RAW_LL(_R0, _R1, bpf_frame_size + PPC_LR_STKOFF));
|
||||
EMIT(PPC_RAW_LL(_R0, _R1, retaddr_off));
|
||||
EMIT(PPC_RAW_MTCTR(_R0));
|
||||
EMIT(PPC_RAW_ADDI(_R1, _R1, func_frame_offset));
|
||||
EMIT(PPC_RAW_ADDI(_R1, _R1, bpf_frame_size));
|
||||
EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));
|
||||
EMIT(PPC_RAW_MTLR(_R0));
|
||||
EMIT(PPC_RAW_BCTR());
|
||||
|
|
|
|||
|
|
@ -32,23 +32,27 @@
|
|||
*
|
||||
* [ prev sp ] <-------------
|
||||
* [ tail_call_info ] 8 |
|
||||
* [ nv gpr save area ] 6*8 + (12*8) |
|
||||
* [ nv gpr save area ] (6 * 8) |
|
||||
* [ addl. nv gpr save area] (12 * 8) | <--- exception boundary/callback program
|
||||
* [ local_tmp_var ] 24 |
|
||||
* fp (r31) --> [ ebpf stack space ] upto 512 |
|
||||
* [ frame header ] 32/112 |
|
||||
* sp (r1) ---> [ stack pointer ] --------------
|
||||
*
|
||||
* Additional (12*8) in 'nv gpr save area' only in case of
|
||||
* exception boundary.
|
||||
* Additional (12 * 8) in 'nv gpr save area' only in case of
|
||||
* exception boundary/callback.
|
||||
*/
|
||||
|
||||
/* BPF non-volatile registers save area size */
|
||||
#define BPF_PPC_STACK_SAVE (6 * 8)
|
||||
|
||||
/* for bpf JIT code internal usage */
|
||||
#define BPF_PPC_STACK_LOCALS 24
|
||||
/*
|
||||
* for additional non volatile registers(r14-r25) to be saved
|
||||
* at exception boundary
|
||||
*/
|
||||
#define BPF_PPC_EXC_STACK_SAVE (12*8)
|
||||
#define BPF_PPC_EXC_STACK_SAVE (12 * 8)
|
||||
|
||||
/* stack frame excluding BPF stack, ensure this is quadword aligned */
|
||||
#define BPF_PPC_STACKFRAME (STACK_FRAME_MIN_SIZE + \
|
||||
|
|
@ -125,12 +129,13 @@ static inline bool bpf_has_stack_frame(struct codegen_context *ctx)
|
|||
* [ ... ] |
|
||||
* sp (r1) ---> [ stack pointer ] --------------
|
||||
* [ tail_call_info ] 8
|
||||
* [ nv gpr save area ] 6*8 + (12*8)
|
||||
* [ nv gpr save area ] (6 * 8)
|
||||
* [ addl. nv gpr save area] (12 * 8) <--- exception boundary/callback program
|
||||
* [ local_tmp_var ] 24
|
||||
* [ unused red zone ] 224
|
||||
*
|
||||
* Additional (12*8) in 'nv gpr save area' only in case of
|
||||
* exception boundary.
|
||||
* Additional (12 * 8) in 'nv gpr save area' only in case of
|
||||
* exception boundary/callback.
|
||||
*/
|
||||
static int bpf_jit_stack_local(struct codegen_context *ctx)
|
||||
{
|
||||
|
|
@ -148,7 +153,7 @@ static int bpf_jit_stack_local(struct codegen_context *ctx)
|
|||
}
|
||||
}
|
||||
|
||||
int bpf_jit_stack_tailcallinfo_offset(struct codegen_context *ctx)
|
||||
static int bpf_jit_stack_tailcallinfo_offset(struct codegen_context *ctx)
|
||||
{
|
||||
return bpf_jit_stack_local(ctx) + BPF_PPC_STACK_LOCALS + BPF_PPC_STACK_SAVE;
|
||||
}
|
||||
|
|
@ -237,10 +242,6 @@ void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)
|
|||
|
||||
if (bpf_has_stack_frame(ctx) && !ctx->exception_cb) {
|
||||
/*
|
||||
* exception_cb uses boundary frame after stack walk.
|
||||
* It can simply use redzone, this optimization reduces
|
||||
* stack walk loop by one level.
|
||||
*
|
||||
* We need a stack frame, but we don't necessarily need to
|
||||
* save/restore LR unless we call other functions
|
||||
*/
|
||||
|
|
@ -284,6 +285,22 @@ void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)
|
|||
* program(main prog) as third arg
|
||||
*/
|
||||
EMIT(PPC_RAW_MR(_R1, _R5));
|
||||
/*
|
||||
* Exception callback reuses the stack frame of exception boundary.
|
||||
* But BPF stack depth of exception callback and exception boundary
|
||||
* don't have to be same. If BPF stack depth is different, adjust the
|
||||
* stack frame size considering BPF stack depth of exception callback.
|
||||
* The non-volatile register save area remains unchanged. These non-
|
||||
* volatile registers are restored in exception callback's epilogue.
|
||||
*/
|
||||
EMIT(PPC_RAW_LD(bpf_to_ppc(TMP_REG_1), _R5, 0));
|
||||
EMIT(PPC_RAW_SUB(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_1), _R1));
|
||||
EMIT(PPC_RAW_ADDI(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_2),
|
||||
-BPF_PPC_EXC_STACKFRAME));
|
||||
EMIT(PPC_RAW_CMPLDI(bpf_to_ppc(TMP_REG_2), ctx->stack_size));
|
||||
PPC_BCC_CONST_SHORT(COND_EQ, 12);
|
||||
EMIT(PPC_RAW_MR(_R1, bpf_to_ppc(TMP_REG_1)));
|
||||
EMIT(PPC_RAW_STDU(_R1, _R1, -(BPF_PPC_EXC_STACKFRAME + ctx->stack_size)));
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -482,6 +499,83 @@ int bpf_jit_emit_func_call_rel(u32 *image, u32 *fimage, struct codegen_context *
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int zero_extend(u32 *image, struct codegen_context *ctx, u32 src_reg, u32 dst_reg, u32 size)
|
||||
{
|
||||
switch (size) {
|
||||
case 1:
|
||||
/* zero-extend 8 bits into 64 bits */
|
||||
EMIT(PPC_RAW_RLDICL(dst_reg, src_reg, 0, 56));
|
||||
return 0;
|
||||
case 2:
|
||||
/* zero-extend 16 bits into 64 bits */
|
||||
EMIT(PPC_RAW_RLDICL(dst_reg, src_reg, 0, 48));
|
||||
return 0;
|
||||
case 4:
|
||||
/* zero-extend 32 bits into 64 bits */
|
||||
EMIT(PPC_RAW_RLDICL(dst_reg, src_reg, 0, 32));
|
||||
fallthrough;
|
||||
case 8:
|
||||
/* Nothing to do */
|
||||
return 0;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
static int sign_extend(u32 *image, struct codegen_context *ctx, u32 src_reg, u32 dst_reg, u32 size)
|
||||
{
|
||||
switch (size) {
|
||||
case 1:
|
||||
/* sign-extend 8 bits into 64 bits */
|
||||
EMIT(PPC_RAW_EXTSB(dst_reg, src_reg));
|
||||
return 0;
|
||||
case 2:
|
||||
/* sign-extend 16 bits into 64 bits */
|
||||
EMIT(PPC_RAW_EXTSH(dst_reg, src_reg));
|
||||
return 0;
|
||||
case 4:
|
||||
/* sign-extend 32 bits into 64 bits */
|
||||
EMIT(PPC_RAW_EXTSW(dst_reg, src_reg));
|
||||
fallthrough;
|
||||
case 8:
|
||||
/* Nothing to do */
|
||||
return 0;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Handle powerpc ABI expectations from caller:
|
||||
* - Unsigned arguments are zero-extended.
|
||||
* - Signed arguments are sign-extended.
|
||||
*/
|
||||
static int prepare_for_kfunc_call(const struct bpf_prog *fp, u32 *image,
|
||||
struct codegen_context *ctx,
|
||||
const struct bpf_insn *insn)
|
||||
{
|
||||
const struct btf_func_model *m = bpf_jit_find_kfunc_model(fp, insn);
|
||||
int i;
|
||||
|
||||
if (!m)
|
||||
return -1;
|
||||
|
||||
for (i = 0; i < m->nr_args; i++) {
|
||||
/* Note that BPF ABI only allows up to 5 args for kfuncs */
|
||||
u32 reg = bpf_to_ppc(BPF_REG_1 + i), size = m->arg_size[i];
|
||||
|
||||
if (!(m->arg_flags[i] & BTF_FMODEL_SIGNED_ARG)) {
|
||||
if (zero_extend(image, ctx, reg, reg, size))
|
||||
return -1;
|
||||
} else {
|
||||
if (sign_extend(image, ctx, reg, reg, size))
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 out)
|
||||
{
|
||||
/*
|
||||
|
|
@ -522,9 +616,30 @@ static int bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 o
|
|||
|
||||
/*
|
||||
* tail_call_info++; <- Actual value of tcc here
|
||||
* Writeback this updated value only if tailcall succeeds.
|
||||
*/
|
||||
EMIT(PPC_RAW_ADDI(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_1), 1));
|
||||
|
||||
/* prog = array->ptrs[index]; */
|
||||
EMIT(PPC_RAW_MULI(bpf_to_ppc(TMP_REG_2), b2p_index, 8));
|
||||
EMIT(PPC_RAW_ADD(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_2), b2p_bpf_array));
|
||||
EMIT(PPC_RAW_LD(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_2),
|
||||
offsetof(struct bpf_array, ptrs)));
|
||||
|
||||
/*
|
||||
* if (prog == NULL)
|
||||
* goto out;
|
||||
*/
|
||||
EMIT(PPC_RAW_CMPLDI(bpf_to_ppc(TMP_REG_2), 0));
|
||||
PPC_BCC_SHORT(COND_EQ, out);
|
||||
|
||||
/* goto *(prog->bpf_func + prologue_size); */
|
||||
EMIT(PPC_RAW_LD(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_2),
|
||||
offsetof(struct bpf_prog, bpf_func)));
|
||||
EMIT(PPC_RAW_ADDI(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_2),
|
||||
FUNCTION_DESCR_SIZE + bpf_tailcall_prologue_size));
|
||||
EMIT(PPC_RAW_MTCTR(bpf_to_ppc(TMP_REG_2)));
|
||||
|
||||
/*
|
||||
* Before writing updated tail_call_info, distinguish if current frame
|
||||
* is storing a reference to tail_call_info or actual tcc value in
|
||||
|
|
@ -539,24 +654,6 @@ static int bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 o
|
|||
/* Writeback updated value to tail_call_info */
|
||||
EMIT(PPC_RAW_STD(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_2), 0));
|
||||
|
||||
/* prog = array->ptrs[index]; */
|
||||
EMIT(PPC_RAW_MULI(bpf_to_ppc(TMP_REG_1), b2p_index, 8));
|
||||
EMIT(PPC_RAW_ADD(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_1), b2p_bpf_array));
|
||||
EMIT(PPC_RAW_LD(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_1), offsetof(struct bpf_array, ptrs)));
|
||||
|
||||
/*
|
||||
* if (prog == NULL)
|
||||
* goto out;
|
||||
*/
|
||||
EMIT(PPC_RAW_CMPLDI(bpf_to_ppc(TMP_REG_1), 0));
|
||||
PPC_BCC_SHORT(COND_EQ, out);
|
||||
|
||||
/* goto *(prog->bpf_func + prologue_size); */
|
||||
EMIT(PPC_RAW_LD(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_1), offsetof(struct bpf_prog, bpf_func)));
|
||||
EMIT(PPC_RAW_ADDI(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_1),
|
||||
FUNCTION_DESCR_SIZE + bpf_tailcall_prologue_size));
|
||||
EMIT(PPC_RAW_MTCTR(bpf_to_ppc(TMP_REG_1)));
|
||||
|
||||
/* tear down stack, restore NVRs, ... */
|
||||
bpf_jit_emit_common_epilogue(image, ctx);
|
||||
|
||||
|
|
@ -1123,14 +1220,16 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code
|
|||
/* special mov32 for zext */
|
||||
EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 0, 31));
|
||||
break;
|
||||
} else if (off == 8) {
|
||||
EMIT(PPC_RAW_EXTSB(dst_reg, src_reg));
|
||||
} else if (off == 16) {
|
||||
EMIT(PPC_RAW_EXTSH(dst_reg, src_reg));
|
||||
} else if (off == 32) {
|
||||
EMIT(PPC_RAW_EXTSW(dst_reg, src_reg));
|
||||
} else if (dst_reg != src_reg)
|
||||
EMIT(PPC_RAW_MR(dst_reg, src_reg));
|
||||
}
|
||||
if (off == 0) {
|
||||
/* MOV */
|
||||
if (dst_reg != src_reg)
|
||||
EMIT(PPC_RAW_MR(dst_reg, src_reg));
|
||||
} else {
|
||||
/* MOVSX: dst = (s8,s16,s32)src (off = 8,16,32) */
|
||||
if (sign_extend(image, ctx, src_reg, dst_reg, off / 8))
|
||||
return -1;
|
||||
}
|
||||
goto bpf_alu32_trunc;
|
||||
case BPF_ALU | BPF_MOV | BPF_K: /* (u32) dst = imm */
|
||||
case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = (s64) imm */
|
||||
|
|
@ -1598,6 +1697,12 @@ emit_clear:
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
/* Take care of powerpc ABI requirements before kfunc call */
|
||||
if (insn[i].src_reg == BPF_PSEUDO_KFUNC_CALL) {
|
||||
if (prepare_for_kfunc_call(fp, image, ctx, &insn[i]))
|
||||
return -1;
|
||||
}
|
||||
|
||||
ret = bpf_jit_emit_func_call_rel(image, fimage, ctx, func_addr);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -155,8 +155,8 @@ machine_device_initcall(mpc83xx_km, mpc83xx_declare_of_platform_devices);
|
|||
|
||||
/* list of the supported boards */
|
||||
static char *board[] __initdata = {
|
||||
"Keymile,KMETER1",
|
||||
"Keymile,kmpbec8321",
|
||||
"keymile,KMETER1",
|
||||
"keymile,kmpbec8321",
|
||||
NULL
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -276,7 +276,7 @@ config PPC_BOOK3S
|
|||
config PPC_E500
|
||||
select FSL_EMB_PERFMON
|
||||
bool
|
||||
select ARCH_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
|
||||
select ARCH_SUPPORTS_HUGETLBFS
|
||||
select PPC_SMP_MUXED_IPI
|
||||
select PPC_DOORBELL
|
||||
select PPC_KUEP
|
||||
|
|
@ -337,7 +337,7 @@ config BOOKE
|
|||
config PTE_64BIT
|
||||
bool
|
||||
depends on 44x || PPC_E500 || PPC_86xx
|
||||
default y if PHYS_64BIT
|
||||
default y if PPC_E500 || PHYS_64BIT
|
||||
|
||||
config PHYS_64BIT
|
||||
bool 'Large physical address support' if PPC_E500 || PPC_86xx
|
||||
|
|
|
|||
|
|
@ -605,7 +605,7 @@ static int pseries_irq_domain_alloc(struct irq_domain *domain, unsigned int virq
|
|||
&pseries_msi_irq_chip, pseries_dev);
|
||||
}
|
||||
|
||||
pseries_dev->msi_used++;
|
||||
pseries_dev->msi_used += nr_irqs;
|
||||
return 0;
|
||||
|
||||
out:
|
||||
|
|
|
|||
|
|
@ -15,9 +15,9 @@ if [ -z "$is_64bit" ]; then
|
|||
RELOCATION=R_PPC_ADDR32
|
||||
fi
|
||||
|
||||
num_ool_stubs_total=$($objdump -r -j __patchable_function_entries "$vmlinux_o" |
|
||||
num_ool_stubs_total=$($objdump -r -j __patchable_function_entries -d "$vmlinux_o" |
|
||||
grep -c "$RELOCATION")
|
||||
num_ool_stubs_inittext=$($objdump -r -j __patchable_function_entries "$vmlinux_o" |
|
||||
num_ool_stubs_inittext=$($objdump -r -j __patchable_function_entries -d "$vmlinux_o" |
|
||||
grep -e ".init.text" -e ".text.startup" | grep -c "$RELOCATION")
|
||||
num_ool_stubs_text=$((num_ool_stubs_total - num_ool_stubs_inittext))
|
||||
|
||||
|
|
|
|||
|
|
@ -170,6 +170,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
.riscv.attributes 0 : { *(.riscv.attributes) }
|
||||
|
||||
|
|
|
|||
|
|
@ -159,7 +159,7 @@ static __always_inline void __stackleak_poison(unsigned long erase_low,
|
|||
" j 4f\n"
|
||||
"3: mvc 8(1,%[addr]),0(%[addr])\n"
|
||||
"4:"
|
||||
: [addr] "+&a" (erase_low), [count] "+&d" (count), [tmp] "=&a" (tmp)
|
||||
: [addr] "+&a" (erase_low), [count] "+&a" (count), [tmp] "=&a" (tmp)
|
||||
: [poison] "d" (poison)
|
||||
: "memory", "cc"
|
||||
);
|
||||
|
|
|
|||
|
|
@ -221,6 +221,7 @@ SECTIONS
|
|||
/* Debugging sections. */
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -28,8 +28,8 @@ static void xor_xc_2(unsigned long bytes, unsigned long * __restrict p1,
|
|||
" j 3f\n"
|
||||
"2: xc 0(1,%1),0(%2)\n"
|
||||
"3:"
|
||||
: : "d" (bytes), "a" (p1), "a" (p2)
|
||||
: "0", "cc", "memory");
|
||||
: "+a" (bytes), "+a" (p1), "+a" (p2)
|
||||
: : "0", "cc", "memory");
|
||||
}
|
||||
|
||||
static void xor_xc_3(unsigned long bytes, unsigned long * __restrict p1,
|
||||
|
|
@ -54,7 +54,7 @@ static void xor_xc_3(unsigned long bytes, unsigned long * __restrict p1,
|
|||
"2: xc 0(1,%1),0(%2)\n"
|
||||
"3: xc 0(1,%1),0(%3)\n"
|
||||
"4:"
|
||||
: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3)
|
||||
: "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3)
|
||||
: : "0", "cc", "memory");
|
||||
}
|
||||
|
||||
|
|
@ -85,7 +85,7 @@ static void xor_xc_4(unsigned long bytes, unsigned long * __restrict p1,
|
|||
"3: xc 0(1,%1),0(%3)\n"
|
||||
"4: xc 0(1,%1),0(%4)\n"
|
||||
"5:"
|
||||
: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4)
|
||||
: "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4)
|
||||
: : "0", "cc", "memory");
|
||||
}
|
||||
|
||||
|
|
@ -96,7 +96,6 @@ static void xor_xc_5(unsigned long bytes, unsigned long * __restrict p1,
|
|||
const unsigned long * __restrict p5)
|
||||
{
|
||||
asm volatile(
|
||||
" larl 1,2f\n"
|
||||
" aghi %0,-1\n"
|
||||
" jm 6f\n"
|
||||
" srlg 0,%0,8\n"
|
||||
|
|
@ -122,7 +121,7 @@ static void xor_xc_5(unsigned long bytes, unsigned long * __restrict p1,
|
|||
"4: xc 0(1,%1),0(%4)\n"
|
||||
"5: xc 0(1,%1),0(%5)\n"
|
||||
"6:"
|
||||
: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4),
|
||||
: "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4),
|
||||
"+a" (p5)
|
||||
: : "0", "cc", "memory");
|
||||
}
|
||||
|
|
|
|||
|
|
@ -89,6 +89,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
DISCARDS
|
||||
|
|
|
|||
|
|
@ -355,6 +355,13 @@ static struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
|
|||
dev->error_state = pci_channel_io_normal;
|
||||
dev->dma_mask = 0xffffffff;
|
||||
|
||||
/*
|
||||
* Assume 64-bit addresses for MSI initially. Will be changed to 32-bit
|
||||
* if MSI (rather than MSI-X) capability does not have
|
||||
* PCI_MSI_FLAGS_64BIT. Can also be overridden by driver.
|
||||
*/
|
||||
dev->msi_addr_mask = DMA_BIT_MASK(64);
|
||||
|
||||
if (of_node_name_eq(node, "pci")) {
|
||||
/* a PCI-PCI bridge */
|
||||
dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
|
||||
|
|
|
|||
|
|
@ -191,6 +191,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
DISCARDS
|
||||
|
|
|
|||
|
|
@ -172,6 +172,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
DISCARDS
|
||||
|
|
|
|||
|
|
@ -113,6 +113,7 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
DWARF_DEBUG
|
||||
MODINFO
|
||||
ELF_DETAILS
|
||||
|
||||
DISCARDS
|
||||
|
|
|
|||
|
|
@ -113,6 +113,7 @@ vmlinux-objs-$(CONFIG_EFI_SBAT) += $(obj)/sbat.o
|
|||
|
||||
ifdef CONFIG_EFI_SBAT
|
||||
$(obj)/sbat.o: $(CONFIG_EFI_SBAT_FILE)
|
||||
AFLAGS_sbat.o += -I $(srctree)
|
||||
endif
|
||||
|
||||
$(obj)/vmlinux: $(vmlinux-objs-y) $(vmlinux-libs-y) FORCE
|
||||
|
|
|
|||
|
|
@ -28,17 +28,17 @@
|
|||
#include "sev.h"
|
||||
|
||||
static struct ghcb boot_ghcb_page __aligned(PAGE_SIZE);
|
||||
struct ghcb *boot_ghcb;
|
||||
struct ghcb *boot_ghcb __section(".data");
|
||||
|
||||
#undef __init
|
||||
#define __init
|
||||
|
||||
#define __BOOT_COMPRESSED
|
||||
|
||||
u8 snp_vmpl;
|
||||
u16 ghcb_version;
|
||||
u8 snp_vmpl __section(".data");
|
||||
u16 ghcb_version __section(".data");
|
||||
|
||||
u64 boot_svsm_caa_pa;
|
||||
u64 boot_svsm_caa_pa __section(".data");
|
||||
|
||||
/* Include code for early handlers */
|
||||
#include "../../boot/startup/sev-shared.c"
|
||||
|
|
@ -188,6 +188,7 @@ bool sev_es_check_ghcb_fault(unsigned long address)
|
|||
MSR_AMD64_SNP_RESERVED_BIT13 | \
|
||||
MSR_AMD64_SNP_RESERVED_BIT15 | \
|
||||
MSR_AMD64_SNP_SECURE_AVIC | \
|
||||
MSR_AMD64_SNP_RESERVED_BITS19_22 | \
|
||||
MSR_AMD64_SNP_RESERVED_MASK)
|
||||
|
||||
#ifdef CONFIG_AMD_SECURE_AVIC
|
||||
|
|
|
|||
|
|
@ -88,7 +88,7 @@ SECTIONS
|
|||
/DISCARD/ : {
|
||||
*(.dynamic) *(.dynsym) *(.dynstr) *(.dynbss)
|
||||
*(.hash) *(.gnu.hash)
|
||||
*(.note.*)
|
||||
*(.note.*) *(.modinfo)
|
||||
}
|
||||
|
||||
.got.plt (INFO) : {
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@ static u32 cpuid_std_range_max __ro_after_init;
|
|||
static u32 cpuid_hyp_range_max __ro_after_init;
|
||||
static u32 cpuid_ext_range_max __ro_after_init;
|
||||
|
||||
bool sev_snp_needs_sfw;
|
||||
bool sev_snp_needs_sfw __section(".data");
|
||||
|
||||
void __noreturn
|
||||
sev_es_terminate(unsigned int set, unsigned int reason)
|
||||
|
|
|
|||
|
|
@ -89,6 +89,7 @@ static const char * const sev_status_feat_names[] = {
|
|||
[MSR_AMD64_SNP_VMSA_REG_PROT_BIT] = "VMSARegProt",
|
||||
[MSR_AMD64_SNP_SMT_PROT_BIT] = "SMTProt",
|
||||
[MSR_AMD64_SNP_SECURE_AVIC_BIT] = "SecureAVIC",
|
||||
[MSR_AMD64_SNP_IBPB_ON_ENTRY_BIT] = "IBPBOnEntry",
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -35,9 +35,38 @@
|
|||
#endif
|
||||
.endm
|
||||
|
||||
/*
|
||||
* WARNING:
|
||||
*
|
||||
* A bug in the libgcc unwinder as of at least gcc 15.2 (2026) means that
|
||||
* the unwinder fails to recognize the signal frame flag.
|
||||
*
|
||||
* There is a hacky legacy fallback path in libgcc which ends up
|
||||
* getting invoked instead. It happens to work as long as BOTH of the
|
||||
* following conditions are true:
|
||||
*
|
||||
* 1. There is at least one byte before the each of the sigreturn
|
||||
* functions which falls outside any function. This is enforced by
|
||||
* an explicit nop instruction before the ALIGN.
|
||||
* 2. The code sequences between the entry point up to and including
|
||||
* the int $0x80 below need to match EXACTLY. Do not change them
|
||||
* in any way. The exact byte sequences are:
|
||||
*
|
||||
* __kernel_sigreturn:
|
||||
* 0: 58 pop %eax
|
||||
* 1: b8 77 00 00 00 mov $0x77,%eax
|
||||
* 6: cd 80 int $0x80
|
||||
*
|
||||
* __kernel_rt_sigreturn:
|
||||
* 0: b8 ad 00 00 00 mov $0xad,%eax
|
||||
* 5: cd 80 int $0x80
|
||||
*
|
||||
* For details, see: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124050
|
||||
*/
|
||||
.text
|
||||
.globl __kernel_sigreturn
|
||||
.type __kernel_sigreturn,@function
|
||||
nop /* libgcc hack: see comment above */
|
||||
ALIGN
|
||||
__kernel_sigreturn:
|
||||
STARTPROC_SIGNAL_FRAME IA32_SIGFRAME_sigcontext
|
||||
|
|
@ -52,6 +81,7 @@ SYM_INNER_LABEL(vdso32_sigreturn_landing_pad, SYM_L_GLOBAL)
|
|||
|
||||
.globl __kernel_rt_sigreturn
|
||||
.type __kernel_rt_sigreturn,@function
|
||||
nop /* libgcc hack: see comment above */
|
||||
ALIGN
|
||||
__kernel_rt_sigreturn:
|
||||
STARTPROC_SIGNAL_FRAME IA32_RT_SIGFRAME_sigcontext
|
||||
|
|
|
|||
|
|
@ -138,7 +138,7 @@ extern void __init efi_apply_memmap_quirks(void);
|
|||
extern int __init efi_reuse_config(u64 tables, int nr_tables);
|
||||
extern void efi_delete_dummy_variable(void);
|
||||
extern void efi_crash_gracefully_on_page_fault(unsigned long phys_addr);
|
||||
extern void efi_free_boot_services(void);
|
||||
extern void efi_unmap_boot_services(void);
|
||||
|
||||
void arch_efi_call_virt_setup(void);
|
||||
void arch_efi_call_virt_teardown(void);
|
||||
|
|
|
|||
|
|
@ -740,7 +740,10 @@
|
|||
#define MSR_AMD64_SNP_SMT_PROT BIT_ULL(MSR_AMD64_SNP_SMT_PROT_BIT)
|
||||
#define MSR_AMD64_SNP_SECURE_AVIC_BIT 18
|
||||
#define MSR_AMD64_SNP_SECURE_AVIC BIT_ULL(MSR_AMD64_SNP_SECURE_AVIC_BIT)
|
||||
#define MSR_AMD64_SNP_RESV_BIT 19
|
||||
#define MSR_AMD64_SNP_RESERVED_BITS19_22 GENMASK_ULL(22, 19)
|
||||
#define MSR_AMD64_SNP_IBPB_ON_ENTRY_BIT 23
|
||||
#define MSR_AMD64_SNP_IBPB_ON_ENTRY BIT_ULL(MSR_AMD64_SNP_IBPB_ON_ENTRY_BIT)
|
||||
#define MSR_AMD64_SNP_RESV_BIT 24
|
||||
#define MSR_AMD64_SNP_RESERVED_MASK GENMASK_ULL(63, MSR_AMD64_SNP_RESV_BIT)
|
||||
#define MSR_AMD64_SAVIC_CONTROL 0xc0010138
|
||||
#define MSR_AMD64_SAVIC_EN_BIT 0
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@ extern int numa_off;
|
|||
*/
|
||||
extern s16 __apicid_to_node[MAX_LOCAL_APIC];
|
||||
extern nodemask_t numa_nodes_parsed __initdata;
|
||||
extern nodemask_t numa_phys_nodes_parsed __initdata;
|
||||
|
||||
static inline void set_apicid_to_node(int apicid, s16 node)
|
||||
{
|
||||
|
|
@ -48,6 +49,7 @@ extern void __init init_cpu_to_node(void);
|
|||
extern void numa_add_cpu(unsigned int cpu);
|
||||
extern void numa_remove_cpu(unsigned int cpu);
|
||||
extern void init_gi_nodes(void);
|
||||
extern int num_phys_nodes(void);
|
||||
#else /* CONFIG_NUMA */
|
||||
static inline void numa_set_node(int cpu, int node) { }
|
||||
static inline void numa_clear_node(int cpu) { }
|
||||
|
|
@ -55,6 +57,10 @@ static inline void init_cpu_to_node(void) { }
|
|||
static inline void numa_add_cpu(unsigned int cpu) { }
|
||||
static inline void numa_remove_cpu(unsigned int cpu) { }
|
||||
static inline void init_gi_nodes(void) { }
|
||||
static inline int num_phys_nodes(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
#endif /* CONFIG_NUMA */
|
||||
|
||||
#ifdef CONFIG_DEBUG_PER_CPU_MAPS
|
||||
|
|
|
|||
|
|
@ -19,10 +19,8 @@
|
|||
extern p4d_t level4_kernel_pgt[512];
|
||||
extern p4d_t level4_ident_pgt[512];
|
||||
extern pud_t level3_kernel_pgt[512];
|
||||
extern pud_t level3_ident_pgt[512];
|
||||
extern pmd_t level2_kernel_pgt[512];
|
||||
extern pmd_t level2_fixmap_pgt[512];
|
||||
extern pmd_t level2_ident_pgt[512];
|
||||
extern pte_t level1_fixmap_pgt[512 * FIXMAP_PMD_NUM];
|
||||
extern pgd_t init_top_pgt[];
|
||||
|
||||
|
|
|
|||
|
|
@ -155,6 +155,7 @@ extern unsigned int __max_logical_packages;
|
|||
extern unsigned int __max_threads_per_core;
|
||||
extern unsigned int __num_threads_per_package;
|
||||
extern unsigned int __num_cores_per_package;
|
||||
extern unsigned int __num_nodes_per_package;
|
||||
|
||||
const char *get_topology_cpu_type_name(struct cpuinfo_x86 *c);
|
||||
enum x86_topology_cpu_type get_topology_cpu_type(struct cpuinfo_x86 *c);
|
||||
|
|
@ -179,6 +180,11 @@ static inline unsigned int topology_num_threads_per_package(void)
|
|||
return __num_threads_per_package;
|
||||
}
|
||||
|
||||
static inline unsigned int topology_num_nodes_per_package(void)
|
||||
{
|
||||
return __num_nodes_per_package;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_LOCAL_APIC
|
||||
int topology_get_logical_id(u32 apicid, enum x86_topology_domains at_level);
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -95,6 +95,9 @@ EXPORT_SYMBOL(__max_dies_per_package);
|
|||
unsigned int __max_logical_packages __ro_after_init = 1;
|
||||
EXPORT_SYMBOL(__max_logical_packages);
|
||||
|
||||
unsigned int __num_nodes_per_package __ro_after_init = 1;
|
||||
EXPORT_SYMBOL(__num_nodes_per_package);
|
||||
|
||||
unsigned int __num_cores_per_package __ro_after_init = 1;
|
||||
EXPORT_SYMBOL(__num_cores_per_package);
|
||||
|
||||
|
|
|
|||
|
|
@ -364,7 +364,7 @@ void arch_mon_domain_online(struct rdt_resource *r, struct rdt_l3_mon_domain *d)
|
|||
msr_clear_bit(MSR_RMID_SNC_CONFIG, 0);
|
||||
}
|
||||
|
||||
/* CPU models that support MSR_RMID_SNC_CONFIG */
|
||||
/* CPU models that support SNC and MSR_RMID_SNC_CONFIG */
|
||||
static const struct x86_cpu_id snc_cpu_ids[] __initconst = {
|
||||
X86_MATCH_VFM(INTEL_ICELAKE_X, 0),
|
||||
X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, 0),
|
||||
|
|
@ -375,40 +375,14 @@ static const struct x86_cpu_id snc_cpu_ids[] __initconst = {
|
|||
{}
|
||||
};
|
||||
|
||||
/*
|
||||
* There isn't a simple hardware bit that indicates whether a CPU is running
|
||||
* in Sub-NUMA Cluster (SNC) mode. Infer the state by comparing the
|
||||
* number of CPUs sharing the L3 cache with CPU0 to the number of CPUs in
|
||||
* the same NUMA node as CPU0.
|
||||
* It is not possible to accurately determine SNC state if the system is
|
||||
* booted with a maxcpus=N parameter. That distorts the ratio of SNC nodes
|
||||
* to L3 caches. It will be OK if system is booted with hyperthreading
|
||||
* disabled (since this doesn't affect the ratio).
|
||||
*/
|
||||
static __init int snc_get_config(void)
|
||||
{
|
||||
struct cacheinfo *ci = get_cpu_cacheinfo_level(0, RESCTRL_L3_CACHE);
|
||||
const cpumask_t *node0_cpumask;
|
||||
int cpus_per_node, cpus_per_l3;
|
||||
int ret;
|
||||
int ret = topology_num_nodes_per_package();
|
||||
|
||||
if (!x86_match_cpu(snc_cpu_ids) || !ci)
|
||||
if (ret > 1 && !x86_match_cpu(snc_cpu_ids)) {
|
||||
pr_warn("CoD enabled system? Resctrl not supported\n");
|
||||
return 1;
|
||||
|
||||
cpus_read_lock();
|
||||
if (num_online_cpus() != num_present_cpus())
|
||||
pr_warn("Some CPUs offline, SNC detection may be incorrect\n");
|
||||
cpus_read_unlock();
|
||||
|
||||
node0_cpumask = cpumask_of_node(cpu_to_node(0));
|
||||
|
||||
cpus_per_node = cpumask_weight(node0_cpumask);
|
||||
cpus_per_l3 = cpumask_weight(&ci->shared_cpu_map);
|
||||
|
||||
if (!cpus_per_node || !cpus_per_l3)
|
||||
return 1;
|
||||
|
||||
ret = cpus_per_l3 / cpus_per_node;
|
||||
}
|
||||
|
||||
/* sanity check: Only valid results are 1, 2, 3, 4, 6 */
|
||||
switch (ret) {
|
||||
|
|
|
|||
|
|
@ -31,6 +31,7 @@
|
|||
#include <asm/mpspec.h>
|
||||
#include <asm/msr.h>
|
||||
#include <asm/smp.h>
|
||||
#include <asm/numa.h>
|
||||
|
||||
#include "cpu.h"
|
||||
|
||||
|
|
@ -492,11 +493,19 @@ void __init topology_init_possible_cpus(void)
|
|||
set_nr_cpu_ids(allowed);
|
||||
|
||||
cnta = domain_weight(TOPO_PKG_DOMAIN);
|
||||
cntb = domain_weight(TOPO_DIE_DOMAIN);
|
||||
__max_logical_packages = cnta;
|
||||
|
||||
pr_info("Max. logical packages: %3u\n", __max_logical_packages);
|
||||
|
||||
cntb = num_phys_nodes();
|
||||
__num_nodes_per_package = DIV_ROUND_UP(cntb, cnta);
|
||||
|
||||
pr_info("Max. logical nodes: %3u\n", cntb);
|
||||
pr_info("Num. nodes per package:%3u\n", __num_nodes_per_package);
|
||||
|
||||
cntb = domain_weight(TOPO_DIE_DOMAIN);
|
||||
__max_dies_per_package = 1U << (get_count_order(cntb) - get_count_order(cnta));
|
||||
|
||||
pr_info("Max. logical packages: %3u\n", cnta);
|
||||
pr_info("Max. logical dies: %3u\n", cntb);
|
||||
pr_info("Max. dies per package: %3u\n", __max_dies_per_package);
|
||||
|
||||
|
|
|
|||
|
|
@ -616,38 +616,10 @@ SYM_DATA(early_recursion_flag, .long 0)
|
|||
|
||||
.data
|
||||
|
||||
#if defined(CONFIG_XEN_PV) || defined(CONFIG_PVH)
|
||||
SYM_DATA_START_PTI_ALIGNED(init_top_pgt)
|
||||
.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
|
||||
.org init_top_pgt + L4_PAGE_OFFSET*8, 0
|
||||
.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
|
||||
.org init_top_pgt + L4_START_KERNEL*8, 0
|
||||
/* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
|
||||
.quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
|
||||
.fill PTI_USER_PGD_FILL,8,0
|
||||
SYM_DATA_END(init_top_pgt)
|
||||
|
||||
SYM_DATA_START_PAGE_ALIGNED(level3_ident_pgt)
|
||||
.quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
|
||||
.fill 511, 8, 0
|
||||
SYM_DATA_END(level3_ident_pgt)
|
||||
SYM_DATA_START_PAGE_ALIGNED(level2_ident_pgt)
|
||||
/*
|
||||
* Since I easily can, map the first 1G.
|
||||
* Don't set NX because code runs from these pages.
|
||||
*
|
||||
* Note: This sets _PAGE_GLOBAL despite whether
|
||||
* the CPU supports it or it is enabled. But,
|
||||
* the CPU should ignore the bit.
|
||||
*/
|
||||
PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
|
||||
SYM_DATA_END(level2_ident_pgt)
|
||||
#else
|
||||
SYM_DATA_START_PTI_ALIGNED(init_top_pgt)
|
||||
.fill 512,8,0
|
||||
.fill PTI_USER_PGD_FILL,8,0
|
||||
SYM_DATA_END(init_top_pgt)
|
||||
#endif
|
||||
|
||||
SYM_DATA_START_PAGE_ALIGNED(level4_kernel_pgt)
|
||||
.fill 511,8,0
|
||||
|
|
|
|||
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Reference in New Issue