arm64: dts: renesas: r9a09g057: Add XSPI node

Add XSPI node to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250704140823.163572-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
pull/1309/head
Lad Prabhakar 2025-07-04 15:08:21 +01:00 committed by Geert Uytterhoeven
parent 3b443f01b3
commit 7449d4d58d
1 changed files with 21 additions and 0 deletions

View File

@ -280,6 +280,27 @@
resets = <&cpg 0x30>;
};
xspi: spi@11030000 {
compatible = "renesas,r9a09g057-xspi", "renesas,r9a09g047-xspi";
reg = <0 0x11030000 0 0x10000>,
<0 0x20000000 0 0x10000000>;
reg-names = "regs", "dirmap";
interrupts = <GIC_SPI 228 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 229 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "pulse", "err_pulse";
clocks = <&cpg CPG_MOD 0x9f>,
<&cpg CPG_MOD 0xa0>,
<&cpg CPG_CORE R9A09G057_SPI_CLK_SPI>,
<&cpg CPG_MOD 0xa1>;
clock-names = "ahb", "axi", "spi", "spix2";
resets = <&cpg 0xa3>, <&cpg 0xa4>;
reset-names = "hresetn", "aresetn";
power-domains = <&cpg>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
dmac0: dma-controller@11400000 {
compatible = "renesas,r9a09g057-dmac";
reg = <0 0x11400000 0 0x10000>;