bpf: Support negative offsets, BPF_SUB, and alu32 for linked register tracking
Previously, the verifier only tracked positive constant deltas between linked registers using BPF_ADD. This limitation meant patterns like: r1 = r0; r1 += -4; if r1 s>= 0 goto l0_%=; // r1 >= 0 implies r0 >= 4 // verifier couldn't propagate bounds back to r0 if r0 != 0 goto l0_%=; r0 /= 0; // Verifier thinks this is reachable l0_%=: Similar limitation exists for 32-bit registers. With this change, the verifier can now track negative deltas in reg->off enabling bound propagation for the above pattern. For alu32, we make sure the destination register has the upper 32 bits as 0s before creating the link. BPF_ADD_CONST is split into BPF_ADD_CONST64 and BPF_ADD_CONST32, the latter is used in case of alu32 and sync_linked_regs uses this to zext the result if known_reg has this flag. Signed-off-by: Puranjay Mohan <puranjay@kernel.org> Acked-by: Eduard Zingerman <eddyz87@gmail.com> Link: https://lore.kernel.org/r/20260204151741.2678118-2-puranjay@kernel.org Signed-off-by: Alexei Starovoitov <ast@kernel.org>master
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@ -147,8 +147,12 @@ struct bpf_reg_state {
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* registers. Example:
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* r1 = r2; both will have r1->id == r2->id == N
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* r1 += 10; r1->id == N | BPF_ADD_CONST and r1->off == 10
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* r3 = r2; both will have r3->id == r2->id == N
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* w3 += 10; r3->id == N | BPF_ADD_CONST32 and r3->off == 10
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*/
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#define BPF_ADD_CONST (1U << 31)
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#define BPF_ADD_CONST64 (1U << 31)
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#define BPF_ADD_CONST32 (1U << 30)
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#define BPF_ADD_CONST (BPF_ADD_CONST64 | BPF_ADD_CONST32)
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u32 id;
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/* PTR_TO_SOCKET and PTR_TO_TCP_SOCK could be a ptr returned
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* from a pointer-cast helper, bpf_sk_fullsock() and
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@ -16209,6 +16209,13 @@ static int adjust_reg_min_max_vals(struct bpf_verifier_env *env,
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verbose(env, "verifier internal error: no src_reg\n");
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return -EFAULT;
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}
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/*
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* For alu32 linked register tracking, we need to check dst_reg's
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* umax_value before the ALU operation. After adjust_scalar_min_max_vals(),
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* alu32 ops will have zero-extended the result, making umax_value <= U32_MAX.
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*/
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u64 dst_umax = dst_reg->umax_value;
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err = adjust_scalar_min_max_vals(env, insn, dst_reg, *src_reg);
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if (err)
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return err;
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@ -16218,26 +16225,44 @@ static int adjust_reg_min_max_vals(struct bpf_verifier_env *env,
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* r1 += 0x1
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* if r2 < 1000 goto ...
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* use r1 in memory access
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* So for 64-bit alu remember constant delta between r2 and r1 and
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* update r1 after 'if' condition.
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* So remember constant delta between r2 and r1 and update r1 after
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* 'if' condition.
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*/
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if (env->bpf_capable &&
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BPF_OP(insn->code) == BPF_ADD && !alu32 &&
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dst_reg->id && is_reg_const(src_reg, false)) {
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u64 val = reg_const_value(src_reg, false);
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(BPF_OP(insn->code) == BPF_ADD || BPF_OP(insn->code) == BPF_SUB) &&
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dst_reg->id && is_reg_const(src_reg, alu32)) {
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u64 val = reg_const_value(src_reg, alu32);
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s32 off;
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if ((dst_reg->id & BPF_ADD_CONST) ||
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/* prevent overflow in sync_linked_regs() later */
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val > (u32)S32_MAX) {
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if (!alu32 && ((s64)val < S32_MIN || (s64)val > S32_MAX))
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goto clear_id;
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if (alu32 && (dst_umax > U32_MAX))
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goto clear_id;
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off = (s32)val;
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if (BPF_OP(insn->code) == BPF_SUB) {
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/* Negating S32_MIN would overflow */
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if (off == S32_MIN)
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goto clear_id;
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off = -off;
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}
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if (dst_reg->id & BPF_ADD_CONST) {
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/*
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* If the register already went through rX += val
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* we cannot accumulate another val into rx->off.
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*/
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clear_id:
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dst_reg->off = 0;
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dst_reg->id = 0;
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} else {
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dst_reg->id |= BPF_ADD_CONST;
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dst_reg->off = val;
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if (alu32)
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dst_reg->id |= BPF_ADD_CONST32;
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else
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dst_reg->id |= BPF_ADD_CONST64;
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dst_reg->off = off;
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}
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} else {
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/*
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@ -17334,7 +17359,7 @@ static void sync_linked_regs(struct bpf_verifier_env *env, struct bpf_verifier_s
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u32 saved_id = reg->id;
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fake_reg.type = SCALAR_VALUE;
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__mark_reg_known(&fake_reg, (s32)reg->off - (s32)known_reg->off);
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__mark_reg_known(&fake_reg, (s64)reg->off - (s64)known_reg->off);
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/* reg = known_reg; reg += delta */
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copy_register_state(reg, known_reg);
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@ -17349,6 +17374,9 @@ static void sync_linked_regs(struct bpf_verifier_env *env, struct bpf_verifier_s
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scalar32_min_max_add(reg, &fake_reg);
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scalar_min_max_add(reg, &fake_reg);
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reg->var_off = tnum_add(reg->var_off, fake_reg.var_off);
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if (known_reg->id & BPF_ADD_CONST32)
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zext_32_to_64(reg);
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reg_bounds_sync(reg);
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}
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if (e->is_reg)
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mark_reg_scratched(env, e->regno);
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@ -1477,7 +1477,7 @@ __naked void sub64_full_overflow(void)
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SEC("socket")
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__description("64-bit subtraction, partial overflow, result in unbounded reg")
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__success __log_level(2)
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__msg("3: (1f) r3 -= r2 {{.*}} R3=scalar()")
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__msg("3: (1f) r3 -= r2 {{.*}} R3=scalar(id=1-1)")
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__retval(0)
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__naked void sub64_partial_overflow(void)
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{
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