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arm64: dts: renesas: r9a09g056: Remove wdt{0,2,3} nodes 

The Renesas RZ/V2N SoC (a.k.a. r9a09g056) comes with 4 CA55
cores and 1 CM33 core.

While the user manual doesn't explicitly specify which cores
should have access to particular watchdogs, it turns out that
(similarly to the Renesas RZ/V2H(P)) it only makes sense for
Linux to use WDT1.

Remove DT nodes wdt{0,2,3} from the RZ/V2N SoC specific dtsi
to make it compliant with the original design intent.

This change is harmless as there are no users for the nodes
being stripped out of this device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260324225239.19136-2-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
master
Fabrizio Castro 2026-03-24 22:52:34 +00:00 committed by Geert Uytterhoeven
parent 7cc36d6d7c
commit 830558b4aa
1 changed files with 0 additions and 30 deletions
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30
arch/arm64/boot/dts/renesas/r9a09g056.dtsi
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@ -599,16 +599,6 @@
status = "disabled";
};
wdt0: watchdog@11c00400 {
compatible = "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt";
reg = <0 0x11c00400 0 0x400>;
clocks = <&cpg CPG_MOD 0x4b>, <&cpg CPG_MOD 0x4c>;
clock-names = "pclk", "oscclk";
resets = <&cpg 0x75>;
power-domains = <&cpg>;
status = "disabled";
};
wdt1: watchdog@14400000 {
compatible = "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt";
reg = <0 0x14400000 0 0x400>;
@ -619,26 +609,6 @@
status = "disabled";
};
wdt2: watchdog@13000000 {
compatible = "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt";
reg = <0 0x13000000 0 0x400>;
clocks = <&cpg CPG_MOD 0x4f>, <&cpg CPG_MOD 0x50>;
clock-names = "pclk", "oscclk";
resets = <&cpg 0x77>;
power-domains = <&cpg>;
status = "disabled";
};
wdt3: watchdog@13000400 {
compatible = "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt";
reg = <0 0x13000400 0 0x400>;
clocks = <&cpg CPG_MOD 0x51>, <&cpg CPG_MOD 0x52>;
clock-names = "pclk", "oscclk";
resets = <&cpg 0x78>;
power-domains = <&cpg>;
status = "disabled";
};
rtc: rtc@11c00800 {
compatible = "renesas,r9a09g056-rtca3", "renesas,rz-rtca3";
reg = <0 0x11c00800 0 0x400>;