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i3c: mipi-i3c-hci: Remove duplicate blank lines 

Remove duplicate blank lines from mipi-i3c-hci code.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260106164416.67074-2-adrian.hunter@intel.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
master
Adrian Hunter 2026-01-06 18:44:06 +02:00 committed by Alexandre Belloni
parent 8564f88df2
commit 840688d8e6
9 changed files with 0 additions and 17 deletions
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2
drivers/i3c/master/mipi-i3c-hci/cmd_v1.c
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@ -15,7 +15,6 @@
#include "dat.h"
#include "dct.h"
/*
* Address Assignment Command
*/
@ -100,7 +99,6 @@
#define CMD_M0_VENDOR_INFO_PRESENT W0_BIT_( 7)
#define CMD_M0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v)
/* Data Transfer Speed and Mode */
enum hci_cmd_mode {
MODE_I3C_SDR0 = 0x0,

2
drivers/i3c/master/mipi-i3c-hci/cmd_v2.c
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@ -16,7 +16,6 @@
#include "cmd.h"
#include "xfer_mode_rate.h"
/*
* Unified Data Transfer Command
*/
@ -62,7 +61,6 @@
#define CMD_A0_ASSIGN_ADDRESS(v) FIELD_PREP(W0_MASK( 14, 8), v)
#define CMD_A0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v)
static unsigned int get_i3c_rate_idx(struct i3c_hci *hci)
{
struct i3c_bus *bus = i3c_master_get_bus(&hci->master);

2
drivers/i3c/master/mipi-i3c-hci/core.c
View File

@ -21,7 +21,6 @@
#include "cmd.h"
#include "dat.h"
/*
* Host Controller Capabilities and Operation Registers
*/
@ -109,7 +108,6 @@
#define DEV_CTX_BASE_LO 0x60
#define DEV_CTX_BASE_HI 0x64
static inline struct i3c_hci *to_i3c_hci(struct i3c_master_controller *m)
{
return container_of(m, struct i3c_hci, master);

1
drivers/i3c/master/mipi-i3c-hci/dat_v1.c
View File

@ -15,7 +15,6 @@
#include "hci.h"
#include "dat.h"
/*
* Device Address Table Structure
*/

2
drivers/i3c/master/mipi-i3c-hci/dma.c
View File

@ -20,7 +20,6 @@
#include "cmd.h"
#include "ibi.h"
/*
* Software Parameter Values (somewhat arb itrary for now).
* Some of them could be determined at run time eventually.
@ -124,7 +123,6 @@
#define DATA_BUF_IOC BIT(30) /* Interrupt on Completion */
#define DATA_BUF_BLOCK_SIZE GENMASK(15, 0)
struct hci_rh_data {
void __iomem *regs;
void *xfer, *resp, *ibi_status, *ibi_data;

1
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
View File

@ -16,7 +16,6 @@
#include "ext_caps.h"
#include "xfer_mode_rate.h"
/* Extended Capability Header */
#define CAP_HEADER_LENGTH GENMASK(23, 8)
#define CAP_HEADER_ID GENMASK(7, 0)

1
drivers/i3c/master/mipi-i3c-hci/ext_caps.h
View File

@ -13,7 +13,6 @@
/* MIPI vendor IDs */
#define MIPI_VENDOR_NXP 0x11b
int i3c_hci_parse_ext_caps(struct i3c_hci *hci);
#endif

5
drivers/i3c/master/mipi-i3c-hci/hci.h
View File

@ -62,7 +62,6 @@ struct i3c_hci {
void *vendor_data;
};
/*
* Structure to represent a master initiated transfer.
* The rnw, data and data_len fields must be initialized before calling any
@ -108,7 +107,6 @@ static inline void hci_free_xfer(struct hci_xfer *xfer, unsigned int n)
kfree(xfer);
}
/* This abstracts PIO vs DMA operations */
struct hci_io_ops {
bool (*irq_handler)(struct i3c_hci *hci);
@ -126,21 +124,18 @@ struct hci_io_ops {
extern const struct hci_io_ops mipi_i3c_hci_pio;
extern const struct hci_io_ops mipi_i3c_hci_dma;
/* Our per device master private data */
struct i3c_hci_dev_data {
int dat_idx;
void *ibi_data;
};
/* list of quirks */
#define HCI_QUIRK_RAW_CCC BIT(1) /* CCC framing must be explicit */
#define HCI_QUIRK_PIO_MODE BIT(2) /* Set PIO mode for AMD platforms */
#define HCI_QUIRK_OD_PP_TIMING BIT(3) /* Set OD and PP timings for AMD platforms */
#define HCI_QUIRK_RESP_BUF_THLD BIT(4) /* Set resp buf thld to 0 for AMD platforms */
/* global functions */
void mipi_i3c_hci_resume(struct i3c_hci *hci);
void mipi_i3c_hci_pio_reset(struct i3c_hci *hci);

1
drivers/i3c/master/mipi-i3c-hci/pio.c
View File

@ -15,7 +15,6 @@
#include "cmd.h"
#include "ibi.h"
/*
* PIO Access Area
*/