ARM: dts: rockchip: Add pwm node for RV1126
Add previously omitted pwm node and possible pinctrl for Rockchip RV1126 Signed-off-by: Karthikeyan Krishnasamy <karthikeyan@linumiz.com> Link: https://lore.kernel.org/r/20240903105245.715899-4-karthikeyan@linumiz.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>pull/958/head
Karthikeyan Krishnasamy
Heiko Stuebner
parent
212cda9473
commit
898eb75f44
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@ -225,6 +225,28 @@
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<3 RK_PB5 3 &pcfg_pull_none>;
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};
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};
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pwm0 {
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/omit-if-no-ref/
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pwm0m0_pins: pwm0m0-pins {
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rockchip,pins =
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/* pwm0_pin_m0 */
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<0 RK_PB6 3 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm0m1_pins: pwm0m1-pins {
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rockchip,pins =
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/* pwm0_pin_m1 */
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<2 RK_PB3 5 &pcfg_pull_none>;
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};
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};
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pwm1 {
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/omit-if-no-ref/
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pwm1m0_pins: pwm1m0-pins {
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rockchip,pins =
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/* pwm1_pin_m0 */
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<0 RK_PB7 3 &pcfg_pull_none>;
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};
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};
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pwm2 {
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/omit-if-no-ref/
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pwm2m0_pins: pwm2m0-pins {
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@ -232,6 +254,106 @@
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/* pwm2_pin_m0 */
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<0 RK_PC0 3 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm2m1_pins: pwm2m1-pins {
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rockchip,pins =
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/* pwm2_pin_m1 */
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<2 RK_PB1 5 &pcfg_pull_none>;
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};
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};
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pwm3 {
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/omit-if-no-ref/
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pwm3m0_pins: pwm3m0-pins {
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rockchip,pins =
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/* pwm3_pin_m0 */
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<0 RK_PC1 3 &pcfg_pull_none>;
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};
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};
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pwm4 {
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/omit-if-no-ref/
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pwm4m0_pins: pwm4m0-pins {
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rockchip,pins =
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/* pwm4_pin_m0 */
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<0 RK_PC2 3 &pcfg_pull_none>;
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};
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};
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pwm5 {
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/omit-if-no-ref/
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pwm5m0_pins: pwm5m0-pins {
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rockchip,pins =
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/* pwm5_pin_m0 */
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<0 RK_PC3 3 &pcfg_pull_none>;
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};
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};
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pwm6 {
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/omit-if-no-ref/
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pwm6m0_pins: pwm6m0-pins {
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rockchip,pins =
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/* pwm6_pin_m0 */
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<0 RK_PB2 3 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm6m1_pins: pwm6m1-pins {
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rockchip,pins =
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/* pwm6_pin_m1 */
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<2 RK_PD4 5 &pcfg_pull_none>;
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};
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};
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pwm7 {
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/omit-if-no-ref/
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pwm7m0_pins: pwm7m0-pins {
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rockchip,pins =
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/* pwm7_pin_m0 */
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<0 RK_PB1 3 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm7m1_pins: pwm7m1-pins {
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rockchip,pins =
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/* pwm7_pin_m1 */
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<3 RK_PA0 5 &pcfg_pull_none>;
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};
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};
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pwm8 {
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/omit-if-no-ref/
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pwm8m0_pins: pwm8m0-pins {
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rockchip,pins =
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/* pwm8_pin_m0 */
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<3 RK_PA4 6 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm8m1_pins: pwm8m1-pins {
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rockchip,pins =
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/* pwm8_pin_m1 */
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<2 RK_PD7 5 &pcfg_pull_none>;
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};
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};
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pwm9 {
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/omit-if-no-ref/
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pwm9m0_pins: pwm9m0-pins {
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rockchip,pins =
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/* pwm9_pin_m0 */
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<3 RK_PA5 6 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm9m1_pins: pwm9m1-pins {
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rockchip,pins =
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/* pwm9_pin_m1 */
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<2 RK_PD6 5 &pcfg_pull_none>;
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};
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};
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pwm10 {
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/omit-if-no-ref/
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pwm10m0_pins: pwm10m0-pins {
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rockchip,pins =
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/* pwm10_pin_m0 */
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<3 RK_PA6 6 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm10m1_pins: pwm10m1-pins {
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rockchip,pins =
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/* pwm10_pin_m1 */
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<2 RK_PD5 5 &pcfg_pull_none>;
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};
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};
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pwm11 {
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/omit-if-no-ref/
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@ -240,6 +362,12 @@
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/* pwm11_pin_m0 */
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<3 RK_PA7 6 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm11m1_pins: pwm11m1-pins {
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rockchip,pins =
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/* pwm11_pin_m1 */
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<3 RK_PA1 5 &pcfg_pull_none>;
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};
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};
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rgmii {
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/omit-if-no-ref/
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@ -269,6 +269,28 @@
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status = "disabled";
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};
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pwm0: pwm@ff430000 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff430000 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm0m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm1: pwm@ff430010 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff430010 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm1m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm2: pwm@ff430020 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff430020 0x10>;
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@ -280,6 +302,61 @@
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status = "disabled";
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};
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pwm3: pwm@ff430030 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff430030 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm3m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm4: pwm@ff440000 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff440000 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm4m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm5: pwm@ff440010 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff440010 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm5m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm6: pwm@ff440020 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff440020 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm6m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm7: pwm@ff440030 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff440030 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm7m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pmucru: clock-controller@ff480000 {
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compatible = "rockchip,rv1126-pmucru";
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reg = <0xff480000 0x1000>;
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@ -323,6 +400,39 @@
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status = "disabled";
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};
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pwm8: pwm@ff550000 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff550000 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
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pinctrl-0 = <&pwm8m0_pins>;
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pinctrl-names = "default";
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm9: pwm@ff550010 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff550010 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
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pinctrl-0 = <&pwm9m0_pins>;
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pinctrl-names = "default";
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm10: pwm@ff550020 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff550020 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
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pinctrl-0 = <&pwm10m0_pins>;
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pinctrl-names = "default";
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm11: pwm@ff550030 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff550030 0x10>;
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