openrisc: Add jump label support

Supported a complete jump_label implementation based on the ARM64 and
RV64 version and add the CONFIG_JUMP_LABEL=y to the defconfig.

Testing was conducted using a dedicated test module jump-label-test,
provided in the link below. For detailed steps, please refer to the
README also at the provided link.

Link: https://github.com/ChenMiaoi/GSoC-2025-Final-Report/tree/main/tests/jump-label-test

Test Environment:
  - Hardware: QEMU emulated OR1K
  - Kernel Version: 6.17.0-rc3-dirty
  - Configs: CONFIG_MODULES=y,CONFIG_MODULE_UNLOAD=y
  - Toolchain: or1k-none-linux-musl-gcc 15.1.0

Test Results:
$ insmod jump_label_test.ko
[   32.590000] Jump label performance test module loaded
[   35.250000] Normal branch time: 1241327150 ns (124 ns per iteration)
[   35.250000] Jump label (false) time: 706422700 ns (70 ns per iteration)
[   35.250000] Jump label (true) time: 708913450 ns (70 ns per iteration)
$ rmmod jump_label_test.ko
[   72.210000] Jump label test module unloaded

The results show approximately 43% improvement in branch performance
when using jump labels compared to traditional branches.

Link: https://lore.kernel.org/openrisc/aLsZ9S3X0OpKy1RM@antec/T/#u
Signed-off-by: chenmiao <chenmiao.ku@gmail.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
pull/1354/merge
chenmiao 2025-09-05 18:12:58 +00:00 committed by Stafford Horne
parent 09a27fc32e
commit 8c30b0018f
9 changed files with 134 additions and 1 deletions

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@ -17,7 +17,7 @@
| microblaze: | TODO |
| mips: | ok |
| nios2: | TODO |
| openrisc: | TODO |
| openrisc: | ok |
| parisc: | ok |
| powerpc: | ok |
| riscv: | ok |

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@ -24,6 +24,8 @@ config OPENRISC
select GENERIC_PCI_IOMAP
select GENERIC_IOREMAP
select GENERIC_CPU_DEVICES
select HAVE_ARCH_JUMP_LABEL
select HAVE_ARCH_JUMP_LABEL_RELATIVE
select HAVE_PCI
select HAVE_UID16
select HAVE_PAGE_SIZE_8KB

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@ -10,6 +10,7 @@ CONFIG_EXPERT=y
# CONFIG_KALLSYMS is not set
CONFIG_BUILTIN_DTB_NAME="or1ksim"
CONFIG_HZ_100=y
CONFIG_JUMP_LABEL=y
CONFIG_MODULES=y
# CONFIG_BLOCK is not set
CONFIG_SLUB_TINY=y

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@ -12,6 +12,7 @@ CONFIG_NR_CPUS=8
CONFIG_SMP=y
CONFIG_HZ_100=y
# CONFIG_OPENRISC_NO_SPR_SR_DSX is not set
CONFIG_JUMP_LABEL=y
# CONFIG_COMPAT_BRK is not set
CONFIG_NET=y
CONFIG_PACKET=y

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@ -9,4 +9,7 @@
/* or1k instructions are always 32 bits. */
#define OPENRISC_INSN_SIZE 4
/* or1k nop instruction code */
#define OPENRISC_INSN_NOP 0x15000000U
#endif /* __ASM_OPENRISC_INSN_DEF_H */

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@ -0,0 +1,72 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2025 Chen Miao
*
* Based on arch/arm/include/asm/jump_label.h
*/
#ifndef __ASM_OPENRISC_JUMP_LABEL_H
#define __ASM_OPENRISC_JUMP_LABEL_H
#ifndef __ASSEMBLER__
#include <linux/types.h>
#include <asm/insn-def.h>
#define HAVE_JUMP_LABEL_BATCH
#define JUMP_LABEL_NOP_SIZE OPENRISC_INSN_SIZE
/**
* JUMP_TABLE_ENTRY - Create a jump table entry
* @key: Jump key identifier (typically a symbol address)
* @label: Target label address
*
* This macro creates a jump table entry in the dedicated kernel section (__jump_table).
* Each entry contains the following information:
* Offset from current instruction to jump instruction (1b - .)
* Offset from current instruction to target label (label - .)
* Offset from current instruction to key identifier (key - .)
*/
#define JUMP_TABLE_ENTRY(key, label) \
".pushsection __jump_table, \"aw\" \n\t" \
".align 4 \n\t" \
".long 1b - ., " label " - . \n\t" \
".long " key " - . \n\t" \
".popsection \n\t"
#define ARCH_STATIC_BRANCH_ASM(key, label) \
".align 4 \n\t" \
"1: l.nop \n\t" \
" l.nop \n\t" \
JUMP_TABLE_ENTRY(key, label)
static __always_inline bool arch_static_branch(struct static_key *const key,
const bool branch)
{
asm goto (ARCH_STATIC_BRANCH_ASM("%0", "%l[l_yes]")
::"i"(&((char *)key)[branch])::l_yes);
return false;
l_yes:
return true;
}
#define ARCH_STATIC_BRANCH_JUMP_ASM(key, label) \
".align 4 \n\t" \
"1: l.j " label " \n\t" \
" l.nop \n\t" \
JUMP_TABLE_ENTRY(key, label)
static __always_inline bool
arch_static_branch_jump(struct static_key *const key, const bool branch)
{
asm goto (ARCH_STATIC_BRANCH_JUMP_ASM("%0", "%l[l_yes]")
::"i"(&((char *)key)[branch])::l_yes);
return false;
l_yes:
return true;
}
#endif /* __ASSEMBLER__ */
#endif /* __ASM_OPENRISC_JUMP_LABEL_H */

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@ -9,6 +9,7 @@ obj-y := head.o setup.o or32_ksyms.o process.o dma.o \
traps.o time.o irq.o entry.o ptrace.o signal.o \
sys_call_table.o unwinder.o cacheinfo.o
obj-$(CONFIG_JUMP_LABEL) += jump_label.o
obj-$(CONFIG_SMP) += smp.o sync-timer.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o
obj-$(CONFIG_MODULES) += module.o

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@ -0,0 +1,51 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2025 Chen Miao
*
* Based on arch/arm/kernel/jump_label.c
*/
#include <linux/jump_label.h>
#include <linux/kernel.h>
#include <linux/memory.h>
#include <asm/bug.h>
#include <asm/cacheflush.h>
#include <asm/text-patching.h>
bool arch_jump_label_transform_queue(struct jump_entry *entry,
enum jump_label_type type)
{
void *addr = (void *)jump_entry_code(entry);
u32 insn;
if (type == JUMP_LABEL_JMP) {
long offset;
offset = jump_entry_target(entry) - jump_entry_code(entry);
/*
* The actual maximum range of the l.j instruction's offset is -134,217,728
* ~ 134,217,724 (sign 26-bit imm).
* For the original jump range, we need to right-shift N by 2 to obtain the
* instruction's offset.
*/
WARN_ON_ONCE(offset < -134217728 || offset > 134217724);
/* 26bit imm mask */
offset = (offset >> 2) & 0x03ffffff;
insn = offset;
} else {
insn = OPENRISC_INSN_NOP;
}
if (early_boot_irqs_disabled)
copy_to_kernel_nofault(addr, &insn, sizeof(insn));
else
patch_insn_write(addr, insn);
return true;
}
void arch_jump_label_transform_apply(void)
{
kick_all_cpus_sync();
}

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@ -249,6 +249,8 @@ void __init setup_arch(char **cmdline_p)
initrd_below_start_ok = 1;
}
#endif
/* perform jump_table sorting before paging_init locks down read only memory */
jump_label_init();
/* paging_init() sets up the MMU and marks all pages as reserved */
paging_init();