clk: renesas: r8a779h0: Add VSPX clock

Add the VSPX modules clock for Renesas R-Car V4M.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250115175927.3714357-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
pull/1188/head
Niklas Söderlund 2025-01-15 18:59:27 +01:00 committed by Geert Uytterhoeven
parent aeb06d51ea
commit 90a2bee8a0
1 changed files with 1 additions and 0 deletions

View File

@ -239,6 +239,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = {
DEF_MOD("pfc1", 916, R8A779H0_CLK_CP),
DEF_MOD("pfc2", 917, R8A779H0_CLK_CP),
DEF_MOD("tsc2:tsc1", 919, R8A779H0_CLK_CL16M),
DEF_MOD("vspx0", 1028, R8A779H0_CLK_S0D1_VIO),
DEF_MOD("fcpvx0", 1100, R8A779H0_CLK_S0D1_VIO),
DEF_MOD("ssiu", 2926, R8A779H0_CLK_S0D6_PER),
DEF_MOD("ssi", 2927, R8A779H0_CLK_S0D6_PER),