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arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes 

Add USB3 PHY/Host nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251119110505.100253-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
master
Lad Prabhakar 2025-11-19 11:05:02 +00:00 committed by Geert Uytterhoeven
parent 9a5a73dca9
commit 92279daefc
1 changed files with 60 additions and 0 deletions
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60
arch/arm64/boot/dts/renesas/r9a09g057.dtsi
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@ -1087,6 +1087,66 @@
status = "disabled";
};
xhci0: usb@15850000 {
compatible = "renesas,r9a09g057-xhci", "renesas,r9a09g047-xhci";
reg = <0 0x15850000 0 0x10000>;
interrupts = <GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 757 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 756 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 755 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "all", "smi", "hse", "pme", "xhc";
clocks = <&cpg CPG_MOD 0xaf>;
power-domains = <&cpg>;
resets = <&cpg 0xaa>;
phys = <&usb3_phy0>, <&usb3_phy0>;
phy-names = "usb2-phy", "usb3-phy";
status = "disabled";
};
xhci1: usb@15860000 {
compatible = "renesas,r9a09g057-xhci", "renesas,r9a09g047-xhci";
reg = <0 0x15860000 0 0x10000>;
interrupts = <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 763 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 760 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "all", "smi", "hse", "pme", "xhc";
clocks = <&cpg CPG_MOD 0xb1>;
power-domains = <&cpg>;
resets = <&cpg 0xab>;
phys = <&usb3_phy1>, <&usb3_phy1>;
phy-names = "usb2-phy", "usb3-phy";
status = "disabled";
};
usb3_phy0: usb-phy@15870000 {
compatible = "renesas,r9a09g057-usb3-phy", "renesas,r9a09g047-usb3-phy";
reg = <0 0x15870000 0 0x10000>;
clocks = <&cpg CPG_MOD 0xb0>,
<&cpg CPG_CORE R9A09G057_USB3_0_CLKCORE>,
<&cpg CPG_CORE R9A09G057_USB3_0_REF_ALT_CLK_P>;
clock-names = "pclk", "core", "ref_alt_clk_p";
power-domains = <&cpg>;
resets = <&cpg 0xaa>;
#phy-cells = <0>;
status = "disabled";
};
usb3_phy1: usb-phy@15880000 {
compatible = "renesas,r9a09g057-usb3-phy", "renesas,r9a09g047-usb3-phy";
reg = <0 0x15880000 0 0x10000>;
clocks = <&cpg CPG_MOD 0xb2>,
<&cpg CPG_CORE R9A09G057_USB3_1_CLKCORE>,
<&cpg CPG_CORE R9A09G057_USB3_1_REF_ALT_CLK_P>;
clock-names = "pclk", "core", "ref_alt_clk_p";
power-domains = <&cpg>;
resets = <&cpg 0xab>;
#phy-cells = <0>;
status = "disabled";
};
sdhi0: mmc@15c00000 {
compatible = "renesas,sdhi-r9a09g057";
reg = <0x0 0x15c00000 0 0x10000>;