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drm/xe/uapi: Fix documentation indentation 

Fix these issues:

Documentation/gpu/driver-uapi:29: include/uapi/drm/xe_drm.h:817: WARNING:
+Bullet list ends without a blank line; unexpected unindent.
Documentation/gpu/driver-uapi:29: include/uapi/drm/xe_drm.h:835: WARNING:
+Definition list ends without a blank line; unexpected unindent.

Fixes: 75d37750a7 ("drm/xe/mmap: Add mmap support for PCI memory barrier")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Closes: https://lore.kernel.org/intel-xe/20250117164023.3fdc00b9@canb.auug.org.au/
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Tested-by: Bagas Sanjaya <bagasdotme@gmail.com>
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250117193827.91779-1-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
pull/1188/head
Rodrigo Vivi 2025-01-17 14:38:27 -05:00
parent f3b5945780
commit a46ea12eca
No known key found for this signature in database
GPG Key ID: FA625F640EEB13CA
1 changed files with 18 additions and 18 deletions
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36
include/uapi/drm/xe_drm.h
View File

@ -814,29 +814,29 @@ struct drm_xe_gem_create {
*
* The @flags can be:
* - %DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER - For user to query special offset
* for use in mmap ioctl. Writing to the returned mmap address will generate a
* PCI memory barrier with low overhead (avoiding IOCTL call as well as writing
* to VRAM which would also add overhead), acting like an MI_MEM_FENCE
* instruction.
* for use in mmap ioctl. Writing to the returned mmap address will generate a
* PCI memory barrier with low overhead (avoiding IOCTL call as well as writing
* to VRAM which would also add overhead), acting like an MI_MEM_FENCE
* instruction.
*
* Note: The mmap size can be at most 4K, due to HW limitations. As a result
* this interface is only supported on CPU architectures that support 4K page
* size. The mmap_offset ioctl will detect this and gracefully return an
* error, where userspace is expected to have a different fallback method for
* triggering a barrier.
* Note: The mmap size can be at most 4K, due to HW limitations. As a result
* this interface is only supported on CPU architectures that support 4K page
* size. The mmap_offset ioctl will detect this and gracefully return an
* error, where userspace is expected to have a different fallback method for
* triggering a barrier.
*
* Roughly the usage would be as follows:
* Roughly the usage would be as follows:
*
* .. code-block:: C
* .. code-block:: C
*
* struct drm_xe_gem_mmap_offset mmo = {
* .handle = 0, // must be set to 0
* .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
* };
* struct drm_xe_gem_mmap_offset mmo = {
* .handle = 0, // must be set to 0
* .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
* };
*
* err = ioctl(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo);
* map = mmap(NULL, size, PROT_WRITE, MAP_SHARED, fd, mmo.offset);
* map[i] = 0xdeadbeaf; // issue barrier
* err = ioctl(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo);
* map = mmap(NULL, size, PROT_WRITE, MAP_SHARED, fd, mmo.offset);
* map[i] = 0xdeadbeaf; // issue barrier
*/
struct drm_xe_gem_mmap_offset {
/** @extensions: Pointer to the first extension struct, if any */