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arm64: dts: qcom: qcs6490-rb3gen2: Add TC9563 PCIe switch node 

Add a node for the TC9563 PCIe switch, which has three downstream ports.
Two embedded Ethernet devices are present on one of the downstream ports.
As all these ports are present in the node represent the downstream
ports and embedded endpoints.

Power to the TC9563 is supplied through two LDO regulators, controlled by
two GPIOs, which are added as fixed regulators. Configure the TC9563
through I2C.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260105-tc9563-v1-1-642fd1fe7893@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
master
Krishna Chaitanya Chundru 2026-01-05 15:55:24 +05:30 committed by Bjorn Andersson
parent 3af51501e2
commit aa7b4bbcb3
2 changed files with 129 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/qcom/kodiak.dtsi
View File

@ -2424,7 +2424,7 @@
status = "disabled";
pcie@0 {
pcie1_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;

128
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
View File

@ -262,6 +262,30 @@
};
};
vdd_ntn_0p9: regulator-vdd-ntn-0p9 {
compatible = "regulator-fixed";
regulator-name = "VDD_NTN_0P9";
gpio = <&pm8350c_gpios 2 GPIO_ACTIVE_HIGH>;
regulator-min-microvolt = <899400>;
regulator-max-microvolt = <899400>;
enable-active-high;
pinctrl-0 = <&ntn_0p9_en>;
pinctrl-names = "default";
regulator-enable-ramp-delay = <4300>;
};
vdd_ntn_1p8: regulator-vdd-ntn-1p8 {
compatible = "regulator-fixed";
regulator-name = "VDD_NTN_1P8";
gpio = <&pm8350c_gpios 3 GPIO_ACTIVE_HIGH>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
enable-active-high;
pinctrl-0 = <&ntn_1p8_en>;
pinctrl-names = "default";
regulator-enable-ramp-delay = <10000>;
};
wcn6750-pmu {
compatible = "qcom,wcn6750-pmu";
pinctrl-0 = <&bt_en>;
@ -803,6 +827,78 @@
status = "okay";
};
&pcie1_port0 {
pcie@0,0 {
compatible = "pci1179,0623";
reg = <0x10000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
bus-range = <0x2 0xff>;
vddc-supply = <&vdd_ntn_0p9>;
vdd18-supply = <&vdd_ntn_1p8>;
vdd09-supply = <&vdd_ntn_0p9>;
vddio1-supply = <&vdd_ntn_1p8>;
vddio2-supply = <&vdd_ntn_1p8>;
vddio18-supply = <&vdd_ntn_1p8>;
i2c-parent = <&i2c0 0x77>;
resx-gpios = <&pm8350c_gpios 1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&tc9563_resx_n>;
pinctrl-names = "default";
pcie@1,0 {
reg = <0x20800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
bus-range = <0x3 0xff>;
};
pcie@2,0 {
reg = <0x21000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
bus-range = <0x4 0xff>;
};
pcie@3,0 {
reg = <0x21800 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
bus-range = <0x5 0xff>;
pci@0,0 {
reg = <0x50000 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
};
pci@0,1 {
reg = <0x50100 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
};
};
};
};
&pm7325_gpios {
kypd_vol_up_n: kypd-vol-up-n-state {
pins = "gpio6";
@ -1081,6 +1177,38 @@
};
};
&pm8350c_gpios {
ntn_0p9_en: ntn-0p9-en-state {
pins = "gpio2";
function = "normal";
bias-disable;
input-disable;
output-enable;
power-source = <0>;
};
ntn_1p8_en: ntn-1p8-en-state {
pins = "gpio3";
function = "normal";
bias-disable;
input-disable;
output-enable;
power-source = <0>;
};
tc9563_resx_n: tc9563-resx-state {
pins = "gpio1";
function = "normal";
bias-disable;
input-disable;
output-enable;
power-source = <0>;
};
};
&tlmm {
gpio-reserved-ranges = <32 2>, /* ADSP */
<48 4>; /* NFC */