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ARM: SoC fixes for 6.3, part 3 

There are a number of updates for devicetree files for Qualcomm,
 Rockchips, and NXP i.MX platforms, addressing mistakes in the DT
 contents:
 
  - Wrong GPIO polarity on some boards
 
  - Lower SD card interface speed for better stability
 
  - Incorrect power supply, clock, pmic, cache properties
 
  - Disable broken hbr3 on sc7280-herobrine
 
  - Devicetree warning fixes
 
 The only other changes are:
 
  - A regression fix for the Amlogic performance monitoring unit driver,
    along with two related DT changes.
 
  - imx_v6_v7_defconfig enables PCI support again.
 
  - Trivial fixes for tee, optee and psci firmware drivers, addressing
    compiler warning and error output
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Merge tag 'arm-fixes-6.3-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "There are a number of updates for devicetree files for Qualcomm,
  Rockchips, and NXP i.MX platforms, addressing mistakes in the DT
  contents:

   - Wrong GPIO polarity on some boards

   - Lower SD card interface speed for better stability

   - Incorrect power supply, clock, pmic, cache properties

   - Disable broken hbr3 on sc7280-herobrine

   - Devicetree warning fixes

  The only other changes are:

   - A regression fix for the Amlogic performance monitoring unit
     driver, along with two related DT changes.

   - imx_v6_v7_defconfig enables PCI support again.

   - Trivial fixes for tee, optee and psci firmware drivers, addressing
     compiler warning and error output"

* tag 'arm-fixes-6.3-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (32 commits)
  firmware/psci: demote suspend-mode warning to info level
  arm64: dts: qcom: sc7280: remove hbr3 support on herobrine boards
  ARM: imx_v6_v7_defconfig: Fix unintentional disablement of PCI
  arm64: dts: rockchip: correct panel supplies on some rk3326 boards
  arm64: dts: rockchip: use just "port" in panel on RockPro64
  arm64: dts: rockchip: use just "port" in panel on Pinebook Pro
  ARM: dts: imx6ull-colibri: Remove unnecessary #address-cells/#size-cells
  ARM: dts: imx7d-remarkable2: Remove unnecessary #address-cells/#size-cells
  arm64: dts: imx8mp-verdin: correct off-on-delay
  arm64: dts: imx8mm-verdin: correct off-on-delay
  arm64: dts: imx8mm-evk: correct pmic clock source
  arm64: dts: qcom: sc8280xp-pmics: fix pon compatible and registers
  arm64: dts: rockchip: Remove non-existing pwm-delay-us property
  arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices
  tee: Pass a pointer to virt_to_page()
  perf/amlogic: adjust register offsets
  arm64: dts: meson-g12-common: resolve conflict between canvas & pmu
  arm64: dts: meson-g12-common: specify full DMC range
  arm64: dts: imx8mp: fix address length for LCDIF2
  riscv: dts: canaan: drop invalid spi-max-frequency
  ...
pull/795/merge
Linus Torvalds 2023-04-18 08:21:45 -07:00
parent 6a8f57ae2e d75eecc3d1
commit bbab25317c
37 changed files with 87 additions and 97 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
arch/arm/boot/dts/imx6ull-colibri.dtsi
View File

@ -33,15 +33,9 @@
self-powered;
type = "micro";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_dr_connector: endpoint {
remote-endpoint = <&usb1_drd_sw>;
};
port {
usb_dr_connector: endpoint {
remote-endpoint = <&usb1_drd_sw>;
};
};
};

2
arch/arm/boot/dts/imx7d-remarkable2.dts
View File

@ -118,8 +118,6 @@
reg = <0x62>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_epdpmic>;
#address-cells = <1>;
#size-cells = <0>;
#thermal-sensor-cells = <0>;
epd-pwr-good-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;

2
arch/arm/boot/dts/rk3288.dtsi
View File

@ -942,7 +942,7 @@
status = "disabled";
};
spdif: sound@ff88b0000 {
spdif: sound@ff8b0000 {
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
reg = <0x0 0xff8b0000 0x0 0x10000>;
#sound-dai-cells = <0>;

2
arch/arm/configs/imx_v6_v7_defconfig
View File

@ -76,7 +76,7 @@ CONFIG_RFKILL=y
CONFIG_RFKILL_INPUT=y
CONFIG_PCI=y
CONFIG_PCI_MSI=y
CONFIG_PCI_IMX6=y
CONFIG_PCI_IMX6_HOST=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set

15
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
View File

@ -1571,15 +1571,20 @@
dmc: bus@38000 {
compatible = "simple-bus";
reg = <0x0 0x38000 0x0 0x400>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>;
ranges = <0x0 0x0 0x0 0x38000 0x0 0x2000>;
canvas: video-lut@48 {
compatible = "amlogic,canvas";
reg = <0x0 0x48 0x0 0x14>;
};
pmu: pmu@80 {
reg = <0x0 0x80 0x0 0x40>,
<0x0 0xc00 0x0 0x40>;
interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
};
};
usb2_phy1: phy@3a000 {
@ -1705,12 +1710,6 @@
};
};
pmu: pmu@ff638000 {
reg = <0x0 0xff638000 0x0 0x100>,
<0x0 0xff638c00 0x0 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
};
aobus: bus@ff800000 {
compatible = "simple-bus";
reg = <0x0 0xff800000 0x0 0x100000>;

2
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
View File

@ -194,7 +194,7 @@
rohm,reset-snvs-powered;
#clock-cells = <0>;
clocks = <&osc_32k 0>;
clocks = <&osc_32k>;
clock-output-names = "clk-32k-out";
regulators {

4
arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
View File

@ -99,7 +99,7 @@
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; /* PMIC_EN_ETH */
off-on-delay = <500000>;
off-on-delay-us = <500000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_eth>;
regulator-always-on;
@ -139,7 +139,7 @@
enable-active-high;
/* Verdin SD_1_PWR_EN (SODIMM 76) */
gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
off-on-delay = <100000>;
off-on-delay-us = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
regulator-max-microvolt = <3300000>;

2
arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi
View File

@ -10,7 +10,7 @@
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio_expander_21 4 GPIO_ACTIVE_HIGH>; /* ETH_PWR_EN */
off-on-delay = <500000>;
off-on-delay-us = <500000>;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "+V3.3_ETH";

4
arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
View File

@ -87,7 +87,7 @@
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; /* PMIC_EN_ETH */
off-on-delay = <500000>;
off-on-delay-us = <500000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_eth>;
regulator-always-on;
@ -128,7 +128,7 @@
enable-active-high;
/* Verdin SD_1_PWR_EN (SODIMM 76) */
gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
off-on-delay = <100000>;
off-on-delay-us = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
regulator-max-microvolt = <3300000>;

2
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View File

@ -1128,7 +1128,7 @@
lcdif2: display-controller@32e90000 {
compatible = "fsl,imx8mp-lcdif";
reg = <0x32e90000 0x238>;
reg = <0x32e90000 0x10000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>,
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>,

4
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
View File

@ -62,11 +62,11 @@
perst-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
};
&pcie_phy0 {
&pcie_qmp0 {
status = "okay";
};
&pcie_phy1 {
&pcie_qmp1 {
status = "okay";
};

4
arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi
View File

@ -48,11 +48,11 @@
perst-gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
};
&pcie_phy0 {
&pcie_qmp0 {
status = "okay";
};
&pcie_phy1 {
&pcie_qmp1 {
status = "okay";
};

4
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
View File

@ -1012,7 +1012,7 @@
left_spkr: speaker@0,3 {
compatible = "sdw10217211000";
reg = <0 3>;
powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrLeft";
#sound-dai-cells = <0>;
@ -1021,7 +1021,7 @@
right_spkr: speaker@0,4 {
compatible = "sdw10217211000";
reg = <0 4>;
powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrRight";
#sound-dai-cells = <0>;

2
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
View File

@ -464,7 +464,7 @@ ap_i2c_tpm: &i2c14 {
&mdss_dp_out {
data-lanes = <0 1>;
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000>;
};
&mdss_mdp {

5
arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
View File

@ -59,8 +59,9 @@
#size-cells = <0>;
pmk8280_pon: pon@1300 {
compatible = "qcom,pm8998-pon";
reg = <0x1300>;
compatible = "qcom,pmk8350-pon";
reg = <0x1300>, <0x800>;
reg-names = "hlos", "pbs";
pmk8280_pon_pwrkey: pwrkey {
compatible = "qcom,pmk8350-pwrkey";

4
arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
View File

@ -753,7 +753,7 @@
left_spkr: speaker@0,3 {
compatible = "sdw10217211000";
reg = <0 3>;
powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrLeft";
#sound-dai-cells = <0>;
@ -761,7 +761,7 @@
right_spkr: speaker@0,4 {
compatible = "sdw10217211000";
powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_LOW>;
reg = <0 4>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrRight";

4
arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
View File

@ -662,7 +662,7 @@
left_spkr: speaker@0,3 {
compatible = "sdw10217211000";
reg = <0 3>;
powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrLeft";
#sound-dai-cells = <0>;
@ -670,7 +670,7 @@
right_spkr: speaker@0,4 {
compatible = "sdw10217211000";
powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_LOW>;
reg = <0 4>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrRight";

4
arch/arm64/boot/dts/qcom/sm8250-mtp.dts
View File

@ -764,7 +764,7 @@
left_spkr: speaker@0,3 {
compatible = "sdw10217211000";
reg = <0 3>;
powerdown-gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
powerdown-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrLeft";
#sound-dai-cells = <0>;
@ -773,7 +773,7 @@
right_spkr: speaker@0,4 {
compatible = "sdw10217211000";
reg = <0 4>;
powerdown-gpios = <&tlmm 127 GPIO_ACTIVE_HIGH>;
powerdown-gpios = <&tlmm 127 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrRight";
#sound-dai-cells = <0>;

2
arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dts
View File

@ -24,6 +24,8 @@
&internal_display {
compatible = "elida,kd35t133";
iovcc-supply = <&vcc_lcd>;
vdd-supply = <&vcc_lcd>;
};
&pwm0 {

2
arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi
View File

@ -235,10 +235,8 @@
internal_display: panel@0 {
reg = <0>;
backlight = <&backlight>;
iovcc-supply = <&vcc_lcd>;
reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
rotation = <270>;
vdd-supply = <&vcc_lcd>;
port {
mipi_in_panel: endpoint {

2
arch/arm64/boot/dts/rockchip/rk3326-odroid-go2-v11.dts
View File

@ -83,6 +83,8 @@
&internal_display {
compatible = "elida,kd35t133";
iovcc-supply = <&vcc_lcd>;
vdd-supply = <&vcc_lcd>;
};
&rk817 {

2
arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
View File

@ -59,6 +59,8 @@
&internal_display {
compatible = "elida,kd35t133";
iovcc-supply = <&vcc_lcd>;
vdd-supply = <&vcc_lcd>;
};
&rk817_charger {

1
arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
View File

@ -61,7 +61,6 @@
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
pwm-delay-us = <10000>;
};
emmc_pwrseq: emmc-pwrseq {

1
arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
View File

@ -198,7 +198,6 @@
power-supply = <&pp3300_disp>;
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwm-delay-us = <10000>;
};
gpio_keys: gpio-keys {

1
arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
View File

@ -167,7 +167,6 @@
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwms = <&pwm1 0 1000000 0>;
pwm-delay-us = <10000>;
};
dmic: dmic {

18
arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
View File

@ -50,19 +50,9 @@
pinctrl-0 = <&panel_en_pin>;
power-supply = <&vcc3v3_panel>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
panel_in_edp: endpoint@0 {
reg = <0>;
remote-endpoint = <&edp_out_panel>;
};
port {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
@ -943,7 +933,7 @@
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
sd-uhs-sdr104;
sd-uhs-sdr50;
vmmc-supply = <&vcc3v0_sd>;
vqmmc-supply = <&vcc_sdio>;
status = "okay";

12
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
View File

@ -647,16 +647,10 @@
avdd-supply = <&avdd>;
backlight = <&backlight>;
dvdd-supply = <&vcc3v3_s0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mipi_in_panel: endpoint {
remote-endpoint = <&mipi_out_panel>;
};
port {
mipi_in_panel: endpoint {
remote-endpoint = <&mipi_out_panel>;
};
};
};

2
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View File

@ -552,7 +552,7 @@
<0x0 0xfff10000 0 0x10000>, /* GICH */
<0x0 0xfff20000 0 0x10000>; /* GICV */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
its: interrupt-controller@fee20000 {
its: msi-controller@fee20000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;

6
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
View File

@ -16,8 +16,10 @@
};
&cru {
assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
assigned-clock-rates = <1200000000>, <200000000>, <241500000>;
assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
<&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
assigned-clock-rates = <32768>, <1200000000>,
<200000000>, <241500000>;
};
&gpio_keys_control {

6
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts
View File

@ -105,8 +105,10 @@
};
&cru {
assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
assigned-clock-rates = <1200000000>, <200000000>, <500000000>;
assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
<&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
assigned-clock-rates = <32768>, <1200000000>,
<200000000>, <500000000>;
};
&dsi_dphy0 {

2
arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi
View File

@ -598,7 +598,7 @@
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
sd-uhs-sdr104;
sd-uhs-sdr50;
vmmc-supply = <&vcc3v3_sys>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";

9
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@ -222,6 +222,7 @@
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -230,6 +231,7 @@
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -238,6 +240,7 @@
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -246,6 +249,7 @@
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -254,6 +258,7 @@
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -262,6 +267,7 @@
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -270,6 +276,7 @@
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -278,6 +285,7 @@
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -286,6 +294,7 @@
cache-size = <3145728>;
cache-line-size = <64>;
cache-sets = <4096>;
cache-level = <3>;
};
};

1
arch/riscv/boot/dts/canaan/k210.dtsi
View File

@ -259,7 +259,6 @@
<&sysclk K210_CLK_APB0>;
clock-names = "ssi_clk", "pclk";
resets = <&sysrst K210_RST_SPI2>;
spi-max-frequency = <25000000>;
};
i2s0: i2s@50250000 {

3
drivers/firmware/psci/psci.c
View File

@ -167,7 +167,8 @@ int psci_set_osi_mode(bool enable)
err = invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, suspend_mode, 0, 0);
if (err < 0)
pr_warn("failed to set %s mode: %d\n", enable ? "OSI" : "PC", err);
pr_info(FW_BUG "failed to set %s mode: %d\n",
enable ? "OSI" : "PC", err);
return psci_to_linux_errno(err);
}

32
drivers/perf/amlogic/meson_g12_ddr_pmu.c
View File

@ -21,23 +21,23 @@
#define DMC_QOS_IRQ BIT(30)
/* DMC bandwidth monitor register address offset */
#define DMC_MON_G12_CTRL0 (0x20 << 2)
#define DMC_MON_G12_CTRL1 (0x21 << 2)
#define DMC_MON_G12_CTRL2 (0x22 << 2)
#define DMC_MON_G12_CTRL3 (0x23 << 2)
#define DMC_MON_G12_CTRL4 (0x24 << 2)
#define DMC_MON_G12_CTRL5 (0x25 << 2)
#define DMC_MON_G12_CTRL6 (0x26 << 2)
#define DMC_MON_G12_CTRL7 (0x27 << 2)
#define DMC_MON_G12_CTRL8 (0x28 << 2)
#define DMC_MON_G12_CTRL0 (0x0 << 2)
#define DMC_MON_G12_CTRL1 (0x1 << 2)
#define DMC_MON_G12_CTRL2 (0x2 << 2)
#define DMC_MON_G12_CTRL3 (0x3 << 2)
#define DMC_MON_G12_CTRL4 (0x4 << 2)
#define DMC_MON_G12_CTRL5 (0x5 << 2)
#define DMC_MON_G12_CTRL6 (0x6 << 2)
#define DMC_MON_G12_CTRL7 (0x7 << 2)
#define DMC_MON_G12_CTRL8 (0x8 << 2)
#define DMC_MON_G12_ALL_REQ_CNT (0x29 << 2)
#define DMC_MON_G12_ALL_GRANT_CNT (0x2a << 2)
#define DMC_MON_G12_ONE_GRANT_CNT (0x2b << 2)
#define DMC_MON_G12_SEC_GRANT_CNT (0x2c << 2)
#define DMC_MON_G12_THD_GRANT_CNT (0x2d << 2)
#define DMC_MON_G12_FOR_GRANT_CNT (0x2e << 2)
#define DMC_MON_G12_TIMER (0x2f << 2)
#define DMC_MON_G12_ALL_REQ_CNT (0x9 << 2)
#define DMC_MON_G12_ALL_GRANT_CNT (0xa << 2)
#define DMC_MON_G12_ONE_GRANT_CNT (0xb << 2)
#define DMC_MON_G12_SEC_GRANT_CNT (0xc << 2)
#define DMC_MON_G12_THD_GRANT_CNT (0xd << 2)
#define DMC_MON_G12_FOR_GRANT_CNT (0xe << 2)
#define DMC_MON_G12_TIMER (0xf << 2)
/* Each bit represent a axi line */
PMU_FORMAT_ATTR(event, "config:0-7");

2
drivers/tee/optee/call.c
View File

@ -488,7 +488,7 @@ static bool is_normal_memory(pgprot_t p)
#elif defined(CONFIG_ARM64)
return (pgprot_val(p) & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL);
#else
#error "Unuspported architecture"
#error "Unsupported architecture"
#endif
}

2
drivers/tee/tee_shm.c
View File

@ -32,7 +32,7 @@ static int shm_get_kernel_pages(unsigned long start, size_t page_count,
is_kmap_addr((void *)start)))
return -EINVAL;
page = virt_to_page(start);
page = virt_to_page((void *)start);
for (n = 0; n < page_count; n++) {
pages[n] = page + n;
get_page(pages[n]);