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clk: qcom: rpmh: Add support for SM8750 rpmh clocks 

Add the RPMH clocks present in SM8750 SoC.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241204-sm8750_master_clks-v3-3-1a8f31a53a86@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
pull/1131/head
Taniya Das 2024-12-04 11:37:15 -08:00 committed by Bjorn Andersson
parent d7df7a718f
commit c035a9e265
1 changed files with 24 additions and 0 deletions
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24
drivers/clk/qcom/clk-rpmh.c
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@ -368,6 +368,8 @@ DEFINE_CLK_RPMH_VRM(rf_clk2, _d, "rfclkd2", 1);
DEFINE_CLK_RPMH_VRM(rf_clk3, _d, "rfclkd3", 1); DEFINE_CLK_RPMH_VRM(rf_clk3, _d, "rfclkd3", 1);
DEFINE_CLK_RPMH_VRM(rf_clk4, _d, "rfclkd4", 1); DEFINE_CLK_RPMH_VRM(rf_clk4, _d, "rfclkd4", 1);
DEFINE_CLK_RPMH_VRM(rf_clk3, _a2, "rfclka3", 2);
DEFINE_CLK_RPMH_VRM(clk1, _a1, "clka1", 1); DEFINE_CLK_RPMH_VRM(clk1, _a1, "clka1", 1);
DEFINE_CLK_RPMH_VRM(clk2, _a1, "clka2", 1); DEFINE_CLK_RPMH_VRM(clk2, _a1, "clka2", 1);
DEFINE_CLK_RPMH_VRM(clk3, _a1, "clka3", 1); DEFINE_CLK_RPMH_VRM(clk3, _a1, "clka3", 1);
@ -825,6 +827,27 @@ static const struct clk_rpmh_desc clk_rpmh_qcs615 = {
.num_clks = ARRAY_SIZE(qcs615_rpmh_clocks), .num_clks = ARRAY_SIZE(qcs615_rpmh_clocks),
}; };
static struct clk_hw *sm8750_rpmh_clocks[] = {
[RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw,
[RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw,
[RPMH_LN_BB_CLK1] = &clk_rpmh_clk6_a2.hw,
[RPMH_LN_BB_CLK1_A] = &clk_rpmh_clk6_a2_ao.hw,
[RPMH_LN_BB_CLK3] = &clk_rpmh_clk8_a2.hw,
[RPMH_LN_BB_CLK3_A] = &clk_rpmh_clk8_a2_ao.hw,
[RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw,
[RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw,
[RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_a.hw,
[RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_a_ao.hw,
[RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_a2.hw,
[RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_a2_ao.hw,
[RPMH_IPA_CLK] = &clk_rpmh_ipa.hw,
};
static const struct clk_rpmh_desc clk_rpmh_sm8750 = {
.clks = sm8750_rpmh_clocks,
.num_clks = ARRAY_SIZE(sm8750_rpmh_clocks),
};
static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec, static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
void *data) void *data)
{ {
@ -929,6 +952,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
{ .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450}, { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450},
{ .compatible = "qcom,sm8550-rpmh-clk", .data = &clk_rpmh_sm8550}, { .compatible = "qcom,sm8550-rpmh-clk", .data = &clk_rpmh_sm8550},
{ .compatible = "qcom,sm8650-rpmh-clk", .data = &clk_rpmh_sm8650}, { .compatible = "qcom,sm8650-rpmh-clk", .data = &clk_rpmh_sm8650},
{ .compatible = "qcom,sm8750-rpmh-clk", .data = &clk_rpmh_sm8750},
{ .compatible = "qcom,x1e80100-rpmh-clk", .data = &clk_rpmh_x1e80100}, { .compatible = "qcom,x1e80100-rpmh-clk", .data = &clk_rpmh_x1e80100},
{ } { }
}; };