ACPI: CPPC: Do not use CPUFREQ_ETERNAL as an error value
Instead of using CPUFREQ_ETERNAL for signaling an error condition in cppc_get_transition_latency(), change the return value type of that function to int and make it return a proper negative error code on failures. No intentional functional impact. Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Reviewed-by: Jie Zhan <zhanjie9@hisilicon.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Qais Yousef <qyousef@layalina.io>pull/1354/merge
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f965d111e6
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c28a280bd4
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@ -1876,7 +1876,7 @@ EXPORT_SYMBOL_GPL(cppc_set_perf);
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* If desired_reg is in the SystemMemory or SystemIo ACPI address space,
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* If desired_reg is in the SystemMemory or SystemIo ACPI address space,
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* then assume there is no latency.
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* then assume there is no latency.
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*/
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*/
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unsigned int cppc_get_transition_latency(int cpu_num)
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int cppc_get_transition_latency(int cpu_num)
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{
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{
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/*
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/*
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* Expected transition latency is based on the PCCT timing values
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* Expected transition latency is based on the PCCT timing values
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@ -1889,31 +1889,29 @@ unsigned int cppc_get_transition_latency(int cpu_num)
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* completion of a command before issuing the next command,
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* completion of a command before issuing the next command,
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* in microseconds.
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* in microseconds.
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*/
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*/
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unsigned int latency_ns = 0;
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struct cpc_desc *cpc_desc;
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struct cpc_desc *cpc_desc;
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struct cpc_register_resource *desired_reg;
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struct cpc_register_resource *desired_reg;
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int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu_num);
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int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu_num);
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struct cppc_pcc_data *pcc_ss_data;
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struct cppc_pcc_data *pcc_ss_data;
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int latency_ns = 0;
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cpc_desc = per_cpu(cpc_desc_ptr, cpu_num);
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cpc_desc = per_cpu(cpc_desc_ptr, cpu_num);
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if (!cpc_desc)
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if (!cpc_desc)
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return CPUFREQ_ETERNAL;
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return -ENODATA;
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desired_reg = &cpc_desc->cpc_regs[DESIRED_PERF];
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desired_reg = &cpc_desc->cpc_regs[DESIRED_PERF];
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if (CPC_IN_SYSTEM_MEMORY(desired_reg) || CPC_IN_SYSTEM_IO(desired_reg))
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if (CPC_IN_SYSTEM_MEMORY(desired_reg) || CPC_IN_SYSTEM_IO(desired_reg))
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return 0;
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return 0;
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else if (!CPC_IN_PCC(desired_reg))
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return CPUFREQ_ETERNAL;
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if (pcc_ss_id < 0)
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if (!CPC_IN_PCC(desired_reg) || pcc_ss_id < 0)
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return CPUFREQ_ETERNAL;
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return -ENODATA;
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pcc_ss_data = pcc_data[pcc_ss_id];
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pcc_ss_data = pcc_data[pcc_ss_id];
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if (pcc_ss_data->pcc_mpar)
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if (pcc_ss_data->pcc_mpar)
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latency_ns = 60 * (1000 * 1000 * 1000 / pcc_ss_data->pcc_mpar);
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latency_ns = 60 * (1000 * 1000 * 1000 / pcc_ss_data->pcc_mpar);
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latency_ns = max(latency_ns, pcc_ss_data->pcc_nominal * 1000);
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latency_ns = max_t(int, latency_ns, pcc_ss_data->pcc_nominal * 1000);
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latency_ns = max(latency_ns, pcc_ss_data->pcc_mrtt * 1000);
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latency_ns = max_t(int, latency_ns, pcc_ss_data->pcc_mrtt * 1000);
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return latency_ns;
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return latency_ns;
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}
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}
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@ -872,10 +872,10 @@ static void amd_pstate_update_limits(struct cpufreq_policy *policy)
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*/
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*/
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static u32 amd_pstate_get_transition_delay_us(unsigned int cpu)
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static u32 amd_pstate_get_transition_delay_us(unsigned int cpu)
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{
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{
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u32 transition_delay_ns;
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int transition_delay_ns;
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transition_delay_ns = cppc_get_transition_latency(cpu);
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transition_delay_ns = cppc_get_transition_latency(cpu);
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if (transition_delay_ns == CPUFREQ_ETERNAL) {
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if (transition_delay_ns < 0) {
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if (cpu_feature_enabled(X86_FEATURE_AMD_FAST_CPPC))
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if (cpu_feature_enabled(X86_FEATURE_AMD_FAST_CPPC))
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return AMD_PSTATE_FAST_CPPC_TRANSITION_DELAY;
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return AMD_PSTATE_FAST_CPPC_TRANSITION_DELAY;
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else
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else
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@ -891,10 +891,10 @@ static u32 amd_pstate_get_transition_delay_us(unsigned int cpu)
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*/
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*/
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static u32 amd_pstate_get_transition_latency(unsigned int cpu)
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static u32 amd_pstate_get_transition_latency(unsigned int cpu)
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{
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{
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u32 transition_latency;
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int transition_latency;
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transition_latency = cppc_get_transition_latency(cpu);
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transition_latency = cppc_get_transition_latency(cpu);
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if (transition_latency == CPUFREQ_ETERNAL)
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if (transition_latency < 0)
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return AMD_PSTATE_TRANSITION_LATENCY;
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return AMD_PSTATE_TRANSITION_LATENCY;
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return transition_latency;
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return transition_latency;
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@ -310,9 +310,9 @@ static int cppc_verify_policy(struct cpufreq_policy_data *policy)
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static unsigned int __cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
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static unsigned int __cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
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{
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{
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unsigned int transition_latency_ns = cppc_get_transition_latency(cpu);
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int transition_latency_ns = cppc_get_transition_latency(cpu);
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if (transition_latency_ns == CPUFREQ_ETERNAL)
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if (transition_latency_ns < 0)
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return CPUFREQ_DEFAULT_TRANSITION_LATENCY_NS / NSEC_PER_USEC;
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return CPUFREQ_DEFAULT_TRANSITION_LATENCY_NS / NSEC_PER_USEC;
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return transition_latency_ns / NSEC_PER_USEC;
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return transition_latency_ns / NSEC_PER_USEC;
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@ -160,7 +160,7 @@ extern unsigned int cppc_khz_to_perf(struct cppc_perf_caps *caps, unsigned int f
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extern bool acpi_cpc_valid(void);
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extern bool acpi_cpc_valid(void);
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extern bool cppc_allow_fast_switch(void);
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extern bool cppc_allow_fast_switch(void);
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extern int acpi_get_psd_map(unsigned int cpu, struct cppc_cpudata *cpu_data);
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extern int acpi_get_psd_map(unsigned int cpu, struct cppc_cpudata *cpu_data);
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extern unsigned int cppc_get_transition_latency(int cpu);
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extern int cppc_get_transition_latency(int cpu);
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extern bool cpc_ffh_supported(void);
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extern bool cpc_ffh_supported(void);
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extern bool cpc_supported_by_cpu(void);
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extern bool cpc_supported_by_cpu(void);
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extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val);
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extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val);
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@ -216,9 +216,9 @@ static inline bool cppc_allow_fast_switch(void)
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{
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{
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return false;
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return false;
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}
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}
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static inline unsigned int cppc_get_transition_latency(int cpu)
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static inline int cppc_get_transition_latency(int cpu)
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{
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{
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return CPUFREQ_ETERNAL;
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return -ENODATA;
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}
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}
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static inline bool cpc_ffh_supported(void)
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static inline bool cpc_ffh_supported(void)
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{
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{
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