fpga: altera-cvp: Use pci_find_vsec_capability() when probing FPGA device
Currently altera_cvp_probe() open-codes pci_find_vsec_capability(). Refactor the former to use the latter. With that done: - use the VSEC ID as per datasheet [1] - update the error message accordingly Link: https://www.intel.com/content/www/us/en/docs/programmable/683763/23-1/vendor-specific-header-register.html [1] Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20251109201729.3220460-1-andriy.shevchenko@linux.intel.com Reviewed-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>pull/1354/merge
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2cf07ffeba
commit
c9243d6df0
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@ -22,9 +22,6 @@
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#define TIMEOUT_US 2000 /* CVP STATUS timeout for USERMODE polling */
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/* Vendor Specific Extended Capability Registers */
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#define VSE_PCIE_EXT_CAP_ID 0x0
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#define VSE_PCIE_EXT_CAP_ID_VAL 0x000b /* 16bit */
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#define VSE_CVP_STATUS 0x1c /* 32bit */
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#define VSE_CVP_STATUS_CFG_RDY BIT(18) /* CVP_CONFIG_READY */
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#define VSE_CVP_STATUS_CFG_ERR BIT(19) /* CVP_CONFIG_ERROR */
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@ -577,25 +574,18 @@ static int altera_cvp_probe(struct pci_dev *pdev,
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{
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struct altera_cvp_conf *conf;
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struct fpga_manager *mgr;
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int ret, offset;
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u16 cmd, val;
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u16 cmd, offset;
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u32 regval;
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/* Discover the Vendor Specific Offset for this device */
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offset = pci_find_next_ext_capability(pdev, 0, PCI_EXT_CAP_ID_VNDR);
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if (!offset) {
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dev_err(&pdev->dev, "No Vendor Specific Offset.\n");
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return -ENODEV;
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}
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int ret;
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/*
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* First check if this is the expected FPGA device. PCI config
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* space access works without enabling the PCI device, memory
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* space access is enabled further down.
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*/
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pci_read_config_word(pdev, offset + VSE_PCIE_EXT_CAP_ID, &val);
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if (val != VSE_PCIE_EXT_CAP_ID_VAL) {
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dev_err(&pdev->dev, "Wrong EXT_CAP_ID value 0x%x\n", val);
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offset = pci_find_vsec_capability(pdev, PCI_VENDOR_ID_ALTERA, 0x1172);
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if (!offset) {
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dev_err(&pdev->dev, "Wrong VSEC ID value\n");
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return -ENODEV;
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}
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