arm64: dts: imx8mm-kontron: Add overlay for LTE extension board
This is an addon for the BL i.MX8MM that features an LTE modem, a TPM module, some LEDs and a pushbutton. Signed-off-by: Annette Kobou <annette.kobou@kontron.de> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>pull/1354/merge
Annette Kobou
Shawn Guo
parent
1a9480e4fe
commit
cd565458c6
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@ -373,8 +373,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-pcie0-ep.dtb imx95-19x19-evk-pcie1-ep.
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dtb-$(CONFIG_ARCH_MXC) += imx95-libra-rdk-fpsc.dtb
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imx8mm-kontron-dl-dtbs := imx8mm-kontron-bl.dtb imx8mm-kontron-dl.dtbo
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imx8mm-kontron-bl-lte-dtbs := imx8mm-kontron-bl.dtb imx8mm-kontron-bl-lte.dtbo
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-dl.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-bl-lte.dtb
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imx8mm-venice-gw72xx-0x-imx219-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-imx219.dtbo
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imx8mm-venice-gw72xx-0x-rpidsi-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rpidsi.dtbo
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@ -0,0 +1,186 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Copyright (C) 2025 Kontron Electronics GmbH
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/leds/common.h>
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#include "imx8mm-pinfunc.h"
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&{/} {
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compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm";
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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key-user {
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label = "user";
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linux,code = <BTN_0>;
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gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_led_lte>;
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lte-led1-b {
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label = "lte-led1-blue";
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
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};
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lte-led1-g {
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label = "lte-led1-green";
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
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};
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lte-led1-r {
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label = "lte-led1-red";
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color = <LED_COLOR_ID_RED>;
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gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>;
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};
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lte-led2-b {
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label = "lte-led2-blue";
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>;
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};
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lte-led2-g {
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label = "lte-led2-green";
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>;
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};
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lte-led2-r {
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label = "lte-led2-red";
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color = <LED_COLOR_ID_RED>;
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gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&ecspi3 {
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status = "disabled";
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};
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&i2c2 {
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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tpm@2e {
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compatible = "infineon,slb9673", "tcg,tpm-tis-i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tpm>;
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reg = <0x2e>;
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interrupt-parent = <&gpio3>;
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interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&gpio3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio3>;
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gpio-line-names = "", "", "", "",
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"", "", "", "",
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"", "", "VDD_IO_REF", "TPM_PIRQ#",
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"TPM_RESET# ", "", "", "",
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"", "LTE_LED1_B", "LTE_LED1_G", "",
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"";
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vdd-io-ref-hog {
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gpio-hog;
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gpios = <10 GPIO_ACTIVE_HIGH>;
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line-name = "VDD_IO_REF";
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output-high;
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};
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tpm-reset-hog {
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gpio-hog;
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gpios = <12 GPIO_ACTIVE_LOW>;
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line-name = "TPM_RESET#";
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output-low;
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};
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};
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&gpio4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio4>;
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gpio-line-names = "", "", "LTE_RESET", "",
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"", "", "", "",
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"", "", "", "LTE_PWRKEY",
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"", "", "", "",
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"", "", "", "",
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"LTE_PWR_EN";
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};
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&gpio5 {
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gpio-line-names = "", "", "", "",
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"", "", "", "",
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"", "", "", "",
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"", "", "", "",
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"", "", "", "",
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"", "", "LTE_LED2_G", "LTE_LED1_R",
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"LTE_LED2_R", "LTE_LED2_B";
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};
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&iomuxc {
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pinctrl_gpio3: gpio3grp {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_DATA04_GPIO3_IO10 0x19 /* VDD_IO_REF */
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>;
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};
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pinctrl_gpio4: gpio4grp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x19 /* LTE_RESET */
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MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11 0x19 /* LTE_PWRKEY */
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MX8MM_IOMUXC_SAI1_MCLK_GPIO4_IO20 0x19 /* LTE_PWR_EN */
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>;
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};
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pinctrl_gpio_keys: gpiokeysgrp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x19 /* Pushbutton */
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>;
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};
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pinctrl_gpio_led_lte: gpioledltegrp {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_WE_B_GPIO3_IO17 0x19 /* LTE_LED1_B */
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MX8MM_IOMUXC_NAND_WP_B_GPIO3_IO18 0x19 /* LTE_LED1_G */
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MX8MM_IOMUXC_UART1_TXD_GPIO5_IO23 0x19 /* LTE_LED1_R */
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MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x19 /* LTE_LED2_B */
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MX8MM_IOMUXC_UART1_RXD_GPIO5_IO22 0x19 /* LTE_LED2_G */
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MX8MM_IOMUXC_UART2_RXD_GPIO5_IO24 0x19 /* LTE_LED2_R */
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000083 /* I2C_A_SCL */
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MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000083 /* I2C_A_SDA */
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>;
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};
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pinctrl_tpm: tpmgrp {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_DATA05_GPIO3_IO11 0x19 /* TPM_PIRQ# */
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MX8MM_IOMUXC_NAND_DATA06_GPIO3_IO12 0x39 /* TPM_RESET# */
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>;
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};
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};
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