mt76 patches for 6.19

- relicense to BSD-3-Clause-Clear
 - fixes
 - support WED on devices which exceed 32-bit DMA
 - airoha NPU support
 - mt7925 regd improvements
 - more mt7996 MLO work
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Merge tag 'mt76-next-2025-11-24' of https://github.com/nbd168/wireless

Felix Fietkau says:
===================
mt76 patches for 6.19

- relicense to BSD-3-Clause-Clear
- fixes
- support WED on devices which exceed 32-bit DMA
- airoha NPU support
- mt7925 regd improvements
- more mt7996 MLO work
===================

Link: https://patch.msgid.link/6b6d1033-dddf-4cc9-b240-93da7f8b8773@nbd.name
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
pull/1354/merge
Johannes Berg 2025-11-25 10:26:46 +01:00
commit cf1d7dc28c
218 changed files with 2504 additions and 683 deletions

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@ -151,6 +151,12 @@ properties:
- ETSI
- JP
country:
$ref: /schemas/types.yaml#/definitions/string
pattern: '^[A-Z]{2}$'
description:
ISO 3166-1 alpha-2 country code for power limits
patternProperties:
"^txpower-[256]g$":
type: object
@ -210,6 +216,66 @@ properties:
minItems: 13
maxItems: 13
paths-cck:
$ref: /schemas/types.yaml#/definitions/uint8-array
minItems: 4
maxItems: 4
description:
4 half-dBm backoff values (1 - 4 antennas, single spacial
stream)
paths-ofdm:
$ref: /schemas/types.yaml#/definitions/uint8-array
minItems: 4
maxItems: 4
description:
4 half-dBm backoff values (1 - 4 antennas, single spacial
stream)
paths-ofdm-bf:
$ref: /schemas/types.yaml#/definitions/uint8-array
minItems: 4
maxItems: 4
description:
4 half-dBm backoff values for beamforming
(1 - 4 antennas, single spacial stream)
paths-ru:
$ref: /schemas/types.yaml#/definitions/uint8-matrix
description:
Sets of half-dBm backoff values for 802.11ax rates for
1T1ss (aka 1 transmitting antenna with 1 spacial stream),
2T1ss, 3T1ss, 4T1ss, 2T2ss, 3T2ss, 4T2ss, 3T3ss, 4T3ss
and 4T4ss.
Each set starts with the number of channel bandwidth or
resource unit settings for which the rate set applies,
followed by 10 power limit values. The order of the
channel resource unit settings is RU26, RU52, RU106,
RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160.
minItems: 1
maxItems: 7
items:
minItems: 11
maxItems: 11
paths-ru-bf:
$ref: /schemas/types.yaml#/definitions/uint8-matrix
description:
Sets of half-dBm backoff (beamforming) values for 802.11ax
rates for 1T1ss (aka 1 transmitting antenna with 1 spacial
stream), 2T1ss, 3T1ss, 4T1ss, 2T2ss, 3T2ss, 4T2ss, 3T3ss,
4T3ss and 4T4ss.
Each set starts with the number of channel bandwidth or
resource unit settings for which the rate set applies,
followed by 10 power limit values. The order of the
channel resource unit settings is RU26, RU52, RU106,
RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160.
minItems: 1
maxItems: 7
items:
minItems: 11
maxItems: 11
txs-delta:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:

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@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
# SPDX-License-Identifier: BSD-3-Clause-Clear
config MT76_CORE
tristate
select PAGE_POOL
@ -37,6 +37,10 @@ config MT792x_USB
tristate
select MT76_USB
config MT76_NPU
bool
depends on MT76_CORE
source "drivers/net/wireless/mediatek/mt76/mt76x0/Kconfig"
source "drivers/net/wireless/mediatek/mt76/mt76x2/Kconfig"
source "drivers/net/wireless/mediatek/mt76/mt7603/Kconfig"

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@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
# SPDX-License-Identifier: BSD-3-Clause-Clear
obj-$(CONFIG_MT76_CORE) += mt76.o
obj-$(CONFIG_MT76_USB) += mt76-usb.o
obj-$(CONFIG_MT76_SDIO) += mt76-sdio.o
@ -12,6 +12,7 @@ mt76-y := \
mmio.o util.o trace.o dma.o mac80211.o debugfs.o eeprom.o \
tx.o agg-rx.o mcu.o wed.o scan.o channel.o
mt76-$(CONFIG_MT76_NPU) += npu.o
mt76-$(CONFIG_PCI) += pci.o
mt76-$(CONFIG_NL80211_TESTMODE) += testmode.o

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2018 Felix Fietkau <nbd@nbd.name>
*/

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@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2024 Felix Fietkau <nbd@nbd.name>
*/

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@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/
@ -93,9 +93,9 @@ void mt76_seq_puts_array(struct seq_file *file, const char *str,
{
int i;
seq_printf(file, "%10s:", str);
seq_printf(file, "%16s:", str);
for (i = 0; i < len; i++)
seq_printf(file, " %2d", val[i]);
seq_printf(file, " %4d", val[i]);
seq_puts(file, "\n");
}
EXPORT_SYMBOL_GPL(mt76_seq_puts_array);

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@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/
@ -7,37 +7,6 @@
#include "mt76.h"
#include "dma.h"
#if IS_ENABLED(CONFIG_NET_MEDIATEK_SOC_WED)
#define Q_READ(_q, _field) ({ \
u32 _offset = offsetof(struct mt76_queue_regs, _field); \
u32 _val; \
if ((_q)->flags & MT_QFLAG_WED) \
_val = mtk_wed_device_reg_read((_q)->wed, \
((_q)->wed_regs + \
_offset)); \
else \
_val = readl(&(_q)->regs->_field); \
_val; \
})
#define Q_WRITE(_q, _field, _val) do { \
u32 _offset = offsetof(struct mt76_queue_regs, _field); \
if ((_q)->flags & MT_QFLAG_WED) \
mtk_wed_device_reg_write((_q)->wed, \
((_q)->wed_regs + _offset), \
_val); \
else \
writel(_val, &(_q)->regs->_field); \
} while (0)
#else
#define Q_READ(_q, _field) readl(&(_q)->regs->_field)
#define Q_WRITE(_q, _field, _val) writel(_val, &(_q)->regs->_field)
#endif
static struct mt76_txwi_cache *
mt76_alloc_txwi(struct mt76_dev *dev)
{
@ -220,10 +189,15 @@ static void
mt76_dma_sync_idx(struct mt76_dev *dev, struct mt76_queue *q)
{
Q_WRITE(q, desc_base, q->desc_dma);
if (q->flags & MT_QFLAG_WED_RRO_EN)
if ((q->flags & MT_QFLAG_WED_RRO_EN) && !mt76_npu_device_active(dev))
Q_WRITE(q, ring_size, MT_DMA_RRO_EN | q->ndesc);
else
Q_WRITE(q, ring_size, q->ndesc);
if (mt76_queue_is_npu_tx(q)) {
writel(q->desc_dma, &q->regs->desc_base);
writel(q->ndesc, &q->regs->ring_size);
}
q->head = Q_READ(q, dma_idx);
q->tail = q->head;
}
@ -235,7 +209,7 @@ void mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q,
return;
if (!mt76_queue_is_wed_rro_ind(q) &&
!mt76_queue_is_wed_rro_rxdmad_c(q)) {
!mt76_queue_is_wed_rro_rxdmad_c(q) && !mt76_queue_is_npu(q)) {
int i;
/* clear descriptors */
@ -446,6 +420,7 @@ mt76_dma_tx_cleanup(struct mt76_dev *dev, struct mt76_queue *q, bool flush)
while (q->queued > 0 && q->tail != last) {
mt76_dma_tx_cleanup_idx(dev, q, q->tail, &entry);
mt76_npu_txdesc_cleanup(q, q->tail);
mt76_queue_tx_complete(dev, q, &entry);
if (entry.txwi) {
@ -680,6 +655,10 @@ mt76_dma_tx_queue_skb(struct mt76_phy *phy, struct mt76_queue *q,
if (test_bit(MT76_RESET, &phy->state))
goto free_skb;
/* TODO: Take into account unlinear skbs */
if (mt76_npu_device_active(dev) && skb_linearize(skb))
goto free_skb;
t = mt76_get_txwi(dev);
if (!t)
goto free_skb;
@ -727,6 +706,9 @@ mt76_dma_tx_queue_skb(struct mt76_phy *phy, struct mt76_queue *q,
if (ret < 0)
goto unmap;
if (mt76_npu_device_active(dev))
return mt76_npu_dma_add_buf(phy, q, skb, &tx_info.buf[1], txwi);
return mt76_dma_add_buf(dev, q, tx_info.buf, tx_info.nbuf,
tx_info.info, tx_info.skb, t);
@ -825,9 +807,17 @@ mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q,
q->ndesc = n_desc;
q->buf_size = bufsize;
q->hw_idx = idx;
q->dev = dev;
if (mt76_queue_is_wed_rro_ind(q))
size = sizeof(struct mt76_wed_rro_desc);
else if (mt76_queue_is_npu_tx(q))
size = sizeof(struct airoha_npu_tx_dma_desc);
else if (mt76_queue_is_npu_rx(q))
size = sizeof(struct airoha_npu_rx_dma_desc);
else
size = sizeof(struct mt76_desc);
size = mt76_queue_is_wed_rro_ind(q) ? sizeof(struct mt76_wed_rro_desc)
: sizeof(struct mt76_desc);
q->desc = dmam_alloc_coherent(dev->dma_dev, q->ndesc * size,
&q->desc_dma, GFP_KERNEL);
if (!q->desc)
@ -843,6 +833,7 @@ mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q,
if (ret)
return ret;
mt76_npu_queue_setup(dev, q);
ret = mt76_wed_dma_setup(dev, q, false);
if (ret)
return ret;
@ -870,6 +861,11 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q)
if (!q->ndesc)
return;
if (mt76_queue_is_npu(q)) {
mt76_npu_queue_cleanup(dev, q);
return;
}
do {
spin_lock_bh(&q->lock);
buf = mt76_dma_dequeue(dev, q, true, NULL, NULL, &more, NULL);
@ -900,7 +896,7 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)
return;
if (!mt76_queue_is_wed_rro_ind(q) &&
!mt76_queue_is_wed_rro_rxdmad_c(q)) {
!mt76_queue_is_wed_rro_rxdmad_c(q) && !mt76_queue_is_npu(q)) {
int i;
for (i = 0; i < q->ndesc; i++)
@ -920,7 +916,10 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)
return;
mt76_dma_sync_idx(dev, q);
mt76_dma_rx_fill_buf(dev, q, false);
if (mt76_queue_is_npu(q))
mt76_npu_fill_rx_queue(dev, q);
else
mt76_dma_rx_fill(dev, q, false);
}
static void

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@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/
@ -46,6 +46,73 @@
#define MT_FCE_INFO_LEN 4
#define MT_RX_RXWI_LEN 32
#if IS_ENABLED(CONFIG_NET_MEDIATEK_SOC_WED)
#define Q_READ(_q, _field) ({ \
u32 _offset = offsetof(struct mt76_queue_regs, _field); \
u32 _val; \
if ((_q)->flags & MT_QFLAG_WED) \
_val = mtk_wed_device_reg_read((_q)->wed, \
((_q)->wed_regs + \
_offset)); \
else \
_val = readl(&(_q)->regs->_field); \
_val; \
})
#define Q_WRITE(_q, _field, _val) do { \
u32 _offset = offsetof(struct mt76_queue_regs, _field); \
if ((_q)->flags & MT_QFLAG_WED) \
mtk_wed_device_reg_write((_q)->wed, \
((_q)->wed_regs + _offset), \
_val); \
else \
writel(_val, &(_q)->regs->_field); \
} while (0)
#elif IS_ENABLED(CONFIG_MT76_NPU)
#define Q_READ(_q, _field) ({ \
u32 _offset = offsetof(struct mt76_queue_regs, _field); \
u32 _val = 0; \
if ((_q)->flags & MT_QFLAG_NPU) { \
struct airoha_npu *npu; \
\
rcu_read_lock(); \
npu = rcu_dereference(q->dev->mmio.npu); \
if (npu) \
regmap_read(npu->regmap, \
((_q)->wed_regs + _offset), &_val); \
rcu_read_unlock(); \
} else { \
_val = readl(&(_q)->regs->_field); \
} \
_val; \
})
#define Q_WRITE(_q, _field, _val) do { \
u32 _offset = offsetof(struct mt76_queue_regs, _field); \
if ((_q)->flags & MT_QFLAG_NPU) { \
struct airoha_npu *npu; \
\
rcu_read_lock(); \
npu = rcu_dereference(q->dev->mmio.npu); \
if (npu) \
regmap_write(npu->regmap, \
((_q)->wed_regs + _offset), _val); \
rcu_read_unlock(); \
} else { \
writel(_val, &(_q)->regs->_field); \
} \
} while (0)
#else
#define Q_READ(_q, _field) readl(&(_q)->regs->_field)
#define Q_WRITE(_q, _field, _val) writel(_val, &(_q)->regs->_field)
#endif
struct mt76_desc {
__le32 buf0;
__le32 ctrl;

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@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/
@ -253,6 +253,19 @@ mt76_get_of_array(struct device_node *np, char *name, size_t *len, int min)
return prop->value;
}
static const s8 *
mt76_get_of_array_s8(struct device_node *np, char *name, size_t *len, int min)
{
struct property *prop = of_find_property(np, name, NULL);
if (!prop || !prop->value || prop->length < min)
return NULL;
*len = prop->length;
return prop->value;
}
struct device_node *
mt76_find_channel_node(struct device_node *np, struct ieee80211_channel *chan)
{
@ -294,7 +307,7 @@ mt76_get_txs_delta(struct device_node *np, u8 nss)
}
static void
mt76_apply_array_limit(s8 *pwr, size_t pwr_len, const __be32 *data,
mt76_apply_array_limit(s8 *pwr, size_t pwr_len, const s8 *data,
s8 target_power, s8 nss_delta, s8 *max_power)
{
int i;
@ -303,30 +316,29 @@ mt76_apply_array_limit(s8 *pwr, size_t pwr_len, const __be32 *data,
return;
for (i = 0; i < pwr_len; i++) {
pwr[i] = min_t(s8, target_power,
be32_to_cpu(data[i]) + nss_delta);
pwr[i] = min_t(s8, target_power, data[i] + nss_delta);
*max_power = max(*max_power, pwr[i]);
}
}
static void
mt76_apply_multi_array_limit(s8 *pwr, size_t pwr_len, s8 pwr_num,
const __be32 *data, size_t len, s8 target_power,
s8 nss_delta, s8 *max_power)
const s8 *data, size_t len, s8 target_power,
s8 nss_delta)
{
int i, cur;
s8 max_power = -128;
if (!data)
return;
len /= 4;
cur = be32_to_cpu(data[0]);
cur = data[0];
for (i = 0; i < pwr_num; i++) {
if (len < pwr_len + 1)
break;
mt76_apply_array_limit(pwr + pwr_len * i, pwr_len, data + 1,
target_power, nss_delta, max_power);
target_power, nss_delta, &max_power);
if (--cur > 0)
continue;
@ -335,7 +347,7 @@ mt76_apply_multi_array_limit(s8 *pwr, size_t pwr_len, s8 pwr_num,
if (!len)
break;
cur = be32_to_cpu(data[0]);
cur = data[0];
}
}
@ -346,19 +358,23 @@ s8 mt76_get_rate_power_limits(struct mt76_phy *phy,
{
struct mt76_dev *dev = phy->dev;
struct device_node *np;
const __be32 *val;
const s8 *val;
char name[16];
u32 mcs_rates = dev->drv->mcs_rates;
u32 ru_rates = ARRAY_SIZE(dest->ru[0]);
char band;
size_t len;
s8 max_power = 0;
s8 max_power_backoff = -127;
s8 txs_delta;
int n_chains = hweight16(phy->chainmask);
s8 target_power_combine = target_power + mt76_tx_power_path_delta(n_chains);
if (!mcs_rates)
mcs_rates = 10;
memset(dest, target_power, sizeof(*dest));
memset(dest, target_power, sizeof(*dest) - sizeof(dest->path));
memset(&dest->path, 0, sizeof(dest->path));
if (!IS_ENABLED(CONFIG_OF))
return target_power;
@ -392,24 +408,47 @@ s8 mt76_get_rate_power_limits(struct mt76_phy *phy,
txs_delta = mt76_get_txs_delta(np, hweight16(phy->chainmask));
val = mt76_get_of_array(np, "rates-cck", &len, ARRAY_SIZE(dest->cck));
val = mt76_get_of_array_s8(np, "rates-cck", &len, ARRAY_SIZE(dest->cck));
mt76_apply_array_limit(dest->cck, ARRAY_SIZE(dest->cck), val,
target_power, txs_delta, &max_power);
val = mt76_get_of_array(np, "rates-ofdm",
&len, ARRAY_SIZE(dest->ofdm));
val = mt76_get_of_array_s8(np, "rates-ofdm",
&len, ARRAY_SIZE(dest->ofdm));
mt76_apply_array_limit(dest->ofdm, ARRAY_SIZE(dest->ofdm), val,
target_power, txs_delta, &max_power);
val = mt76_get_of_array(np, "rates-mcs", &len, mcs_rates + 1);
val = mt76_get_of_array_s8(np, "rates-mcs", &len, mcs_rates + 1);
mt76_apply_multi_array_limit(dest->mcs[0], ARRAY_SIZE(dest->mcs[0]),
ARRAY_SIZE(dest->mcs), val, len,
target_power, txs_delta, &max_power);
target_power, txs_delta);
val = mt76_get_of_array(np, "rates-ru", &len, ru_rates + 1);
val = mt76_get_of_array_s8(np, "rates-ru", &len, ru_rates + 1);
mt76_apply_multi_array_limit(dest->ru[0], ARRAY_SIZE(dest->ru[0]),
ARRAY_SIZE(dest->ru), val, len,
target_power, txs_delta, &max_power);
target_power, txs_delta);
max_power_backoff = max_power;
val = mt76_get_of_array_s8(np, "paths-cck", &len, ARRAY_SIZE(dest->path.cck));
mt76_apply_array_limit(dest->path.cck, ARRAY_SIZE(dest->path.cck), val,
target_power_combine, txs_delta, &max_power_backoff);
val = mt76_get_of_array_s8(np, "paths-ofdm", &len, ARRAY_SIZE(dest->path.ofdm));
mt76_apply_array_limit(dest->path.ofdm, ARRAY_SIZE(dest->path.ofdm), val,
target_power_combine, txs_delta, &max_power_backoff);
val = mt76_get_of_array_s8(np, "paths-ofdm-bf", &len, ARRAY_SIZE(dest->path.ofdm_bf));
mt76_apply_array_limit(dest->path.ofdm_bf, ARRAY_SIZE(dest->path.ofdm_bf), val,
target_power_combine, txs_delta, &max_power_backoff);
val = mt76_get_of_array_s8(np, "paths-ru", &len, ARRAY_SIZE(dest->path.ru[0]) + 1);
mt76_apply_multi_array_limit(dest->path.ru[0], ARRAY_SIZE(dest->path.ru[0]),
ARRAY_SIZE(dest->path.ru), val, len,
target_power_combine, txs_delta);
val = mt76_get_of_array_s8(np, "paths-ru-bf", &len, ARRAY_SIZE(dest->path.ru_bf[0]) + 1);
mt76_apply_multi_array_limit(dest->path.ru_bf[0], ARRAY_SIZE(dest->path.ru_bf[0]),
ARRAY_SIZE(dest->path.ru_bf), val, len,
target_power_combine, txs_delta);
return max_power;
}

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/
@ -630,6 +630,8 @@ int mt76_create_page_pool(struct mt76_dev *dev, struct mt76_queue *q)
case MT_RXQ_MAIN:
case MT_RXQ_BAND1:
case MT_RXQ_BAND2:
case MT_RXQ_NPU0:
case MT_RXQ_NPU1:
pp_params.pool_size = 256;
break;
default:
@ -814,6 +816,7 @@ void mt76_free_device(struct mt76_dev *dev)
destroy_workqueue(dev->wq);
dev->wq = NULL;
}
mt76_npu_deinit(dev);
ieee80211_free_hw(dev->hw);
}
EXPORT_SYMBOL_GPL(mt76_free_device);
@ -847,8 +850,6 @@ void mt76_reset_device(struct mt76_dev *dev)
}
rcu_read_unlock();
mt76_abort_scan(dev);
INIT_LIST_HEAD(&dev->wcid_list);
INIT_LIST_HEAD(&dev->sta_poll_list);
dev->vif_mask = 0;
@ -1553,7 +1554,8 @@ void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
while ((skb = __skb_dequeue(&dev->rx_skb[q])) != NULL) {
mt76_check_sta(dev, skb);
if (mtk_wed_device_active(&dev->mmio.wed))
if (mtk_wed_device_active(&dev->mmio.wed) ||
mt76_npu_device_active(dev))
__skb_queue_tail(&frames, skb);
else
mt76_rx_aggr_reorder(skb, &frames);

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2019 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/
@ -33,13 +33,21 @@ static u32 mt76_mmio_rmw(struct mt76_dev *dev, u32 offset, u32 mask, u32 val)
static void mt76_mmio_write_copy(struct mt76_dev *dev, u32 offset,
const void *data, int len)
{
__iowrite32_copy(dev->mmio.regs + offset, data, DIV_ROUND_UP(len, 4));
int i;
for (i = 0; i < ALIGN(len, 4); i += 4)
writel(get_unaligned_le32(data + i),
dev->mmio.regs + offset + i);
}
static void mt76_mmio_read_copy(struct mt76_dev *dev, u32 offset,
void *data, int len)
{
__ioread32_copy(data, dev->mmio.regs + offset, DIV_ROUND_UP(len, 4));
int i;
for (i = 0; i < ALIGN(len, 4); i += 4)
put_unaligned_le32(readl(dev->mmio.regs + offset + i),
data + i);
}
static int mt76_mmio_wr_rp(struct mt76_dev *dev, u32 base,

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/
@ -13,6 +13,7 @@
#include <linux/leds.h>
#include <linux/usb.h>
#include <linux/average.h>
#include <linux/soc/airoha/airoha_offload.h>
#include <linux/soc/mediatek/mtk_wed.h>
#include <net/mac80211.h>
#include <net/page_pool/helpers.h>
@ -34,6 +35,7 @@
#define MT_QFLAG_WED_RRO BIT(6)
#define MT_QFLAG_WED_RRO_EN BIT(7)
#define MT_QFLAG_EMI_EN BIT(8)
#define MT_QFLAG_NPU BIT(9)
#define __MT_WED_Q(_type, _n) (MT_QFLAG_WED | \
FIELD_PREP(MT_QFLAG_WED_TYPE, _type) | \
@ -48,6 +50,12 @@
#define MT_WED_RRO_Q_IND __MT_WED_RRO_Q(MT76_WED_RRO_Q_IND, 0)
#define MT_WED_RRO_Q_RXDMAD_C __MT_WED_RRO_Q(MT76_WED_RRO_Q_RXDMAD_C, 0)
#define __MT_NPU_Q(_type, _n) (MT_QFLAG_NPU | \
FIELD_PREP(MT_QFLAG_WED_TYPE, _type) | \
FIELD_PREP(MT_QFLAG_WED_RING, _n))
#define MT_NPU_Q_TX(_n) __MT_NPU_Q(MT76_WED_Q_TX, _n)
#define MT_NPU_Q_RX(_n) __MT_NPU_Q(MT76_WED_Q_RX, _n)
struct mt76_dev;
struct mt76_phy;
struct mt76_wcid;
@ -139,6 +147,8 @@ enum mt76_rxq_id {
MT_RXQ_TXFREE_BAND2,
MT_RXQ_RRO_IND,
MT_RXQ_RRO_RXDMAD_C,
MT_RXQ_NPU0,
MT_RXQ_NPU1,
__MT_RXQ_MAX
};
@ -247,6 +257,7 @@ struct mt76_queue {
__le16 *emi_cpu_idx;
struct mtk_wed_device *wed;
struct mt76_dev *dev;
u32 wed_regs;
dma_addr_t desc_dma;
@ -706,6 +717,11 @@ struct mt76_mmio {
struct mtk_wed_device wed_hif2;
struct completion wed_reset;
struct completion wed_reset_complete;
struct airoha_ppe_dev __rcu *ppe_dev;
struct airoha_npu __rcu *npu;
phys_addr_t phy_addr;
int npu_type;
};
struct mt76_rx_status {
@ -943,6 +959,7 @@ struct mt76_dev {
struct idr token;
u16 wed_token_count;
u16 token_count;
u16 token_start;
u16 token_size;
spinlock_t rx_token_lock;
@ -1113,6 +1130,14 @@ struct mt76_power_limits {
s8 mcs[4][10];
s8 ru[7][12];
s8 eht[16][16];
struct {
s8 cck[4];
s8 ofdm[4];
s8 ofdm_bf[4];
s8 ru[7][10];
s8 ru_bf[7][10];
} path;
};
struct mt76_ethtool_worker_info {
@ -1252,6 +1277,15 @@ static inline int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q,
#define mt76_dereference(p, dev) \
rcu_dereference_protected(p, lockdep_is_held(&(dev)->mutex))
static inline struct mt76_dev *mt76_wed_to_dev(struct mtk_wed_device *wed)
{
#ifdef CONFIG_NET_MEDIATEK_SOC_WED
if (wed->wlan.hif2)
return container_of(wed, struct mt76_dev, mmio.wed_hif2);
#endif /* CONFIG_NET_MEDIATEK_SOC_WED */
return container_of(wed, struct mt76_dev, mmio.wed);
}
static inline struct mt76_wcid *
__mt76_wcid_ptr(struct mt76_dev *dev, u16 idx)
{
@ -1598,6 +1632,109 @@ int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *skb,
int mt76_testmode_set_state(struct mt76_phy *phy, enum mt76_testmode_state state);
int mt76_testmode_alloc_skb(struct mt76_phy *phy, u32 len);
#ifdef CONFIG_MT76_NPU
void mt76_npu_check_ppe(struct mt76_dev *dev, struct sk_buff *skb,
u32 info);
int mt76_npu_dma_add_buf(struct mt76_phy *phy, struct mt76_queue *q,
struct sk_buff *skb, struct mt76_queue_buf *buf,
void *txwi_ptr);
int mt76_npu_rx_queue_init(struct mt76_dev *dev, struct mt76_queue *q);
int mt76_npu_fill_rx_queue(struct mt76_dev *dev, struct mt76_queue *q);
void mt76_npu_queue_cleanup(struct mt76_dev *dev, struct mt76_queue *q);
void mt76_npu_disable_irqs(struct mt76_dev *dev);
int mt76_npu_init(struct mt76_dev *dev, phys_addr_t phy_addr, int type);
void mt76_npu_deinit(struct mt76_dev *dev);
void mt76_npu_queue_setup(struct mt76_dev *dev, struct mt76_queue *q);
void mt76_npu_txdesc_cleanup(struct mt76_queue *q, int index);
int mt76_npu_net_setup_tc(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct net_device *dev, enum tc_setup_type type,
void *type_data);
#else
static inline void mt76_npu_check_ppe(struct mt76_dev *dev,
struct sk_buff *skb, u32 info)
{
}
static inline int mt76_npu_dma_add_buf(struct mt76_phy *phy,
struct mt76_queue *q,
struct sk_buff *skb,
struct mt76_queue_buf *buf,
void *txwi_ptr)
{
return -EOPNOTSUPP;
}
static inline int mt76_npu_fill_rx_queue(struct mt76_dev *dev,
struct mt76_queue *q)
{
return 0;
}
static inline void mt76_npu_queue_cleanup(struct mt76_dev *dev,
struct mt76_queue *q)
{
}
static inline void mt76_npu_disable_irqs(struct mt76_dev *dev)
{
}
static inline int mt76_npu_init(struct mt76_dev *dev, phys_addr_t phy_addr,
int type)
{
return 0;
}
static inline void mt76_npu_deinit(struct mt76_dev *dev)
{
}
static inline void mt76_npu_queue_setup(struct mt76_dev *dev,
struct mt76_queue *q)
{
}
static inline void mt76_npu_txdesc_cleanup(struct mt76_queue *q,
int index)
{
}
static inline int mt76_npu_net_setup_tc(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
struct net_device *dev,
enum tc_setup_type type,
void *type_data)
{
return -EOPNOTSUPP;
}
#endif /* CONFIG_MT76_NPU */
static inline bool mt76_npu_device_active(struct mt76_dev *dev)
{
return !!rcu_access_pointer(dev->mmio.npu);
}
static inline bool mt76_ppe_device_active(struct mt76_dev *dev)
{
return !!rcu_access_pointer(dev->mmio.ppe_dev);
}
static inline int mt76_npu_send_msg(struct airoha_npu *npu, int ifindex,
enum airoha_npu_wlan_set_cmd cmd,
u32 val, gfp_t gfp)
{
return airoha_npu_wlan_send_msg(npu, ifindex, cmd, &val, sizeof(val),
gfp);
}
static inline int mt76_npu_get_msg(struct airoha_npu *npu, int ifindex,
enum airoha_npu_wlan_get_cmd cmd,
u32 *val, gfp_t gfp)
{
return airoha_npu_wlan_get_msg(npu, ifindex, cmd, val, sizeof(*val),
gfp);
}
static inline void mt76_testmode_reset(struct mt76_phy *phy, bool disable)
{
#ifdef CONFIG_NL80211_TESTMODE
@ -1839,6 +1976,23 @@ static inline bool mt76_queue_is_emi(struct mt76_queue *q)
return q->flags & MT_QFLAG_EMI_EN;
}
static inline bool mt76_queue_is_npu(struct mt76_queue *q)
{
return q->flags & MT_QFLAG_NPU;
}
static inline bool mt76_queue_is_npu_tx(struct mt76_queue *q)
{
return mt76_queue_is_npu(q) &&
FIELD_GET(MT_QFLAG_WED_TYPE, q->flags) == MT76_WED_Q_TX;
}
static inline bool mt76_queue_is_npu_rx(struct mt76_queue *q)
{
return mt76_queue_is_npu(q) &&
FIELD_GET(MT_QFLAG_WED_TYPE, q->flags) == MT76_WED_Q_RX;
}
struct mt76_txwi_cache *
mt76_token_release(struct mt76_dev *dev, int token, bool *wake);
int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi);
@ -1860,7 +2014,8 @@ mt76_get_page_pool_buf(struct mt76_queue *q, u32 *offset, u32 size)
{
struct page *page;
page = page_pool_dev_alloc_frag(q->page_pool, offset, size);
page = page_pool_alloc_frag(q->page_pool, offset, size,
GFP_ATOMIC | __GFP_NOWARN | GFP_DMA32);
if (!page)
return NULL;

View File

@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
# SPDX-License-Identifier: BSD-3-Clause-Clear
config MT7603E
tristate "MediaTek MT7603E (PCIe) and MT76x8 WLAN support"
select MT76_CORE

View File

@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
# SPDX-License-Identifier: BSD-3-Clause-Clear
obj-$(CONFIG_MT7603E) += mt7603e.o
mt7603e-y := \

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include "mt7603.h"

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include "mt7603.h"
#include "../trace.h"

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include "mt7603.h"

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include "mt7603.h"
#include "mac.h"

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include <linux/of.h>
#include "mt7603.h"

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
#ifndef __MT7603_EEPROM_H
#define __MT7603_EEPROM_H

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include <linux/etherdevice.h>
#include "mt7603.h"

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include <linux/etherdevice.h>
#include <linux/timekeeping.h>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
#ifndef __MT7603_MAC_H
#define __MT7603_MAC_H

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include <linux/etherdevice.h>
#include <linux/platform_device.h>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include <linux/firmware.h>
#include "mt7603.h"

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
#ifndef __MT7603_MCU_H
#define __MT7603_MCU_H

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
#ifndef __MT7603_H
#define __MT7603_H

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include <linux/kernel.h>
#include <linux/module.h>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
#ifndef __MT7603_REGS_H
#define __MT7603_REGS_H

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include <linux/kernel.h>
#include <linux/module.h>

View File

@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
# SPDX-License-Identifier: BSD-3-Clause-Clear
config MT7615_COMMON
tristate

View File

@ -1,4 +1,4 @@
# SPDX-License-Identifier: ISC
# SPDX-License-Identifier: BSD-3-Clause-Clear
obj-$(CONFIG_MT7615_COMMON) += mt7615-common.o
obj-$(CONFIG_MT7615E) += mt7615e.o

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
#include "mt7615.h"

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2019 MediaTek Inc.
*
* Author: Ryder Lee <ryder.lee@mediatek.com>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2019 MediaTek Inc.
*
* Author: Ryder Lee <ryder.lee@mediatek.com>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/* Copyright (C) 2019 MediaTek Inc. */
#ifndef __MT7615_EEPROM_H

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2019 MediaTek Inc.
*
* Author: Roy Luo <royluo@google.com>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2019 MediaTek Inc.
*
* Author: Ryder Lee <ryder.lee@mediatek.com>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/* Copyright (C) 2019 MediaTek Inc. */
#ifndef __MT7615_MAC_H

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2019 MediaTek Inc.
*
* Author: Roy Luo <royluo@google.com>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2019 MediaTek Inc.
*
* Author: Roy Luo <royluo@google.com>
@ -874,8 +874,10 @@ mt7615_mcu_wtbl_sta_add(struct mt7615_phy *phy, struct ieee80211_vif *vif,
wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
WTBL_RESET_AND_SET, NULL,
&wskb);
if (IS_ERR(wtbl_hdr))
if (IS_ERR(wtbl_hdr)) {
dev_kfree_skb(sskb);
return PTR_ERR(wtbl_hdr);
}
if (enable) {
mt76_connac_mcu_wtbl_generic_tlv(&dev->mt76, wskb, vif, sta,

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/* Copyright (C) 2019 MediaTek Inc. */
#ifndef __MT7615_MCU_H

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2020 MediaTek Inc. */
#include <linux/kernel.h>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/* Copyright (C) 2019 MediaTek Inc. */
#ifndef __MT7615_H

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2019 Lorenzo Bianconi <lorenzo@kernel.org>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2019 MediaTek Inc.
*
* Author: Ryder Lee <ryder.lee@mediatek.com>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2019 MediaTek Inc.
*
* Author: Roy Luo <royluo@google.com>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2020 MediaTek Inc.
*
* Author: Ryder Lee <ryder.lee@mediatek.com>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/* Copyright (C) 2019 MediaTek Inc. */
#ifndef __MT7615_REGS_H

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2020 MediaTek Inc.
*
* Author: Felix Fietkau <nbd@nbd.name>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2019 MediaTek Inc.
*
* Author: Ryder Lee <ryder.lee@mediatek.com>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2020 Felix Fietkau <nbd@nbd.name> */
#include "mt7615.h"

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2019 Lorenzo Bianconi <lorenzo@kernel.org>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2019 MediaTek Inc.
*
* Author: Felix Fietkau <nbd@nbd.name>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2020 MediaTek Inc.
*
* Author: Lorenzo Bianconi <lorenzo@kernel.org>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/* Copyright (C) 2020 MediaTek Inc. */
#ifndef __MT76_CONNAC_H

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/* Copyright (C) 2022 MediaTek Inc. */
#ifndef __MT76_CONNAC2_MAC_H

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2023 MediaTek Inc. */
#include "mt76_connac.h"

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/* Copyright (C) 2023 MediaTek Inc. */
#ifndef __MT76_CONNAC3_MAC_H

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2020 MediaTek Inc. */
#include "mt76_connac.h"
@ -297,16 +297,18 @@ u16 mt76_connac2_mac_tx_rate_val(struct mt76_phy *mphy,
struct ieee80211_bss_conf *conf,
bool beacon, bool mcast)
{
struct mt76_vif_link *mvif = mt76_vif_conf_link(mphy->dev, conf->vif, conf);
struct cfg80211_chan_def *chandef = mvif->ctx ?
&mvif->ctx->def : &mphy->chandef;
u8 nss = 0, mode = 0, band = chandef->chan->band;
int rateidx = 0, mcast_rate;
int offset = 0;
u8 nss = 0, mode = 0, band = NL80211_BAND_2GHZ;
int rateidx = 0, offset = 0, mcast_rate;
struct cfg80211_chan_def *chandef;
struct mt76_vif_link *mvif;
if (!conf)
goto legacy;
mvif = mt76_vif_conf_link(mphy->dev, conf->vif, conf);
chandef = mvif->ctx ? &mvif->ctx->def : &mphy->chandef;
band = chandef->chan->band;
if (is_mt7921(mphy->dev)) {
rateidx = ffs(conf->basic_rates) - 1;
goto legacy;
@ -584,8 +586,9 @@ void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bool multicast = ieee80211_is_data(hdr->frame_control) &&
is_multicast_ether_addr(hdr->addr1);
u16 rate = mt76_connac2_mac_tx_rate_val(mphy, &vif->bss_conf, beacon,
multicast);
u16 rate = mt76_connac2_mac_tx_rate_val(mphy,
vif ? &vif->bss_conf : NULL,
beacon, multicast);
u32 val = MT_TXD6_FIXED_BW;
/* hardware won't add HTC for mgmt/ctrl frame */

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/* Copyright (C) 2020 MediaTek Inc. */
#include <linux/firmware.h>
@ -1974,7 +1974,7 @@ int mt76_connac_mcu_chip_config(struct mt76_dev *dev)
.resp_type = 0,
};
memcpy(req.data, "assert", 7);
strscpy(req.data, "assert");
return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG),
&req, sizeof(req), false);
@ -3101,6 +3101,7 @@ int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name)
int i, ret, sem, max_len = mt76_is_sdio(dev) ? 2048 : 4096;
const struct mt76_connac2_patch_hdr *hdr;
const struct firmware *fw = NULL;
char build_date[17];
sem = mt76_connac_mcu_patch_sem_ctrl(dev, true);
switch (sem) {
@ -3124,8 +3125,11 @@ int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name)
}
hdr = (const void *)fw->data;
strscpy(build_date, hdr->build_date, sizeof(build_date));
build_date[16] = '\0';
strim(build_date);
dev_info(dev->dev, "HW/SW Version: 0x%x, Build Time: %.16s\n",
be32_to_cpu(hdr->hw_sw_ver), hdr->build_date);
be32_to_cpu(hdr->hw_sw_ver), build_date);
for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) {
struct mt76_connac2_patch_sec *sec;

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/* Copyright (C) 2020 MediaTek Inc. */
#ifndef __MT76_CONNAC_MCU_H
@ -1062,6 +1062,7 @@ enum {
MCU_UNI_EVENT_ROC = 0x27,
MCU_UNI_EVENT_TX_DONE = 0x2d,
MCU_UNI_EVENT_THERMAL = 0x35,
MCU_UNI_EVENT_RSSI_MONITOR = 0x41,
MCU_UNI_EVENT_NIC_CAPAB = 0x43,
MCU_UNI_EVENT_WED_RRO = 0x57,
MCU_UNI_EVENT_PER_STA_INFO = 0x6d,
@ -1300,6 +1301,7 @@ enum {
MCU_UNI_CMD_THERMAL = 0x35,
MCU_UNI_CMD_VOW = 0x37,
MCU_UNI_CMD_FIXED_RATE_TABLE = 0x40,
MCU_UNI_CMD_RSSI_MONITOR = 0x41,
MCU_UNI_CMD_TESTMODE_CTRL = 0x46,
MCU_UNI_CMD_RRO = 0x57,
MCU_UNI_CMD_OFFCH_SCAN_CTRL = 0x58,

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>

View File

@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
# SPDX-License-Identifier: BSD-3-Clause-Clear
config MT76x2_COMMON
tristate
select MT76x02_LIB

View File

@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
# SPDX-License-Identifier: BSD-3-Clause-Clear
obj-$(CONFIG_MT76x2_COMMON) += mt76x2-common.o
obj-$(CONFIG_MT76x2E) += mt76x2e.o
obj-$(CONFIG_MT76x2U) += mt76x2u.o

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: ISC
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/

View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: ISC */
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*/

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