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pmdomain providers: 

- imx: Prevent hang at power down for imx8mp-blk-ctrl
 
 firmware:
  - thead: Fix buffer overflow for TH1520 AON driver
 
 MAINTAINERS, mailmap:
  - Change Ulf Hansson's email
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Merge tag 'pmdomain-v7.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

Pull pmdomain fixes from Ulf Hansson:

 - imx: Prevent hang at power down for imx8mp-blk-ctrl

 - thead: Fix buffer overflow for TH1520 AON driver

 - Change Ulf Hansson's email

* tag 'pmdomain-v7.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm:
  MAINTAINERS, mailmap: Change Ulf Hansson's email
  pmdomain: imx8mp-blk-ctrl: Keep the NOC_HDCP clock enabled
  firmware: thead: Fix buffer overflow and use standard endian macros
master
Linus Torvalds 2026-04-09 11:09:12 -07:00
parent 3ffcd57823 c2812c0cb9
commit d58305b2db
5 changed files with 13 additions and 92 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
.mailmap
View File

@ -849,6 +849,8 @@ Tvrtko Ursulin <tursulin@ursulin.net> <tvrtko.ursulin@onelan.co.uk>
Tvrtko Ursulin <tursulin@ursulin.net> <tvrtko@ursulin.net>
Tycho Andersen <tycho@tycho.pizza> <tycho@tycho.ws>
Tzung-Bi Shih <tzungbi@kernel.org> <tzungbi@google.com>
Ulf Hansson <ulfh@kernel.org> <ulf.hansson@linaro.org>
Ulf Hansson <ulfh@kernel.org> <ulf.hansson@stericsson.com>
Umang Jain <uajain@igalia.com> <umang.jain@ideasonboard.com>
Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Uwe Kleine-König <u.kleine-koenig@baylibre.com> <ukleinek@baylibre.com>

14
MAINTAINERS
View File

@ -6717,7 +6717,7 @@ F: include/linux/platform_data/cpuidle-exynos.h
CPUIDLE DRIVER - ARM PSCI
M: Lorenzo Pieralisi <lpieralisi@kernel.org>
M: Sudeep Holla <sudeep.holla@kernel.org>
M: Ulf Hansson <ulf.hansson@linaro.org>
M: Ulf Hansson <ulfh@kernel.org>
L: linux-pm@vger.kernel.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported
@ -6725,7 +6725,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm.git
F: drivers/cpuidle/cpuidle-psci.c
CPUIDLE DRIVER - ARM PSCI PM DOMAIN
M: Ulf Hansson <ulf.hansson@linaro.org>
M: Ulf Hansson <ulfh@kernel.org>
L: linux-pm@vger.kernel.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported
@ -6734,7 +6734,7 @@ F: drivers/cpuidle/cpuidle-psci-domain.c
F: drivers/cpuidle/cpuidle-psci.h
CPUIDLE DRIVER - DT IDLE PM DOMAIN
M: Ulf Hansson <ulf.hansson@linaro.org>
M: Ulf Hansson <ulfh@kernel.org>
L: linux-pm@vger.kernel.org
S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm.git
@ -10730,7 +10730,7 @@ F: Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml
F: drivers/i2c/muxes/i2c-demux-pinctrl.c
GENERIC PM DOMAINS
M: Ulf Hansson <ulf.hansson@linaro.org>
M: Ulf Hansson <ulfh@kernel.org>
L: linux-pm@vger.kernel.org
S: Supported
F: Documentation/devicetree/bindings/power/power?domain*
@ -18090,7 +18090,7 @@ F: drivers/mmc/host/mmc_spi.c
F: include/linux/spi/mmc_spi.h
MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND SDIO SUBSYSTEM
M: Ulf Hansson <ulf.hansson@linaro.org>
M: Ulf Hansson <ulfh@kernel.org>
L: linux-mmc@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git
@ -24696,7 +24696,7 @@ F: drivers/media/i2c/imx415.c
SONY MEMORYSTICK SUBSYSTEM
M: Maxim Levitsky <maximlevitsky@gmail.com>
M: Alex Dubov <oakad@yahoo.com>
M: Ulf Hansson <ulf.hansson@linaro.org>
M: Ulf Hansson <ulfh@kernel.org>
L: linux-mmc@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git
@ -27615,7 +27615,7 @@ F: Documentation/fb/uvesafb.rst
F: drivers/video/fbdev/uvesafb.*
Ux500 CLOCK DRIVERS
M: Ulf Hansson <ulf.hansson@linaro.org>
M: Ulf Hansson <ulfh@kernel.org>
L: linux-clk@vger.kernel.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained

7
drivers/firmware/thead,th1520-aon.c
View File

@ -170,10 +170,9 @@ int th1520_aon_power_update(struct th1520_aon_chan *aon_chan, u16 rsrc,
hdr->func = TH1520_AON_PM_FUNC_SET_RESOURCE_POWER_MODE;
hdr->size = TH1520_AON_RPC_MSG_NUM;
RPC_SET_BE16(&msg.resource, 0, rsrc);
RPC_SET_BE16(&msg.resource, 2,
(power_on ? TH1520_AON_PM_PW_MODE_ON :
TH1520_AON_PM_PW_MODE_OFF));
msg.resource = cpu_to_be16(rsrc);
msg.mode = cpu_to_be16(power_on ? TH1520_AON_PM_PW_MODE_ON :
TH1520_AON_PM_PW_MODE_OFF);
ret = th1520_aon_call_rpc(aon_chan, &msg);
if (ret)

8
drivers/pmdomain/imx/imx8mp-blk-ctrl.c
View File

@ -352,9 +352,6 @@ static void imx8mp_hdmi_blk_ctrl_power_on(struct imx8mp_blk_ctrl *bc,
regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(12));
regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3));
break;
case IMX8MP_HDMIBLK_PD_HDCP:
regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11));
break;
case IMX8MP_HDMIBLK_PD_HRV:
regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5));
regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(15));
@ -408,9 +405,6 @@ static void imx8mp_hdmi_blk_ctrl_power_off(struct imx8mp_blk_ctrl *bc,
regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(7));
regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22) | BIT(24));
break;
case IMX8MP_HDMIBLK_PD_HDCP:
regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11));
break;
case IMX8MP_HDMIBLK_PD_HRV:
regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(15));
regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5));
@ -439,7 +433,7 @@ static int imx8mp_hdmi_power_notifier(struct notifier_block *nb,
regmap_write(bc->regmap, HDMI_RTX_CLK_CTL0, 0x0);
regmap_write(bc->regmap, HDMI_RTX_CLK_CTL1, 0x0);
regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
BIT(0) | BIT(1) | BIT(10));
BIT(0) | BIT(1) | BIT(10) | BIT(11));
regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(0));
/*

74
include/linux/firmware/thead/thead,th1520-aon.h
View File

@ -97,80 +97,6 @@ struct th1520_aon_rpc_ack_common {
#define RPC_GET_SVC_FLAG_ACK_TYPE(MESG) (((MESG)->svc & 0x40) >> 6)
#define RPC_SET_SVC_FLAG_ACK_TYPE(MESG, ACK) ((MESG)->svc |= (ACK) << 6)
#define RPC_SET_BE64(MESG, OFFSET, SET_DATA) \
do { \
u8 *data = (u8 *)(MESG); \
u64 _offset = (OFFSET); \
u64 _set_data = (SET_DATA); \
data[_offset + 7] = _set_data & 0xFF; \
data[_offset + 6] = (_set_data & 0xFF00) >> 8; \
data[_offset + 5] = (_set_data & 0xFF0000) >> 16; \
data[_offset + 4] = (_set_data & 0xFF000000) >> 24; \
data[_offset + 3] = (_set_data & 0xFF00000000) >> 32; \
data[_offset + 2] = (_set_data & 0xFF0000000000) >> 40; \
data[_offset + 1] = (_set_data & 0xFF000000000000) >> 48; \
data[_offset + 0] = (_set_data & 0xFF00000000000000) >> 56; \
} while (0)
#define RPC_SET_BE32(MESG, OFFSET, SET_DATA) \
do { \
u8 *data = (u8 *)(MESG); \
u64 _offset = (OFFSET); \
u64 _set_data = (SET_DATA); \
data[_offset + 3] = (_set_data) & 0xFF; \
data[_offset + 2] = (_set_data & 0xFF00) >> 8; \
data[_offset + 1] = (_set_data & 0xFF0000) >> 16; \
data[_offset + 0] = (_set_data & 0xFF000000) >> 24; \
} while (0)
#define RPC_SET_BE16(MESG, OFFSET, SET_DATA) \
do { \
u8 *data = (u8 *)(MESG); \
u64 _offset = (OFFSET); \
u64 _set_data = (SET_DATA); \
data[_offset + 1] = (_set_data) & 0xFF; \
data[_offset + 0] = (_set_data & 0xFF00) >> 8; \
} while (0)
#define RPC_SET_U8(MESG, OFFSET, SET_DATA) \
do { \
u8 *data = (u8 *)(MESG); \
data[OFFSET] = (SET_DATA) & 0xFF; \
} while (0)
#define RPC_GET_BE64(MESG, OFFSET, PTR) \
do { \
u8 *data = (u8 *)(MESG); \
u64 _offset = (OFFSET); \
*(u32 *)(PTR) = \
(data[_offset + 7] | data[_offset + 6] << 8 | \
data[_offset + 5] << 16 | data[_offset + 4] << 24 | \
data[_offset + 3] << 32 | data[_offset + 2] << 40 | \
data[_offset + 1] << 48 | data[_offset + 0] << 56); \
} while (0)
#define RPC_GET_BE32(MESG, OFFSET, PTR) \
do { \
u8 *data = (u8 *)(MESG); \
u64 _offset = (OFFSET); \
*(u32 *)(PTR) = \
(data[_offset + 3] | data[_offset + 2] << 8 | \
data[_offset + 1] << 16 | data[_offset + 0] << 24); \
} while (0)
#define RPC_GET_BE16(MESG, OFFSET, PTR) \
do { \
u8 *data = (u8 *)(MESG); \
u64 _offset = (OFFSET); \
*(u16 *)(PTR) = (data[_offset + 1] | data[_offset + 0] << 8); \
} while (0)
#define RPC_GET_U8(MESG, OFFSET, PTR) \
do { \
u8 *data = (u8 *)(MESG); \
*(u8 *)(PTR) = (data[OFFSET]); \
} while (0)
/*
* Defines for SC PM Power Mode
*/