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ARM: dts: renesas: r7s72100: Add DMAC node 

Add a device node for the Direct Memory Access Controller on the RZ/A1H
SoC.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241015224801.2535-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
pull/1083/head
Wolfram Sang 2024-10-16 00:48:02 +02:00 committed by Geert Uytterhoeven
parent 9cc926e3fa
commit d823e397f3
1 changed files with 31 additions and 0 deletions
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31
arch/arm/boot/dts/renesas/r7s72100.dtsi
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@ -368,6 +368,37 @@
status = "disabled";
};
dmac: dma-controller@e8200000 {
compatible = "renesas,r7s72100-dmac",
"renesas,rz-dmac";
reg = <0xe8200000 0x1000>,
<0xfcfe1000 0x20>;
interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 9 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 10 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 11 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 12 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 13 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 14 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 15 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 16 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 17 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 18 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 23 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 24 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15";
#dma-cells = <1>;
dma-channels = <16>;
};
gic: interrupt-controller@e8201000 {
compatible = "arm,pl390";
#interrupt-cells = <3>;