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ASoC/SoundWire: Intel: lnl: enable interrupts after first power-up/before last power-down 

The HDaudio mlink support makes it more logical to couple interrupt
enabling/disabling with power-up/down sequences.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Liam Girdwood <liam.r.girdwood@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Link: https://patch.msgid.link/20241007121241.30914-3-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
pull/1083/head
Pierre-Louis Bossart 2024-10-07 20:12:41 +08:00 committed by Mark Brown
parent eac79786c7
commit e0941775e6
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
4 changed files with 7 additions and 17 deletions
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7
drivers/soundwire/intel_ace2x.c
View File

@ -175,6 +175,9 @@ static int intel_link_power_up(struct sdw_intel *sdw)
__func__, ret); __func__, ret);
goto out; goto out;
} }
hdac_bus_eml_enable_interrupt_unlocked(sdw->link_res->hbus, true,
AZX_REG_ML_LEPTR_ID_SDW, true);
} }
*shim_mask |= BIT(link_id); *shim_mask |= BIT(link_id);
@ -201,6 +204,10 @@ static int intel_link_power_down(struct sdw_intel *sdw)
*shim_mask &= ~BIT(link_id); *shim_mask &= ~BIT(link_id);
if (!*shim_mask)
hdac_bus_eml_enable_interrupt_unlocked(sdw->link_res->hbus, true,
AZX_REG_ML_LEPTR_ID_SDW, false);
ret = hdac_bus_eml_sdw_power_down_unlocked(sdw->link_res->hbus, link_id); ret = hdac_bus_eml_sdw_power_down_unlocked(sdw->link_res->hbus, link_id);
if (ret < 0) { if (ret < 0) {
dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_power_down failed: %d\n", dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_power_down failed: %d\n",

5
sound/soc/sof/intel/hda-dsp.c
View File

@ -858,7 +858,6 @@ skip_dsp:
static int hda_resume(struct snd_sof_dev *sdev, bool runtime_resume) static int hda_resume(struct snd_sof_dev *sdev, bool runtime_resume)
{ {
const struct sof_intel_dsp_desc *chip;
int ret; int ret;
/* display codec must be powered before link reset */ /* display codec must be powered before link reset */
@ -891,10 +890,6 @@ static int hda_resume(struct snd_sof_dev *sdev, bool runtime_resume)
hda_dsp_ctrl_ppcap_int_enable(sdev, true); hda_dsp_ctrl_ppcap_int_enable(sdev, true);
} }
chip = get_chip_info(sdev->pdata);
if (chip && chip->hw_ip_version >= SOF_INTEL_ACE_2_0)
hda_sdw_int_enable(sdev, true);
cleanup: cleanup:
/* display codec can powered off after controller init */ /* display codec can powered off after controller init */
hda_codec_i915_display_power(sdev, false); hda_codec_i915_display_power(sdev, false);

2
sound/soc/sof/intel/hda.c
View File

@ -866,8 +866,6 @@ skip_dsp_setup:
dev_err(sdev->dev, "could not startup SoundWire links\n"); dev_err(sdev->dev, "could not startup SoundWire links\n");
goto disable_pp_cap; goto disable_pp_cap;
} }
hda_sdw_int_enable(sdev, true);
} }
init_waitqueue_head(&hdev->waitq); init_waitqueue_head(&hdev->waitq);

10
sound/soc/sof/intel/lnl.c
View File

@ -192,16 +192,8 @@ static bool lnl_dsp_check_sdw_irq(struct snd_sof_dev *sdev)
return hdac_bus_eml_check_interrupt(bus, true, AZX_REG_ML_LEPTR_ID_SDW); return hdac_bus_eml_check_interrupt(bus, true, AZX_REG_ML_LEPTR_ID_SDW);
} }
static void lnl_enable_sdw_irq(struct snd_sof_dev *sdev, bool enable)
{
struct hdac_bus *bus = sof_to_bus(sdev);
hdac_bus_eml_enable_interrupt(bus, true, AZX_REG_ML_LEPTR_ID_SDW, enable);
}
static int lnl_dsp_disable_interrupts(struct snd_sof_dev *sdev) static int lnl_dsp_disable_interrupts(struct snd_sof_dev *sdev)
{ {
lnl_enable_sdw_irq(sdev, false);
mtl_disable_ipc_interrupts(sdev); mtl_disable_ipc_interrupts(sdev);
return mtl_enable_interrupts(sdev, false); return mtl_enable_interrupts(sdev, false);
} }
@ -237,7 +229,6 @@ const struct sof_intel_dsp_desc lnl_chip_info = {
.ssp_count = MTL_SSP_COUNT, .ssp_count = MTL_SSP_COUNT,
.d0i3_offset = MTL_HDA_VS_D0I3C, .d0i3_offset = MTL_HDA_VS_D0I3C,
.read_sdw_lcount = hda_sdw_check_lcount_ext, .read_sdw_lcount = hda_sdw_check_lcount_ext,
.enable_sdw_irq = lnl_enable_sdw_irq,
.check_sdw_irq = lnl_dsp_check_sdw_irq, .check_sdw_irq = lnl_dsp_check_sdw_irq,
.check_sdw_wakeen_irq = lnl_sdw_check_wakeen_irq, .check_sdw_wakeen_irq = lnl_sdw_check_wakeen_irq,
.sdw_process_wakeen = hda_sdw_process_wakeen_common, .sdw_process_wakeen = hda_sdw_process_wakeen_common,
@ -262,7 +253,6 @@ const struct sof_intel_dsp_desc ptl_chip_info = {
.ssp_count = MTL_SSP_COUNT, .ssp_count = MTL_SSP_COUNT,
.d0i3_offset = MTL_HDA_VS_D0I3C, .d0i3_offset = MTL_HDA_VS_D0I3C,
.read_sdw_lcount = hda_sdw_check_lcount_ext, .read_sdw_lcount = hda_sdw_check_lcount_ext,
.enable_sdw_irq = lnl_enable_sdw_irq,
.check_sdw_irq = lnl_dsp_check_sdw_irq, .check_sdw_irq = lnl_dsp_check_sdw_irq,
.check_sdw_wakeen_irq = lnl_sdw_check_wakeen_irq, .check_sdw_wakeen_irq = lnl_sdw_check_wakeen_irq,
.check_ipc_irq = mtl_dsp_check_ipc_irq, .check_ipc_irq = mtl_dsp_check_ipc_irq,