dma-engine: sun4i: Add has_reset option to quirk

Allwinner suniv F1C100s has a reset bit for DMA in CCU. Sun4i do not
has this bit but in order to support suniv we need to add it. So add
support for reset bit.

Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
[ csokas.bence: Rebased and addressed comments ]
Signed-off-by: Csókás Bence <csokas.bence@prolan.hu>
Link: https://lore.kernel.org/r/20241122161128.2619172-3-csokas.bence@prolan.hu
Signed-off-by: Vinod Koul <vkoul@kernel.org>
pull/1136/head
Mesih Kilinc 2024-11-22 17:11:29 +01:00 committed by Vinod Koul
parent a2186c2cd3
commit e17ca0effa
1 changed files with 11 additions and 0 deletions

View File

@ -15,6 +15,7 @@
#include <linux/of_dma.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/reset.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
@ -159,6 +160,7 @@ struct sun4i_dma_config {
u8 ddma_drq_sdram;
u8 max_burst;
bool has_reset;
};
struct sun4i_dma_pchan {
@ -208,6 +210,7 @@ struct sun4i_dma_dev {
int irq;
spinlock_t lock;
const struct sun4i_dma_config *cfg;
struct reset_control *rst;
};
static struct sun4i_dma_dev *to_sun4i_dma_dev(struct dma_device *dev)
@ -1215,6 +1218,13 @@ static int sun4i_dma_probe(struct platform_device *pdev)
return PTR_ERR(priv->clk);
}
if (priv->cfg->has_reset) {
priv->rst = devm_reset_control_get_exclusive_deasserted(&pdev->dev, NULL);
if (IS_ERR(priv->rst))
return dev_err_probe(&pdev->dev, PTR_ERR(priv->rst),
"Failed to get reset control\n");
}
platform_set_drvdata(pdev, priv);
spin_lock_init(&priv->lock);
@ -1355,6 +1365,7 @@ static struct sun4i_dma_config sun4i_a10_dma_cfg = {
.ddma_drq_sdram = SUN4I_DDMA_DRQ_TYPE_SDRAM,
.max_burst = SUN4I_MAX_BURST,
.has_reset = false,
};
static const struct of_device_id sun4i_dma_match[] = {