superrob1500
/
mirror-linux
mirror of https://github.com/torvalds/linux
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

soc: fixes for 6.17, part 3 

There are a few minor code fixes for tegra firmware, i.MX firmware and the
 eyeq reset controller, and a MAINTAINERS update as Alyssa Rosenzweig moves
 on to non-kernel projects. The other changes are all for devicetree files:
 
  - Multiple Marvell Armada SoCs need changes to fix PCIe, audio and SATA
  - A socfpga board fails to probe the ethernet phy
  - The two temperature sensors on i.MX8MP are swapped
  - Allwinner devicetree files cause build-time warnings
  - Two Rockchip based boards need corrections for headphone detection
    and SPI flash
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmjUXWcACgkQmmx57+YA
 GNno4g//ZcWBmmkSEHlbbHzD9uMXdXGF/NyNWr/O+9f+uOEnmZ/RCxvNl7rGU8aq
 5Mu6QlrgFiPRoDjqU1eHrd+Bya43M6TdOpYf3boM9tgd9wYuE7vLWUUF6BRV/x7D
 SuNQfWMk0JwwDgYAltLs5mB+tKqxNnEDLdDQiV28UtES/aNsDAs5Z3pCeBAbbMC/
 dkZzg/QvpKEIDBUEA9+24ShYelM5EerQsJJbCJbrM8j5/fJFGWmQ2Z2QPkvVVLIh
 8UM6EL0xxa4emDHQJnmgkSbAi5UhPkttiDVl9aRmAfcvxUhGUzrBUu9Gj4ypEdiF
 9haGz+qz5rpz0LS5eNzBGPaaiUTRlx6PvCcpuJhkJKHyFjQDj+eruX7LMjsFptlz
 My1yS7J2LlDEpQOwIs8cQSnB6pV3eeol7DVM7PewbocbcSP1zgYcu+MYZc3QbJbH
 KdG6glkzbBWl5Nhur4KBVpv8HmsV8521WJQiyuH4MmjOUlHVVljsx6JVjvythw78
 n8nNHcwNIqpZRL2bYAaDT/uhtvPz3dgIU17Xl/s21Av3Wwru1GqNt/dMgMy6Ent5
 +1lriby47DCP69g0joy82Eb3Jf8KkAYatDmUEr31kZA66cVPzmrEGX6QioqGcMs5
 3XDF+JuAN3MzqGw4oZfPH5tLzYYUNr8g6F1A4CA5rlSDYiU81Rg=
 =bxeQ
 -----END PGP SIGNATURE-----

Merge tag 'soc-fixes-6.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann:
 "There are a few minor code fixes for tegra firmware, i.MX firmware
  and the eyeq reset controller, and a MAINTAINERS update as Alyssa
  Rosenzweig moves on to non-kernel projects.

  The other changes are all for devicetree files:

   - Multiple Marvell Armada SoCs need changes to fix PCIe, audio and
     SATA

   - A socfpga board fails to probe the ethernet phy

   - The two temperature sensors on i.MX8MP are swapped

   - Allwinner devicetree files cause build-time warnings

   - Two Rockchip based boards need corrections for headphone detection
     and SPI flash"

* tag 'soc-fixes-6.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  MAINTAINERS: remove Alyssa Rosenzweig
  firmware: tegra: Do not warn on missing memory-region property
  arm64: dts: marvell: cn9132-clearfog: fix multi-lane pci x2 and x4 ports
  arm64: dts: marvell: cn9132-clearfog: disable eMMC high-speed modes
  arm64: dts: marvell: cn913x-solidrun: fix sata ports status
  ARM: dts: kirkwood: Fix sound DAI cells for OpenRD clients
  arm64: dts: imx8mp: Correct thermal sensor index
  ARM: imx: Kconfig: Adjust select after renamed config option
  firmware: imx: Add stub functions for SCMI CPU API
  firmware: imx: Add stub functions for SCMI LMM API
  firmware: imx: Add stub functions for SCMI MISC API
  riscv: dts: allwinner: rename devterm i2c-gpio node to comply with binding
  arm64: dts: rockchip: Fix the headphone detection on the orangepi 5
  arm64: dts: rockchip: Add vcc supply for SPI Flash on NanoPC-T6
  ARM: dts: socfpga: sodia: Fix mdio bus probe and PHY address
  reset: eyeq: fix OF node leak
  ARM64: dts: mcbin: fix SATA ports on Macchiatobin
  ARM: dts: armada-370-db: Fix stereo audio input routing on Armada 370
  ARM: dts: allwinner: Minor whitespace cleanup
pull/1360/merge
Linus Torvalds 2025-09-24 14:37:44 -07:00
parent 4ea5af0859 13923775d5
commit ea78c19081
22 changed files with 113 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.get_maintainer.ignore
View File

@ -1,5 +1,6 @@
Alan Cox <alan@lxorguk.ukuu.org.uk>
Alan Cox <root@hraefn.swansea.linux.org.uk>
Alyssa Rosenzweig <alyssa@rosenzweig.io>
Christoph Hellwig <hch@lst.de>
Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Marc Gonzalez <marc.w.gonzalez@free.fr>

2
MAINTAINERS
View File

@ -1845,7 +1845,6 @@ S: Odd fixes
F: drivers/input/mouse/bcm5974.c
APPLE PCIE CONTROLLER DRIVER
M: Alyssa Rosenzweig <alyssa@rosenzweig.io>
M: Marc Zyngier <maz@kernel.org>
L: linux-pci@vger.kernel.org
S: Maintained
@ -2364,7 +2363,6 @@ F: sound/soc/codecs/ssm3515.c
ARM/APPLE MACHINE SUPPORT
M: Sven Peter <sven@kernel.org>
M: Janne Grunau <j@jannau.net>
R: Alyssa Rosenzweig <alyssa@rosenzweig.io>
R: Neal Gompa <neal@gompa.dev>
L: asahi@lists.linux.dev
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

2
arch/arm/boot/dts/allwinner/sun4i-a10-olinuxino-lime.dts
View File

@ -218,7 +218,7 @@
&usbphy {
usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */
usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH5 */
usb0_vbus-supply = <&reg_usb0_vbus>;
usb0_vbus-supply = <&reg_usb0_vbus>;
usb1_vbus-supply = <&reg_usb1_vbus>;
usb2_vbus-supply = <&reg_usb2_vbus>;
status = "okay";

2
arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi
View File

@ -82,7 +82,7 @@
};
&ehci0 {
status = "okay";
status = "okay";
};
&mmc1 {

2
arch/arm/boot/dts/allwinner/sun8i-r40.dtsi
View File

@ -705,7 +705,7 @@
};
/omit-if-no-ref/
uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{
uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins {
pins = "PI16", "PI17";
function = "uart2";
};

2
arch/arm/boot/dts/allwinner/sun8i-v3s-netcube-kumquat.dts
View File

@ -29,7 +29,7 @@
clk_can0: clock-can0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <40000000>;
clock-frequency = <40000000>;
};
gpio-keys {

6
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts
View File

@ -66,8 +66,10 @@
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@4 {
reg = <4>;
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;

2
arch/arm/boot/dts/marvell/armada-370-db.dts
View File

@ -119,7 +119,7 @@
"Out Jack", "HPL",
"Out Jack", "HPR",
"AIN1L", "In Jack",
"AIN1L", "In Jack";
"AIN1R", "In Jack";
status = "okay";
simple-audio-card,dai-link@0 {

2
arch/arm/boot/dts/marvell/kirkwood-openrd-client.dts
View File

@ -38,7 +38,7 @@
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&audio0 0>;
sound-dai = <&audio0>;
};
simple-audio-card,codec {

2
arch/arm/mach-imx/Kconfig
View File

@ -242,7 +242,7 @@ choice
config VF_USE_PIT_TIMER
bool "Use PIT timer"
select VF_PIT_TIMER
select NXP_PIT_TIMER
help
Use SoC Periodic Interrupt Timer (PIT) as clocksource

4
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View File

@ -298,7 +298,7 @@
cpu-thermal {
polling-delay-passive = <250>;
polling-delay = <2000>;
thermal-sensors = <&tmu 0>;
thermal-sensors = <&tmu 1>;
trips {
cpu_alert0: trip0 {
temperature = <85000>;
@ -331,7 +331,7 @@
soc-thermal {
polling-delay-passive = <250>;
polling-delay = <2000>;
thermal-sensors = <&tmu 1>;
thermal-sensors = <&tmu 0>;
trips {
soc_alert0: trip0 {
temperature = <85000>;

2
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
View File

@ -345,11 +345,13 @@
/* CPS Lane 1 - U32 */
sata-port@0 {
phys = <&cp1_comphy1 0>;
status = "okay";
};
/* CPS Lane 3 - U31 */
sata-port@1 {
phys = <&cp1_comphy3 1>;
status = "okay";
};
};

7
arch/arm64/boot/dts/marvell/cn9130-cf.dtsi
View File

@ -152,11 +152,12 @@
/* SRDS #0 - SATA on M.2 connector */
&cp0_sata0 {
phys = <&cp0_comphy0 1>;
status = "okay";
/* only port 1 is available */
/delete-node/ sata-port@0;
sata-port@1 {
phys = <&cp0_comphy0 1>;
status = "okay";
};
};
/* microSD */

6
arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts
View File

@ -563,11 +563,13 @@
/* SRDS #1 - SATA on M.2 (J44) */
&cp1_sata0 {
phys = <&cp1_comphy1 0>;
status = "okay";
/* only port 0 is available */
/delete-node/ sata-port@1;
sata-port@0 {
phys = <&cp1_comphy1 0>;
status = "okay";
};
};
&cp1_syscon0 {

22
arch/arm64/boot/dts/marvell/cn9132-clearfog.dts
View File

@ -413,7 +413,13 @@
/* SRDS #0,#1,#2,#3 - PCIe */
&cp0_pcie0 {
num-lanes = <4>;
phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>, <&cp0_comphy2 0>, <&cp0_comphy3 0>;
/*
* The mvebu-comphy driver does not currently know how to pass correct
* lane-count to ATF while configuring the serdes lanes.
* Rely on bootloader configuration only.
*
* phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>, <&cp0_comphy2 0>, <&cp0_comphy3 0>;
*/
status = "okay";
};
@ -475,7 +481,13 @@
/* SRDS #0,#1 - PCIe */
&cp1_pcie0 {
num-lanes = <2>;
phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>;
/*
* The mvebu-comphy driver does not currently know how to pass correct
* lane-count to ATF while configuring the serdes lanes.
* Rely on bootloader configuration only.
*
* phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>;
*/
status = "okay";
};
@ -512,10 +524,9 @@
status = "okay";
/* only port 1 is available */
/delete-node/ sata-port@0;
sata-port@1 {
phys = <&cp1_comphy3 1>;
status = "okay";
};
};
@ -631,9 +642,8 @@
status = "okay";
/* only port 1 is available */
/delete-node/ sata-port@0;
sata-port@1 {
status = "okay";
phys = <&cp2_comphy3 1>;
};
};

8
arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi
View File

@ -137,6 +137,14 @@
pinctrl-0 = <&ap_mmc0_pins>;
pinctrl-names = "default";
vqmmc-supply = <&v_1_8>;
/*
* Not stable in HS modes - phy needs "more calibration", so disable
* UHS (by preventing voltage switch), SDR104, SDR50 and DDR50 modes.
*/
no-1-8-v;
no-sd;
no-sdio;
non-removable;
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
View File

@ -731,6 +731,7 @@
spi-max-frequency = <104000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
vcc-supply = <&vcc_1v8_s3>;
};
};

3
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
View File

@ -42,9 +42,8 @@
simple-audio-card,bitclock-master = <&masterdai>;
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&masterdai>;
simple-audio-card,hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
simple-audio-card,hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
simple-audio-card,mclk-fs = <256>;
simple-audio-card,pin-switches = "Headphones";
simple-audio-card,routing =
"Headphones", "LOUT1",
"Headphones", "ROUT1",

2
arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts
View File

@ -17,7 +17,7 @@
#cooling-cells = <2>;
};
i2c-gpio-0 {
i2c-0 {
compatible = "i2c-gpio";
sda-gpios = <&pio 3 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD14/GPIO44 */
scl-gpios = <&pio 3 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD15/GPIO45 */

5
drivers/firmware/tegra/bpmp-tegra186.c
View File

@ -198,7 +198,10 @@ static int tegra186_bpmp_dram_init(struct tegra_bpmp *bpmp)
err = of_reserved_mem_region_to_resource(bpmp->dev->of_node, 0, &res);
if (err < 0) {
dev_warn(bpmp->dev, "failed to parse memory region: %d\n", err);
if (err != -ENODEV)
dev_warn(bpmp->dev,
"failed to parse memory region: %d\n", err);
return err;
}

11
drivers/reset/reset-eyeq.c
View File

@ -410,6 +410,13 @@ static int eqr_of_xlate_twocells(struct reset_controller_dev *rcdev,
return eqr_of_xlate_internal(rcdev, reset_spec->args[0], reset_spec->args[1]);
}
static void eqr_of_node_put(void *_dev)
{
struct device *dev = _dev;
of_node_put(dev->of_node);
}
static int eqr_probe(struct auxiliary_device *adev,
const struct auxiliary_device_id *id)
{
@ -428,6 +435,10 @@ static int eqr_probe(struct auxiliary_device *adev,
if (!dev->of_node)
return -ENODEV;
ret = devm_add_action_or_reset(dev, eqr_of_node_put, dev);
if (ret)
return ret;
/*
* Using our newfound OF node, we can get match data. We cannot use
* device_get_match_data() because it does not match reused OF nodes.

47
include/linux/firmware/imx/sm.h
View File

@ -26,13 +26,43 @@
#define SCMI_IMX94_CTRL_SAI3_MCLK 5U /*!< WAKE SAI3 MCLK */
#define SCMI_IMX94_CTRL_SAI4_MCLK 6U /*!< WAKE SAI4 MCLK */
#if IS_ENABLED(CONFIG_IMX_SCMI_MISC_DRV)
int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val);
int scmi_imx_misc_ctrl_set(u32 id, u32 val);
#else
static inline int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val)
{
return -EOPNOTSUPP;
}
static inline int scmi_imx_misc_ctrl_set(u32 id, u32 val)
{
return -EOPNOTSUPP;
}
#endif
#if IS_ENABLED(CONFIG_IMX_SCMI_CPU_DRV)
int scmi_imx_cpu_start(u32 cpuid, bool start);
int scmi_imx_cpu_started(u32 cpuid, bool *started);
int scmi_imx_cpu_reset_vector_set(u32 cpuid, u64 vector, bool start, bool boot,
bool resume);
#else
static inline int scmi_imx_cpu_start(u32 cpuid, bool start)
{
return -EOPNOTSUPP;
}
static inline int scmi_imx_cpu_started(u32 cpuid, bool *started)
{
return -EOPNOTSUPP;
}
static inline int scmi_imx_cpu_reset_vector_set(u32 cpuid, u64 vector, bool start,
bool boot, bool resume)
{
return -EOPNOTSUPP;
}
#endif
enum scmi_imx_lmm_op {
SCMI_IMX_LMM_BOOT,
@ -44,7 +74,24 @@ enum scmi_imx_lmm_op {
#define SCMI_IMX_LMM_OP_FORCEFUL 0
#define SCMI_IMX_LMM_OP_GRACEFUL BIT(0)
#if IS_ENABLED(CONFIG_IMX_SCMI_LMM_DRV)
int scmi_imx_lmm_operation(u32 lmid, enum scmi_imx_lmm_op op, u32 flags);
int scmi_imx_lmm_info(u32 lmid, struct scmi_imx_lmm_info *info);
int scmi_imx_lmm_reset_vector_set(u32 lmid, u32 cpuid, u32 flags, u64 vector);
#else
static inline int scmi_imx_lmm_operation(u32 lmid, enum scmi_imx_lmm_op op, u32 flags)
{
return -EOPNOTSUPP;
}
static inline int scmi_imx_lmm_info(u32 lmid, struct scmi_imx_lmm_info *info)
{
return -EOPNOTSUPP;
}
static inline int scmi_imx_lmm_reset_vector_set(u32 lmid, u32 cpuid, u32 flags, u64 vector)
{
return -EOPNOTSUPP;
}
#endif
#endif