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ARC: atomics: Implement arch_atomic64_cmpxchg using _relaxed 

The core atomic code has a number of macros where it elaborates
architecture primitives into more functions. ARC uses
arch_atomic64_cmpxchg() as it's architecture primitive which disable alot
of the additional functions.

Instead provide arch_cmpxchg64_relaxed() as the primitive and rely on the
core macros to create arch_cmpxchg64().

The macros will also provide other functions, for instance,
try_cmpxchg64_release(), giving a more complete implementation.

Suggested-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/Z0747n5bSep4_1VX@J2N7QTR9R3
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Vineet Gupta <vgupta@kernel.org>
pull/1263/head
Jason Gunthorpe 2025-04-08 14:22:56 -03:00 committed by Vineet Gupta
parent 19272b37aa
commit ea7caffedd
1 changed files with 5 additions and 10 deletions
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15
arch/arc/include/asm/atomic64-arcv2.h
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@ -137,12 +137,9 @@ ATOMIC64_OPS(xor, xor, xor)
#undef ATOMIC64_OP_RETURN #undef ATOMIC64_OP_RETURN
#undef ATOMIC64_OP #undef ATOMIC64_OP
static inline s64 static inline u64 __arch_cmpxchg64_relaxed(volatile void *ptr, u64 old, u64 new)
arch_atomic64_cmpxchg(atomic64_t *ptr, s64 expected, s64 new)
{ {
s64 prev; u64 prev;
smp_mb();
__asm__ __volatile__( __asm__ __volatile__(
"1: llockd %0, [%1] \n" "1: llockd %0, [%1] \n"
@ -152,14 +149,12 @@ arch_atomic64_cmpxchg(atomic64_t *ptr, s64 expected, s64 new)
" bnz 1b \n" " bnz 1b \n"
"2: \n" "2: \n"
: "=&r"(prev) : "=&r"(prev)
: "r"(ptr), "ir"(expected), "r"(new) : "r"(ptr), "ir"(old), "r"(new)
: "cc"); /* memory clobber comes from smp_mb() */ : "memory", "cc");
smp_mb();
return prev; return prev;
} }
#define arch_atomic64_cmpxchg arch_atomic64_cmpxchg #define arch_cmpxchg64_relaxed __arch_cmpxchg64_relaxed
static inline s64 arch_atomic64_xchg(atomic64_t *ptr, s64 new) static inline s64 arch_atomic64_xchg(atomic64_t *ptr, s64 new)
{ {