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@ -6,6 +6,7 @@
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#include <linux/kernel_stat.h>
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#include <linux/pci.h>
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#include <linux/msi.h>
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#include <linux/irqchip/irq-msi-lib.h>
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#include <linux/smp.h>
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#include <asm/isc.h>
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@ -97,7 +98,7 @@ static int zpci_clear_directed_irq(struct zpci_dev *zdev)
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}
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/* Register adapter interruptions */
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static int zpci_set_irq(struct zpci_dev *zdev)
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int zpci_set_irq(struct zpci_dev *zdev)
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{
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int rc;
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@ -125,27 +126,53 @@ static int zpci_clear_irq(struct zpci_dev *zdev)
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static int zpci_set_irq_affinity(struct irq_data *data, const struct cpumask *dest,
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bool force)
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{
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struct msi_desc *entry = irq_data_get_msi_desc(data);
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struct msi_msg msg = entry->msg;
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int cpu_addr = smp_cpu_get_cpu_address(cpumask_first(dest));
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msg.address_lo &= 0xff0000ff;
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msg.address_lo |= (cpu_addr << 8);
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pci_write_msi_msg(data->irq, &msg);
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irq_data_update_affinity(data, dest);
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return IRQ_SET_MASK_OK;
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}
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/*
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* Encode the hwirq number for the parent domain. The encoding must be unique
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* for each IRQ of each device in the parent domain, so it uses the devfn to
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* identify the device and the msi_index to identify the IRQ within that device.
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*/
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static inline u32 zpci_encode_hwirq(u8 devfn, u16 msi_index)
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{
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return (devfn << 16) | msi_index;
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}
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static inline u16 zpci_decode_hwirq_msi_index(irq_hw_number_t hwirq)
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{
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return hwirq & 0xffff;
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}
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static void zpci_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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{
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struct msi_desc *desc = irq_data_get_msi_desc(data);
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struct zpci_dev *zdev = to_zpci_dev(desc->dev);
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if (irq_delivery == DIRECTED) {
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int cpu = cpumask_first(irq_data_get_affinity_mask(data));
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msg->address_lo = zdev->msi_addr & 0xff0000ff;
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msg->address_lo |= (smp_cpu_get_cpu_address(cpu) << 8);
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} else {
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msg->address_lo = zdev->msi_addr & 0xffffffff;
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}
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msg->address_hi = zdev->msi_addr >> 32;
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msg->data = zpci_decode_hwirq_msi_index(data->hwirq);
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}
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static struct irq_chip zpci_irq_chip = {
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.name = "PCI-MSI",
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.irq_unmask = pci_msi_unmask_irq,
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.irq_mask = pci_msi_mask_irq,
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.irq_compose_msi_msg = zpci_compose_msi_msg,
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};
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static void zpci_handle_cpu_local_irq(bool rescan)
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{
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struct airq_iv *dibv = zpci_ibv[smp_processor_id()];
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union zpci_sic_iib iib = {{0}};
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struct irq_domain *msi_domain;
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irq_hw_number_t hwirq;
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unsigned long bit;
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int irqs_on = 0;
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@ -163,7 +190,9 @@ static void zpci_handle_cpu_local_irq(bool rescan)
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continue;
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}
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inc_irq_stat(IRQIO_MSI);
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generic_handle_irq(airq_iv_get_data(dibv, bit));
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hwirq = airq_iv_get_data(dibv, bit);
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msi_domain = (struct irq_domain *)airq_iv_get_ptr(dibv, bit);
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generic_handle_domain_irq(msi_domain, hwirq);
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}
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}
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@ -228,6 +257,8 @@ static void zpci_floating_irq_handler(struct airq_struct *airq,
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struct tpi_info *tpi_info)
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{
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union zpci_sic_iib iib = {{0}};
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struct irq_domain *msi_domain;
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irq_hw_number_t hwirq;
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unsigned long si, ai;
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struct airq_iv *aibv;
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int irqs_on = 0;
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@ -255,7 +286,9 @@ static void zpci_floating_irq_handler(struct airq_struct *airq,
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break;
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inc_irq_stat(IRQIO_MSI);
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airq_iv_lock(aibv, ai);
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generic_handle_irq(airq_iv_get_data(aibv, ai));
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hwirq = airq_iv_get_data(aibv, ai);
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msi_domain = (struct irq_domain *)airq_iv_get_ptr(aibv, ai);
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generic_handle_domain_irq(msi_domain, hwirq);
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airq_iv_unlock(aibv, ai);
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}
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}
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@ -277,7 +310,9 @@ static int __alloc_airq(struct zpci_dev *zdev, int msi_vecs,
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zdev->aisb = *bit;
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/* Create adapter interrupt vector */
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zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK, NULL);
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zdev->aibv = airq_iv_create(msi_vecs,
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AIRQ_IV_PTR | AIRQ_IV_DATA | AIRQ_IV_BITLOCK,
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NULL);
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if (!zdev->aibv)
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return -ENOMEM;
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@ -289,133 +324,6 @@ static int __alloc_airq(struct zpci_dev *zdev, int msi_vecs,
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return 0;
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}
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int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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{
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unsigned int hwirq, msi_vecs, irqs_per_msi, i, cpu;
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struct zpci_dev *zdev = to_zpci(pdev);
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struct msi_desc *msi;
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struct msi_msg msg;
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unsigned long bit;
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int cpu_addr;
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int rc, irq;
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zdev->aisb = -1UL;
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zdev->msi_first_bit = -1U;
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msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
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if (msi_vecs < nvec) {
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pr_info("%s requested %d irqs, allocate system limit of %d",
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pci_name(pdev), nvec, zdev->max_msi);
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}
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rc = __alloc_airq(zdev, msi_vecs, &bit);
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if (rc < 0)
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return rc;
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/*
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* Request MSI interrupts:
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* When using MSI, nvec_used interrupt sources and their irq
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* descriptors are controlled through one msi descriptor.
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* Thus the outer loop over msi descriptors shall run only once,
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* while two inner loops iterate over the interrupt vectors.
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* When using MSI-X, each interrupt vector/irq descriptor
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* is bound to exactly one msi descriptor (nvec_used is one).
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* So the inner loops are executed once, while the outer iterates
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* over the MSI-X descriptors.
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*/
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hwirq = bit;
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msi_for_each_desc(msi, &pdev->dev, MSI_DESC_NOTASSOCIATED) {
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if (hwirq - bit >= msi_vecs)
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break;
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irqs_per_msi = min_t(unsigned int, msi_vecs, msi->nvec_used);
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irq = __irq_alloc_descs(-1, 0, irqs_per_msi, 0, THIS_MODULE,
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(irq_delivery == DIRECTED) ?
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msi->affinity : NULL);
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if (irq < 0)
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return -ENOMEM;
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for (i = 0; i < irqs_per_msi; i++) {
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rc = irq_set_msi_desc_off(irq, i, msi);
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if (rc)
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return rc;
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irq_set_chip_and_handler(irq + i, &zpci_irq_chip,
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handle_percpu_irq);
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}
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msg.data = hwirq - bit;
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if (irq_delivery == DIRECTED) {
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if (msi->affinity)
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cpu = cpumask_first(&msi->affinity->mask);
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else
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cpu = 0;
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cpu_addr = smp_cpu_get_cpu_address(cpu);
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msg.address_lo = zdev->msi_addr & 0xff0000ff;
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msg.address_lo |= (cpu_addr << 8);
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for_each_possible_cpu(cpu) {
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for (i = 0; i < irqs_per_msi; i++)
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airq_iv_set_data(zpci_ibv[cpu],
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hwirq + i, irq + i);
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}
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} else {
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msg.address_lo = zdev->msi_addr & 0xffffffff;
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for (i = 0; i < irqs_per_msi; i++)
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airq_iv_set_data(zdev->aibv, hwirq + i, irq + i);
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}
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msg.address_hi = zdev->msi_addr >> 32;
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pci_write_msi_msg(irq, &msg);
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hwirq += irqs_per_msi;
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}
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zdev->msi_first_bit = bit;
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zdev->msi_nr_irqs = hwirq - bit;
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rc = zpci_set_irq(zdev);
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if (rc)
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return rc;
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return (zdev->msi_nr_irqs == nvec) ? 0 : zdev->msi_nr_irqs;
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}
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void arch_teardown_msi_irqs(struct pci_dev *pdev)
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{
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struct zpci_dev *zdev = to_zpci(pdev);
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struct msi_desc *msi;
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unsigned int i;
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int rc;
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/* Disable interrupts */
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rc = zpci_clear_irq(zdev);
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if (rc)
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return;
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/* Release MSI interrupts */
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msi_for_each_desc(msi, &pdev->dev, MSI_DESC_ASSOCIATED) {
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for (i = 0; i < msi->nvec_used; i++) {
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irq_set_msi_desc(msi->irq + i, NULL);
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irq_free_desc(msi->irq + i);
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}
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msi->msg.address_lo = 0;
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msi->msg.address_hi = 0;
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msi->msg.data = 0;
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msi->irq = 0;
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}
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if (zdev->aisb != -1UL) {
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zpci_ibv[zdev->aisb] = NULL;
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airq_iv_free_bit(zpci_sbv, zdev->aisb);
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zdev->aisb = -1UL;
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}
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if (zdev->aibv) {
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airq_iv_release(zdev->aibv);
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zdev->aibv = NULL;
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}
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if ((irq_delivery == DIRECTED) && zdev->msi_first_bit != -1U)
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airq_iv_free(zpci_ibv[0], zdev->msi_first_bit, zdev->msi_nr_irqs);
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}
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bool arch_restore_msi_irqs(struct pci_dev *pdev)
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{
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struct zpci_dev *zdev = to_zpci(pdev);
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@ -429,6 +337,207 @@ static struct airq_struct zpci_airq = {
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.isc = PCI_ISC,
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};
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static void zpci_msi_teardown_directed(struct zpci_dev *zdev)
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{
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airq_iv_free(zpci_ibv[0], zdev->msi_first_bit, zdev->max_msi);
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zdev->msi_first_bit = -1U;
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zdev->msi_nr_irqs = 0;
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}
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static void zpci_msi_teardown_floating(struct zpci_dev *zdev)
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{
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airq_iv_release(zdev->aibv);
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zdev->aibv = NULL;
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airq_iv_free_bit(zpci_sbv, zdev->aisb);
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zdev->aisb = -1UL;
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zdev->msi_first_bit = -1U;
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zdev->msi_nr_irqs = 0;
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}
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static void zpci_msi_teardown(struct irq_domain *domain, msi_alloc_info_t *arg)
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{
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struct zpci_dev *zdev = to_zpci_dev(domain->dev);
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zpci_clear_irq(zdev);
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if (irq_delivery == DIRECTED)
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zpci_msi_teardown_directed(zdev);
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else
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zpci_msi_teardown_floating(zdev);
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}
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static int zpci_msi_prepare(struct irq_domain *domain,
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struct device *dev, int nvec,
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msi_alloc_info_t *info)
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{
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struct zpci_dev *zdev = to_zpci_dev(dev);
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struct pci_dev *pdev = to_pci_dev(dev);
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unsigned long bit;
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int msi_vecs, rc;
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msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
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if (msi_vecs < nvec) {
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pr_info("%s requested %d IRQs, allocate system limit of %d\n",
|
|
|
|
|
pci_name(pdev), nvec, zdev->max_msi);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
rc = __alloc_airq(zdev, msi_vecs, &bit);
|
|
|
|
|
if (rc) {
|
|
|
|
|
pr_err("Allocating adapter IRQs for %s failed\n", pci_name(pdev));
|
|
|
|
|
return rc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
zdev->msi_first_bit = bit;
|
|
|
|
|
zdev->msi_nr_irqs = msi_vecs;
|
|
|
|
|
rc = zpci_set_irq(zdev);
|
|
|
|
|
if (rc) {
|
|
|
|
|
pr_err("Registering adapter IRQs for %s failed\n",
|
|
|
|
|
pci_name(pdev));
|
|
|
|
|
|
|
|
|
|
if (irq_delivery == DIRECTED)
|
|
|
|
|
zpci_msi_teardown_directed(zdev);
|
|
|
|
|
else
|
|
|
|
|
zpci_msi_teardown_floating(zdev);
|
|
|
|
|
return rc;
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int zpci_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
|
|
|
|
|
unsigned int nr_irqs, void *args)
|
|
|
|
|
{
|
|
|
|
|
struct msi_desc *desc = ((msi_alloc_info_t *)args)->desc;
|
|
|
|
|
struct zpci_dev *zdev = to_zpci_dev(desc->dev);
|
|
|
|
|
struct zpci_bus *zbus = zdev->zbus;
|
|
|
|
|
unsigned int cpu, hwirq;
|
|
|
|
|
unsigned long bit;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
bit = zdev->msi_first_bit + desc->msi_index;
|
|
|
|
|
hwirq = zpci_encode_hwirq(zdev->devfn, desc->msi_index);
|
|
|
|
|
|
|
|
|
|
if (desc->msi_index + nr_irqs > zdev->max_msi)
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < nr_irqs; i++) {
|
|
|
|
|
irq_domain_set_info(domain, virq + i, hwirq + i,
|
|
|
|
|
&zpci_irq_chip, zdev,
|
|
|
|
|
handle_percpu_irq, NULL, NULL);
|
|
|
|
|
|
|
|
|
|
if (irq_delivery == DIRECTED) {
|
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
|
|
|
airq_iv_set_ptr(zpci_ibv[cpu], bit + i,
|
|
|
|
|
(unsigned long)zbus->msi_parent_domain);
|
|
|
|
|
airq_iv_set_data(zpci_ibv[cpu], bit + i, hwirq + i);
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
airq_iv_set_ptr(zdev->aibv, bit + i,
|
|
|
|
|
(unsigned long)zbus->msi_parent_domain);
|
|
|
|
|
airq_iv_set_data(zdev->aibv, bit + i, hwirq + i);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void zpci_msi_clear_airq(struct irq_data *d, int i)
|
|
|
|
|
{
|
|
|
|
|
struct msi_desc *desc = irq_data_get_msi_desc(d);
|
|
|
|
|
struct zpci_dev *zdev = to_zpci_dev(desc->dev);
|
|
|
|
|
unsigned long bit;
|
|
|
|
|
unsigned int cpu;
|
|
|
|
|
u16 msi_index;
|
|
|
|
|
|
|
|
|
|
msi_index = zpci_decode_hwirq_msi_index(d->hwirq);
|
|
|
|
|
bit = zdev->msi_first_bit + msi_index;
|
|
|
|
|
|
|
|
|
|
if (irq_delivery == DIRECTED) {
|
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
|
|
|
airq_iv_set_ptr(zpci_ibv[cpu], bit + i, 0);
|
|
|
|
|
airq_iv_set_data(zpci_ibv[cpu], bit + i, 0);
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
airq_iv_set_ptr(zdev->aibv, bit + i, 0);
|
|
|
|
|
airq_iv_set_data(zdev->aibv, bit + i, 0);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void zpci_msi_domain_free(struct irq_domain *domain, unsigned int virq,
|
|
|
|
|
unsigned int nr_irqs)
|
|
|
|
|
{
|
|
|
|
|
struct irq_data *d;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < nr_irqs; i++) {
|
|
|
|
|
d = irq_domain_get_irq_data(domain, virq + i);
|
|
|
|
|
zpci_msi_clear_airq(d, i);
|
|
|
|
|
irq_domain_reset_irq_data(d);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const struct irq_domain_ops zpci_msi_domain_ops = {
|
|
|
|
|
.alloc = zpci_msi_domain_alloc,
|
|
|
|
|
.free = zpci_msi_domain_free,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static bool zpci_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
|
|
|
|
|
struct irq_domain *real_parent,
|
|
|
|
|
struct msi_domain_info *info)
|
|
|
|
|
{
|
|
|
|
|
if (!msi_lib_init_dev_msi_info(dev, domain, real_parent, info))
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
info->ops->msi_prepare = zpci_msi_prepare;
|
|
|
|
|
info->ops->msi_teardown = zpci_msi_teardown;
|
|
|
|
|
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct msi_parent_ops zpci_msi_parent_ops = {
|
|
|
|
|
.supported_flags = MSI_GENERIC_FLAGS_MASK |
|
|
|
|
|
MSI_FLAG_PCI_MSIX |
|
|
|
|
|
MSI_FLAG_MULTI_PCI_MSI,
|
|
|
|
|
.required_flags = MSI_FLAG_USE_DEF_DOM_OPS |
|
|
|
|
|
MSI_FLAG_USE_DEF_CHIP_OPS,
|
|
|
|
|
.init_dev_msi_info = zpci_init_dev_msi_info,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
int zpci_create_parent_msi_domain(struct zpci_bus *zbus)
|
|
|
|
|
{
|
|
|
|
|
char fwnode_name[18];
|
|
|
|
|
|
|
|
|
|
snprintf(fwnode_name, sizeof(fwnode_name), "ZPCI_MSI_DOM_%04x", zbus->domain_nr);
|
|
|
|
|
struct irq_domain_info info = {
|
|
|
|
|
.fwnode = irq_domain_alloc_named_fwnode(fwnode_name),
|
|
|
|
|
.ops = &zpci_msi_domain_ops,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
if (!info.fwnode) {
|
|
|
|
|
pr_err("Failed to allocate fwnode for MSI IRQ domain\n");
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (irq_delivery == FLOATING)
|
|
|
|
|
zpci_msi_parent_ops.required_flags |= MSI_FLAG_NO_AFFINITY;
|
|
|
|
|
|
|
|
|
|
zbus->msi_parent_domain = msi_create_parent_irq_domain(&info, &zpci_msi_parent_ops);
|
|
|
|
|
if (!zbus->msi_parent_domain) {
|
|
|
|
|
irq_domain_free_fwnode(info.fwnode);
|
|
|
|
|
pr_err("Failed to create MSI IRQ domain\n");
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void zpci_remove_parent_msi_domain(struct zpci_bus *zbus)
|
|
|
|
|
{
|
|
|
|
|
struct fwnode_handle *fn;
|
|
|
|
|
|
|
|
|
|
fn = zbus->msi_parent_domain->fwnode;
|
|
|
|
|
irq_domain_remove(zbus->msi_parent_domain);
|
|
|
|
|
irq_domain_free_fwnode(fn);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void __init cpu_enable_directed_irq(void *unused)
|
|
|
|
|
{
|
|
|
|
|
union zpci_sic_iib iib = {{0}};
|
|
|
|
|
@ -465,6 +574,7 @@ static int __init zpci_directed_irq_init(void)
|
|
|
|
|
* is only done on the first vector.
|
|
|
|
|
*/
|
|
|
|
|
zpci_ibv[cpu] = airq_iv_create(cache_line_size() * BITS_PER_BYTE,
|
|
|
|
|
AIRQ_IV_PTR |
|
|
|
|
|
AIRQ_IV_DATA |
|
|
|
|
|
AIRQ_IV_CACHELINE |
|
|
|
|
|
(!cpu ? AIRQ_IV_ALLOC : 0), NULL);
|
|
|
|
|
|