bnxt_en: Increase the number of MSIX vectors for RoCE device

If RocE is supported on the device, set the number of RoCE MSIX vectors
to the number of online CPUs + 1 and capped at these maximums:

VF: 2
NPAR: 5
PF: 64

For the PF, the maximum is now increased from the previous value
of 9 to get better performance for kernel applications.

Remove the unnecessary check for BNXT_FLAG_ROCE_CAP.
bnxt_set_dflt_ulp_msix() will only be called if the flag is set.

Reviewed-by: Andy Gospodarek <andrew.gospodarek@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/20240909202737.93852-2-michael.chan@broadcom.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
pull/955/head
Michael Chan 2024-09-09 13:27:35 -07:00 committed by Jakub Kicinski
parent 955f5b1508
commit f775cb1bbf
2 changed files with 14 additions and 6 deletions

View File

@ -176,11 +176,17 @@ EXPORT_SYMBOL(bnxt_unregister_dev);
static int bnxt_set_dflt_ulp_msix(struct bnxt *bp)
{
u32 roce_msix = BNXT_VF(bp) ?
BNXT_MAX_VF_ROCE_MSIX : BNXT_MAX_ROCE_MSIX;
int roce_msix = BNXT_MAX_ROCE_MSIX;
return ((bp->flags & BNXT_FLAG_ROCE_CAP) ?
min_t(u32, roce_msix, num_online_cpus()) : 0);
if (BNXT_VF(bp))
roce_msix = BNXT_MAX_ROCE_MSIX_VF;
else if (bp->port_partition_type)
roce_msix = BNXT_MAX_ROCE_MSIX_NPAR_PF;
/* NQ MSIX vectors should match the number of CPUs plus 1 more for
* the CREQ MSIX, up to the default.
*/
return min_t(int, roce_msix, num_online_cpus() + 1);
}
int bnxt_send_msg(struct bnxt_en_dev *edev,

View File

@ -15,8 +15,10 @@
#define BNXT_MIN_ROCE_CP_RINGS 2
#define BNXT_MIN_ROCE_STAT_CTXS 1
#define BNXT_MAX_ROCE_MSIX 9
#define BNXT_MAX_VF_ROCE_MSIX 2
#define BNXT_MAX_ROCE_MSIX_VF 2
#define BNXT_MAX_ROCE_MSIX_NPAR_PF 5
#define BNXT_MAX_ROCE_MSIX 64
struct hwrm_async_event_cmpl;
struct bnxt;