bnxt_en: Increase the number of MSIX vectors for RoCE device
If RocE is supported on the device, set the number of RoCE MSIX vectors to the number of online CPUs + 1 and capped at these maximums: VF: 2 NPAR: 5 PF: 64 For the PF, the maximum is now increased from the previous value of 9 to get better performance for kernel applications. Remove the unnecessary check for BNXT_FLAG_ROCE_CAP. bnxt_set_dflt_ulp_msix() will only be called if the flag is set. Reviewed-by: Andy Gospodarek <andrew.gospodarek@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20240909202737.93852-2-michael.chan@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>pull/955/head
parent
955f5b1508
commit
f775cb1bbf
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@ -176,11 +176,17 @@ EXPORT_SYMBOL(bnxt_unregister_dev);
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static int bnxt_set_dflt_ulp_msix(struct bnxt *bp)
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{
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u32 roce_msix = BNXT_VF(bp) ?
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BNXT_MAX_VF_ROCE_MSIX : BNXT_MAX_ROCE_MSIX;
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int roce_msix = BNXT_MAX_ROCE_MSIX;
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return ((bp->flags & BNXT_FLAG_ROCE_CAP) ?
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min_t(u32, roce_msix, num_online_cpus()) : 0);
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if (BNXT_VF(bp))
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roce_msix = BNXT_MAX_ROCE_MSIX_VF;
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else if (bp->port_partition_type)
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roce_msix = BNXT_MAX_ROCE_MSIX_NPAR_PF;
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/* NQ MSIX vectors should match the number of CPUs plus 1 more for
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* the CREQ MSIX, up to the default.
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*/
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return min_t(int, roce_msix, num_online_cpus() + 1);
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}
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int bnxt_send_msg(struct bnxt_en_dev *edev,
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@ -15,8 +15,10 @@
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#define BNXT_MIN_ROCE_CP_RINGS 2
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#define BNXT_MIN_ROCE_STAT_CTXS 1
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#define BNXT_MAX_ROCE_MSIX 9
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#define BNXT_MAX_VF_ROCE_MSIX 2
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#define BNXT_MAX_ROCE_MSIX_VF 2
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#define BNXT_MAX_ROCE_MSIX_NPAR_PF 5
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#define BNXT_MAX_ROCE_MSIX 64
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struct hwrm_async_event_cmpl;
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struct bnxt;
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