arm64: dts: qcom: sm8350: fixup SDHCI interconnect arguments
After switching interconnects to 2 cells, the SDHCI interconnects need
to get one more argument.
Fixes: 4f287e31ff ("arm64: dts: qcom: sm8350: Use 2 interconnect cells")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119105434.51635-1-krzysztof.kozlowski@linaro.org
pull/938/head
parent
0daef104e4
commit
fc0ff3e702
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@ -2547,8 +2547,8 @@
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<&rpmhcc RPMH_CXO_CLK>;
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clock-names = "iface", "core", "xo";
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resets = <&gcc GCC_SDCC2_BCR>;
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interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
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<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
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interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
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<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
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interconnect-names = "sdhc-ddr","cpu-sdhc";
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iommus = <&apps_smmu 0x4a0 0x0>;
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power-domains = <&rpmhpd SM8350_CX>;
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