Commit Graph

10 Commits (09cfd3c52ea76f43b3cb15e570aeddf633d65e80)

Author SHA1 Message Date
Bartosz Golaszewski 64f89f6e1f gpio: generic: rename BGPIOF_ flags to GPIO_GENERIC_
Make the flags passed to gpio_generic_chip_init() use the same prefix as
the rest of the modernized generic GPIO chip API.

Link: https://lore.kernel.org/r/20250917-gpio-generic-flags-v1-1-69f51fee8c89@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-24 13:52:35 +02:00
Bartosz Golaszewski 7eee64e8be gpio: use more common syntax for compound literals
The (typeof(foo)) construct is unusual in the kernel, use a more typical
syntax by explicitly spelling out the type.

Link: https://lore.kernel.org/all/20250909-gpio-mmio-gpio-conv-part4-v1-13-9f723dc3524a@linaro.org/
Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Link: https://lore.kernel.org/r/20250910-make-compound-literals-normal-again-v1-3-076ee7738a0b@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-12 09:19:56 +02:00
Bartosz Golaszewski c0378e59a6 gpio: hisi: use new generic GPIO chip API
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250826-gpio-mmio-gpio-conv-part2-v1-10-f67603e4b27e@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-03 09:37:47 +02:00
Bartosz Golaszewski 13ba232ed8 gpio: hisi: use the BGPIOF_UNREADABLE_REG_DIR flag
There's no reason for this driver to touch the gpio-mmio internals, we
have a dedicated flag passed to bgpio_init() indicating to the module
that the DIR register is unreadable.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250825-gpio-mmio-gpio-conv-v1-3-356b4b1d5110@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-08-25 12:05:37 +02:00
Devyn Liu 4f3b436eea gpio: hisi: Fix format specifier
The hisi_gpio->line is unsigned int so the format specifier
should have been %u not %d.

Signed-off-by: Devyn Liu <liudingyuan@huawei.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-10-13 08:39:30 +02:00
Linus Walleij 39bdd6bdad gpio: hisi: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

The IRQ chip was unnamed which seems unwise, so we just
assign the name "HISI-GPIO".

Cc: Marc Zyngier <maz@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-03-10 16:17:27 +01:00
Weilong Chen 80280df758 gpio: hisi: Add initial device tree support
Add support for HiSilicon GPIO controller in embedded platform, which
boot from devicetree.

Signed-off-by: Weilong Chen <chenweilong@huawei.com>
Acked-by: Jay Fang <f.fangjian@huawei.com>
Reviewed-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2022-11-07 21:37:07 +01:00
Marc Zyngier dbd1c54fc8 gpio: Bulk conversion to generic_handle_domain_irq()
Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2021-08-12 11:39:38 +01:00
Luo Jiaxing 80e493d2b7 MAINTAINERS: Add maintainer for HiSilicon GPIO driver
Here add maintainer information for HiSilicon GPIO driver.

Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com>
Link: https://lore.kernel.org/r/1607934255-52544-3-git-send-email-luojiaxing@huawei.com
[Dropped some dead code when applying]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-12-16 21:57:27 +01:00
Luo Jiaxing 356b01a986 gpio: gpio-hisi: Add HiSilicon GPIO support
This GPIO driver is for HiSilicon's ARM SoC.

HiSilicon's GPIO controller support double-edge interrupt and multi-core
concurrent access.

ACPI table example for this GPIO controller:
Device (GPO0)
{
	Name (_HID, "HISI0184")
	Device (PRTA)
	{
		Name (_ADR, Zero)
		Name (_UID, Zero)
		Name (_DSD, Package (0x01)
		{
			Package (0x02)
			{
				"ngpios",
				0x20
			}
		})
	}
}

Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com>
Link: https://lore.kernel.org/r/1607934255-52544-2-git-send-email-luojiaxing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-12-14 10:10:27 +01:00