1 Commits (61647c77cb15354a329cbb36fe7a2253b36b51b1)

Author	SHA1	Message	Date
Chunyan Zhang	e3f05d3b18	clk: sprd: add divider clock support ... This is a feature that can also be found in sprd composite clocks, provide a bunch of helpers that can be reused later on. Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2017-12-21 15:00:52 -08:00