Jason Gunthorpe says:
====================
iommufd follows the same design as KVM and uses memory cgroups to limit
the amount of kernel memory a iommufd file descriptor can pin down. The
various internal data structures already use GFP_KERNEL_ACCOUNT to charge
its own memory.
However, one of the biggest consumers of kernel memory is the IOPTEs
stored under the iommu_domain and these allocations are not tracked.
This series is the first step in fixing it.
The iommu driver contract already includes a 'gfp' argument to the
map_pages op, allowing iommufd to specify GFP_KERNEL_ACCOUNT and then
having the driver allocate the IOPTE tables with that flag will capture a
significant amount of the allocations.
Update the iommu_map() API to pass in the GFP argument, and fix all call
sites. Replace iommu_map_atomic().
Audit the "enterprise" iommu drivers to make sure they do the right thing.
Intel and S390 ignore the GFP argument and always use GFP_ATOMIC. This is
problematic for iommufd anyhow, so fix it. AMD and ARM SMMUv2/3 are
already correct.
A follow up series will be needed to capture the allocations made when the
iommu_domain itself is allocated, which will complete the job.
====================
* 'iommu-memory-accounting' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
iommu/s390: Use GFP_KERNEL in sleepable contexts
iommu/s390: Push the gfp parameter to the kmem_cache_alloc()'s
iommu/intel: Use GFP_KERNEL in sleepable contexts
iommu/intel: Support the gfp argument to the map_pages op
iommu/intel: Add a gfp parameter to alloc_pgtable_page()
iommufd: Use GFP_KERNEL_ACCOUNT for iommu_map()
iommu/dma: Use the gfp parameter in __iommu_dma_alloc_noncontiguous()
iommu: Add a gfp parameter to iommu_map_sg()
iommu: Remove iommu_map_atomic()
iommu: Add a gfp parameter to iommu_map()
Link: https://lore.kernel.org/linux-iommu/0-v3-76b587fe28df+6e3-iommu_map_gfp_jgg@nvidia.com
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
OpenCSD version 1.4 is released with support for FEAT_ITE.
This adds a new packet type, with associated output element ID in the
packet type enum - OCSD_GEN_TRC_ELEM_INSTRUMENTATION.
As we just ignore this packet in perf, add to the switch statement to
avoid the "enum not handled in switch error", but conditionally so as
not to break the perf build for older OpenCSD installations.
Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Acked-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Suzuki Poulouse <suzuki.poulose@arm.com>
Cc: coresight@lists.linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20230120153706.20388-1-mike.leach@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
'DWARF unwind' 'perf test' can sometimes fail:
$ perf test -v 74
Couldn't bump rlimit(MEMLOCK), failures may take place when creating BPF maps, etc
74: Test dwarf unwind :
--- start ---
test child forked, pid 3785254
Problems creating module maps, continuing anyway...
Problems creating module maps, continuing anyway...
unwind: test__arch_unwind_sample:ip = 0x102d0ad4c (0x36ad4c)
unwind: access_mem addr 0x7fffc33128c8, val 1031c3228, offset 120
unwind: access_mem addr 0x7fffc33128d0, val 12427cc70, offset 128
<snip>
unwind: test_dwarf_unwind__krava_3:ip = 0x102b8768b (0x1e768b)
unwind: access_mem addr 0x7fffc3313048, val 7fffc3313050, offset 2040
unwind: access_mem addr 0x7fffc3313060, val 102b8777c, offset 2064
unwind: test_dwarf_unwind__krava_2:ip = 0x102b8770b (0x1e770b)
unwind: access_mem addr 0x7fffc3313088, val 7fffc3313090, offset 2104
unwind: access_mem addr 0x7fffc33130a0, val 102b87890, offset 2128
unwind: test_dwarf_unwind__krava_1:ip = 0x102b8777b (0x1e777b)
unwind: access_mem addr 0x7fffc3313108, val 10323a274, offset 2232
unwind: access_mem addr 0x7fffc3313110, val ffffffffffffffff, offset 2240
unwind: access_mem addr 0x7fffc3313118, val 102c08ed0, offset 2248
unwind: access_mem addr 0x7fffc3313120, val 1031db000, offset 2256
unwind: access_mem addr 0x7fffc3313128, val 7fffc3313130, offset 2264
unwind: access_mem addr 0x7fffc3313140, val 102b45ee8, offset 2288
unwind: '':ip = 0x102b8788f (0x1e788f)
failed: got unresolved address 0x102b8788f
unwind: failed with 'no error'
got wrong number of stack entries 0 != 8
test child finished with -1
---- end ----
Test dwarf unwind: FAILED!
We expect to resolve test__dwarf_unwind as the last symbol, but that
function can be optimized away:
$ objdump -tT /usr/bin/perf | grep dwarf_unwind
000000000083b018 g DO .data 0000000000000040 Base tests__dwarf_unwind
00000000001e7750 g DF .text 0000000000000068 Base 0x60 test_dwarf_unwind__krava_1
00000000001e76e0 g DF .text 0000000000000068 Base 0x60 test_dwarf_unwind__krava_2
00000000001e7620 g DF .text 00000000000000b4 Base 0x60 test_dwarf_unwind__krava_3
00000000001e74f0 g DF .text 0000000000000128 Base 0x60 test_dwarf_unwind__compare
00000000001e7350 g DF .text 000000000000019c Base 0x60 test_dwarf_unwind__thread
000000000083b000 g DO .data 0000000000000018 Base suite__dwarf_unwind
Fix this similar to commit fdf7c49c20 ("perf tests: Fix dwarf
unwind for stripped binaries") by marking the function as a global and
adding the 'noinline' attribute to it.
With this patch:
$ objdump -tT perf | grep dwarf_unwind
000000000083b018 g DO .data 0000000000000040 Base tests__dwarf_unwind
00000000001e80f0 g DF .text 0000000000000068 Base 0x60 test_dwarf_unwind__krava_1
00000000001e8080 g DF .text 0000000000000068 Base 0x60 test_dwarf_unwind__krava_2
00000000001e7fc0 g DF .text 00000000000000b4 Base 0x60 test_dwarf_unwind__krava_3
00000000001e7e90 g DF .text 0000000000000128 Base 0x60 test_dwarf_unwind__compare
00000000001e7cf0 g DF .text 000000000000019c Base 0x60 test_dwarf_unwind__thread
00000000001e8160 g DF .text 0000000000000248 Base 0x60 test__dwarf_unwind
000000000083b000 g DO .data 0000000000000018 Base suite__dwarf_unwind
$ ./perf test 74
74: Test dwarf unwind : Ok
Reported-by: Disha Goel <disgoel@linux.vnet.ibm.com>
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Link: http://lore.kernel.org/lkml/20230125123442.107156-1-naveen.n.rao@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
pci_enable_pcie_error_reporting() enables the device to send ERR_*
Messages. Since f26e58bf6f ("PCI/AER: Enable error reporting when AER is
native"), the PCI core does this for all devices during enumeration.
Remove the redundant pci_enable_pcie_error_reporting() call from the
driver. Also remove the corresponding pci_disable_pcie_error_reporting()
from the driver .remove() path.
Note that this doesn't control interrupt generation by the Root Port; that
is controlled by the AER Root Error Command register, which is managed by
the AER service driver.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: Tony Nguyen <anthony.l.nguyen@intel.com>
Cc: intel-wired-lan@lists.osuosl.org
Cc: netdev@vger.kernel.org
Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
pci_enable_pcie_error_reporting() enables the device to send ERR_*
Messages. Since f26e58bf6f ("PCI/AER: Enable error reporting when AER is
native"), the PCI core does this for all devices during enumeration.
Remove the redundant pci_enable_pcie_error_reporting() call from the
driver. Also remove the corresponding pci_disable_pcie_error_reporting()
from the driver .remove() path.
Note that this doesn't control interrupt generation by the Root Port; that
is controlled by the AER Root Error Command register, which is managed by
the AER service driver.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: Tony Nguyen <anthony.l.nguyen@intel.com>
Cc: intel-wired-lan@lists.osuosl.org
Cc: netdev@vger.kernel.org
Tested-by: Naama Meir <naamax.meir@linux.intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
pci_enable_pcie_error_reporting() enables the device to send ERR_*
Messages. Since f26e58bf6f ("PCI/AER: Enable error reporting when AER is
native"), the PCI core does this for all devices during enumeration.
Remove the redundant pci_enable_pcie_error_reporting() call from the
driver. Also remove the corresponding pci_disable_pcie_error_reporting()
from the driver .remove() path.
Note that this doesn't control interrupt generation by the Root Port; that
is controlled by the AER Root Error Command register, which is managed by
the AER service driver.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: Tony Nguyen <anthony.l.nguyen@intel.com>
Cc: intel-wired-lan@lists.osuosl.org
Cc: netdev@vger.kernel.org
Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
pci_enable_pcie_error_reporting() enables the device to send ERR_*
Messages. Since f26e58bf6f ("PCI/AER: Enable error reporting when AER is
native"), the PCI core does this for all devices during enumeration.
Remove the redundant pci_enable_pcie_error_reporting() call from the
driver. Also remove the corresponding pci_disable_pcie_error_reporting()
from the driver .remove() path.
Note that this doesn't control interrupt generation by the Root Port; that
is controlled by the AER Root Error Command register, which is managed by
the AER service driver.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: Tony Nguyen <anthony.l.nguyen@intel.com>
Cc: intel-wired-lan@lists.osuosl.org
Cc: netdev@vger.kernel.org
Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
pci_enable_pcie_error_reporting() enables the device to send ERR_*
Messages. Since f26e58bf6f ("PCI/AER: Enable error reporting when AER is
native"), the PCI core does this for all devices during enumeration.
Remove the redundant pci_enable_pcie_error_reporting() call from the
driver. Also remove the corresponding pci_disable_pcie_error_reporting()
from the driver .remove() path.
Note that this doesn't control interrupt generation by the Root Port; that
is controlled by the AER Root Error Command register, which is managed by
the AER service driver.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: Tony Nguyen <anthony.l.nguyen@intel.com>
Cc: intel-wired-lan@lists.osuosl.org
Cc: netdev@vger.kernel.org
Tested-by: Marek Szlosek <marek.szlosek@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
pci_enable_pcie_error_reporting() enables the device to send ERR_*
Messages. Since f26e58bf6f ("PCI/AER: Enable error reporting when AER is
native"), the PCI core does this for all devices during enumeration.
Remove the redundant pci_enable_pcie_error_reporting() call from the
driver. Also remove the corresponding pci_disable_pcie_error_reporting()
from the driver .remove() path.
Note that this doesn't control interrupt generation by the Root Port; that
is controlled by the AER Root Error Command register, which is managed by
the AER service driver.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: Tony Nguyen <anthony.l.nguyen@intel.com>
Cc: intel-wired-lan@lists.osuosl.org
Cc: netdev@vger.kernel.org
Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
pci_enable_pcie_error_reporting() enables the device to send ERR_*
Messages. Since f26e58bf6f ("PCI/AER: Enable error reporting when AER is
native"), the PCI core does this for all devices during enumeration.
Remove the redundant pci_enable_pcie_error_reporting() call from the
driver. Also remove the corresponding pci_disable_pcie_error_reporting()
from the driver .remove() path.
Note that this doesn't control interrupt generation by the Root Port; that
is controlled by the AER Root Error Command register, which is managed by
the AER service driver.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: Tony Nguyen <anthony.l.nguyen@intel.com>
Cc: intel-wired-lan@lists.osuosl.org
Cc: netdev@vger.kernel.org
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
pci_enable_pcie_error_reporting() enables the device to send ERR_*
Messages. Since f26e58bf6f ("PCI/AER: Enable error reporting when AER is
native"), the PCI core does this for all devices during enumeration.
Remove the redundant pci_enable_pcie_error_reporting() call from the
driver. Also remove the corresponding pci_disable_pcie_error_reporting()
from the driver .remove() path.
Note that this doesn't control interrupt generation by the Root Port; that
is controlled by the AER Root Error Command register, which is managed by
the AER service driver.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: Tony Nguyen <anthony.l.nguyen@intel.com>
Cc: intel-wired-lan@lists.osuosl.org
Cc: netdev@vger.kernel.org
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Selecting a symbol with additional dependencies requires
adding the same dependency here:
WARNING: unmet direct dependencies detected for MUX_MMIO
Depends on [n]: MULTIPLEXER [=y] && OF [=n]
Selected by [y]:
- SPI_DW_BT1 [=y] && SPI [=y] && SPI_MASTER [=y] && SPI_DESIGNWARE [=y] && (MIPS_BAIKAL_T1 || COMPILE_TEST [=y])
Drop the 'select' here to avoid the problem. Anyone using
the dw-bt1 SPI driver should make sure they include the
mux driver as well now.
Fixes: 7218838109 ("spi: dw-bt1: Fix undefined devm_mux_control_get symbol")
Fixes: abf0090753 ("spi: dw: Add Baikal-T1 SPI Controller glue driver")
Link: https://lore.kernel.org/all/20221218192523.c6vnfo26ua6xqf26@mobilestation/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/r/20230130140156.3620863-1-arnd@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
There are two big changes in this: one is to bump the #address-cells and
the #size-cells properties to 2 so that bus address translations work
correctly and another to sort nodes according to a scheme that we've
been trying to follow, but where some inconsistencies have accumulated
over the years.
As for the rest, this adds mostly new things on Tegra234, such as USB
host and device support and identification EEPROMs found on Jetson AGX
Orin.
Some cleanups are also included, such as the removal of unneeded
properties or duplicated nodes.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmPT+8ITHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoeasEACUpzao66vTI5wMw3S3DFuTyOF79xyI
W2N4Wh+geanrJwtwEEboJgVD8JcE3u2+6OATHN+jEJ6/dNsndsnBopfG3Mqj8PCj
hzVKi7eza/gdOFbFzGOwkPIyKRYNpNSU88tZhlOY33R7ou3dlr50AQsfOsR9p1c8
+WCVfXK7Vcy5yhWuyQgcBrComnuWFdP/wxGmEvtyJj2HbGjGshjpPXpkYfN0GqWj
DsoOUDQM6hNDWq+e3OzsvdjZkT6HuJvzUuQJVxP8cdsgYkBBgdeHOvv8QGe/1uRG
FsuuIngfVmYM1UhHC6+KsGkxkH4hd//LJtOdz7OKCjuLt6q1X2PNMOw7OkY0X6he
bilOHRvXp/Vy/MxPNzUU5BZQyaUu/NWj3PFtx2X3G7dNue3vK7bqHj27OvG96Whx
HmAjXgsQQGf87+jyhJQ/sr/x7uMdmZlQ302GYxiEDUp95enqR9nKWAKZSGpRZ4uO
trsN12MYv+YBtMj597r7j+UbMairWvx1loBxTrZPAWOLNGXhIfzPURO/xOyjbvMd
lxZ2V82VxJ4APRdjwdEl1NEet/Yi4EWq0uanqETjF72eL0Ah70W9gdJ/fowEqJCU
yt9bXU5BDc7fcwpSn5iX+PzsNGRyw2FrlLVyfOG6EHCwSSkEhqjCqHZF04hu+LBM
H5zfEeZLbHxdtQ==
=18G4
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX+3QACgkQmmx57+YA
GNnjSw//SV3ne6MY8JlT/ZZbSkd0AAnfUkp6uigVnG8ehd8Aq/UAK8ITebyC6/3X
xt1k/Y7rXIUxfcbk41Wj19bl+0fHODI+GAoWIBgU4aVIv8kg1K7cHj8xmbw4pWaE
C9sTi0pBYEeffCBBqmk/XRJ0IQ3iwr5YlehhHCdNYqeEa8OjgfN/Pg3KIogkGkru
+2Zn524HTILJC9swarhw7fwRFihLCkyVfo1Irr5RjvyqR4It58PGT8mPgoTg9TSC
nMUWdYmFPVqCMg57RWyFkkGTHHhtq32jPfj4De4/a1eQuqhqQc1Eba/LKxwI9lNi
uiCn2hoQpRSX1JMvzG07oMV1UVA+LbgUo8kOnNfgl62xd6nWRNoPTpjujrjkhmzF
7T0kGYRKUdDjlnMSFCXTYgIAcC7FykPfMhprBZLJFcj4gr9ahiW38GF5whxthmW/
5W7CvK6m0CqF2JJrpYgMhEQG1zcdhRKeaYQ/OKDoFLodLwCl/Hl0/JQkDMyzjUAM
azccCVATNp+8Nh6wGiuPj5Ru1IKcp4bUgJ8OWDAjuIV4un1+2frBatgCrB83p/5z
GQh/EZx8gF1e7t2dmvVZWf5jbfw0Nx0y286SwxYN0xrmvx0slMkG1kcujmlq7UoV
sVgXJnviF16GGnE6B60RTngrX3EMgXCgyhCl4tgy2jUyiInC3L4=
=ECwG
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v6.3-rc1
There are two big changes in this: one is to bump the #address-cells and
the #size-cells properties to 2 so that bus address translations work
correctly and another to sort nodes according to a scheme that we've
been trying to follow, but where some inconsistencies have accumulated
over the years.
As for the rest, this adds mostly new things on Tegra234, such as USB
host and device support and identification EEPROMs found on Jetson AGX
Orin.
Some cleanups are also included, such as the removal of unneeded
properties or duplicated nodes.
* tag 'tegra-for-6.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Drop I2C iommus and dma-coherent properties
arm64: tegra: Mark host1x as dma-coherent on Tegra194/234
arm64: tegra: Populate the XUDC node for Tegra234
arm64: tegra: Add dma-coherent property for Tegra194 XUDC
arm64: tegra: Populate Jetson AGX Orin EEPROMs
arm64: tegra: Populate address/size cells for Tegra234 I2C
arm64: tegra: Enable XUSB host function on Jetson AGX Orin
arm64: tegra: Sort nodes by unit-address, then alphabetically
arm64: tegra: Bump #address-cells and #size-cells
arm64: tegra: Sort includes
arm64: tegra: Fix duplicate regulator on Jetson TX1
arm64: tegra: Fix typo in gpio-ranges property
Link: https://lore.kernel.org/r/20230127163719.460954-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Just a single patch to properly sort nodes and make the DTS files easier
to read.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmPT+xITHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoSWvEACEjE3sBBpASOqfan8Gcf0JlToU/njR
TuMFOh2YLSdKiTLnp0ngq/PS9YmxgWT9CnVdB7HFxoiafnRPuDi5xpRSDlKaptfh
+7w1INOQTTFo+tgltx+HoFTHRUkR9C38+vKeks0DF/TenbMMtYZmvItZoGWqfXVR
gVA1g04twlnYw9k3WB+QIZNPEUF2PCJ+C5d3s9Uz+Zy9uzKMnFtUcNdhwduEkjEC
xoxv0wxDsG0HSR8DPjzcONhNUw0KrwQx61yulCMxMLB+3xkVc/QtKACL732G7u8N
sDXpyCgd4sDJv4/RUbYKhFU9wtX4cRgpT21RiiMAgju+AHY7bbMHwkQARYVOugKA
+Z5XbGbI8bdNe4EeOPuGQYxPtoRmTc4o8PbbqDJpWZmSJVWuSQr8Cw0mWaap/w77
zDilzftDs2oWR/0QDSycULDOpstDZ0Cc2aCk5QFINOdI3h6QL0496zMAkLAzDmir
ycwq4+kmjbdNjo+Z/A2ZOzh2qItx/CdtN1WdejPw+yLtq3w+1H3uMeMZTJVFktj3
whxA3IhiLf4axw7qzwIL8ekRNUfrfJFouc3gcLXIXonho5COjhHqU+yR+3VG5HRg
pEXWH3Go8wox1wqb07iEy3k0YqMCl9CVLQegYSkOHeJ6q3G/EfnKbKKtfRxNDcU5
Zk8kquz4pA4Tkw==
=aBEY
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX+0UACgkQmmx57+YA
GNmWkA/9H+I/U6q00ZQ1NFIEusZpmj+UVCX4Qh4OWPbXpap0tshN2qJiOJoi1pN/
Sqx/Yqyo42jIvg7OSDiWn/YHjr3LZd6q5KMDccKLA+2o/mlMFQcSsliBh/cUTnf+
+gT613DxEBes/TXOI6XvvNrBQAgxAiKlvwSpTbwlZ0LLP6IWXv2ZKvn+jF6lvDYn
ixZqdJwoVcD0ryChLXH591TQuf93VYTkqpL3glhPK7ZZfCllE1JQUZY14vGon4Mk
W8jV+/PcQJxKYOZ4SKK19KMoBSDb51gMhfAXOFlPDXG8zqc1uvjl1XPy0Xk87hUU
nU2D4x+nbya7YqFhXHy56C2v0jxZVDpCTFQecsT8HaelYLOnfIfPknLrd0CiLfr0
S7BQ9l4Jl9yDn4Z/2pA/AmV3ljgeFK4n7CSS09ZPKBWfCPXH1mu6VfmT07IhYcnI
MzityXpDfngSWjRVyS7t93kGtWz8eue7xNBHtx9xnfFp4xDEA3QBevfKtNcIkIM6
vLl3/3Kw8GUXBFCyzm8dZ8ZWhWhMjcfqVJNXI3v9s/+nFz71EEVzB+ng7H5DoD/I
MXp2UhK4e/E0CvpWbEji3O7LkZGObvOk8ZfqdnFU7AaspUQGyJYHxz/9Rn5kqEtb
euME6D2cyQnnOGXYxB0SUNzqKlDKd4SdSl0W7dfJE0E+IVe1pUI=
=/d/t
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.3-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v6.3-rc1
Just a single patch to properly sort nodes and make the DTS files easier
to read.
* tag 'tegra-for-6.3-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Sort nodes by unit-address, then alphabetically
Link: https://lore.kernel.org/r/20230127163719.460954-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Device tree files for 64-bit ARM Tegra SoCs have recently had to bump
the #address-cells and #size-cells to 2 in order to support bus address
translations across the entire device tree hierarchy. Explicitly allow
this in DT schemas to prevent validation errors.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmPT+t8THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zodtAD/982iXxB28/JExAo0Kj4t6qO7KIX6ot
a0J0a8Vw8wYNb6KABvy2xJ/Qh4/h8L607VePI7yQ4Sqi/tZB8k6v627CGRRHnulK
U64CIC+lvgPPTTHsRR8gbWO1L7va7KGGALCZQ9H7vLEUAqsu8YeRRVoXstQeL9P8
l1FwGarHgrBe2vgBhtfSkSNgUBF3YD37oQef14WxtEFn+rREao0nbMLbI2P7c66Y
GY2pqmy8XWE9YEmtknotDd4k/viFT+KjRqrDjw0yer8ejaG2Yb3oocjAg/FMMTpY
erP4kqHFD9iNuD51GC75zGEOQieP+ljlMD6V7DxZm9qMRrPx69e11JKdqfgM0cEO
Q3F6ecEBMXD918YUgORaH4CjokugA7HOkeAf6nIyoKr2CIU1jQgEcJUYMBoRG/X+
NP4VIHceiEcli3hTP3jLfVGDXoW/EEb//G43fw2tNG26ykx7ihH5TGWOHxR71iBT
Qhu+2A4L6EOrfVZdTyPYlVU3aTUh40rzhcjt3tTM+bjtjjlMt2+XgD2wRwKOxgrv
kVwy607BDExuYeS4/K6fYTKesgXOpCTMC7Z6oFQ/d5PllWJr/RjbSvgWZALhvmRK
hwLNi3HNFCYRkcPu8Ks+x0LJSno7zbxblEtLXtPB0FgcCtAAukcw+L/Vghydzelv
Z20VJhK3yl2noA==
=wVQZ
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX+ygACgkQmmx57+YA
GNl64A/+OMHgtbL3kslG0f2FgSUfQZ944bCrdvS/IU/kA5Tedu78cnZOZi4XZWsO
FqeIGjETNagiqVwihDwoJSXVHlZDWZP7UFHyoxmMaaORSEuwEkhLd5YLWW7BPktw
l/BjW3jV1IGMH4rOWwbCdTL+f3Rd0W/fO6BpsG7kNsPxw4jZfwuLZ5q6TUz801ow
nlKO/qMFNbdNAEE63k7DJsUAUHBT817TWr9nCHGH+Ok/sLOvR+6P7Kl5jkOThxNe
IEHT/kEy0LIITN4AVUSnsHE+wcsmn8LlC1AGALTpg8IpER6vRnlhuwwdteSsh+V6
dIWx44f1ntP3gmSYbB/KUxIWmqQwJsAFZvqiRet3CBNQtfnZXhB9CEYQrUlXDyNi
tI92NI+SG5z8dgiJqvrn8lk4hplP2WGgJiRBhM2osxQMGQ3FzBac01sPlDuRGcRt
NgjvoOc7krtsL9nHe3VmJfvSybpS020XVCuibLwbu7VbOQkBbAj8qbTLq/DQzb5l
OCMaBgLXNN4TOjhn9KvX/MxmCWoKHZg8yENiW3PlxXR1248TMyo/HDx6nTBD0JyU
Xc5UIxNRRkVmbtThq7caRjNR6VliKT4tziGsGUmZ/rAYnEepJl1T7t4sFoBpU0NT
VtmSVsgXDZfj42c8S9bXaUi6Q0UMhqetu3uX7Ko7eBhv4Myz2HY=
=AcTG
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.3-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v6.3-rc1
Device tree files for 64-bit ARM Tegra SoCs have recently had to bump
the #address-cells and #size-cells to 2 in order to support bus address
translations across the entire device tree hierarchy. Explicitly allow
this in DT schemas to prevent validation errors.
* tag 'tegra-for-6.3-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: tegra: Allow #{address,size}-cells = <2>
Link: https://lore.kernel.org/r/20230127163719.460954-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- High Performance mode (1.8 GHz) support for the Cortex-A76 CPU cores
on R-Car V4H,
- GPIO interrupt support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK
development board,
- USB Function support for the RZ/N1D SoC,
- Generic Sound Card driver examples for the Renesas R-Car Starter Kit
Premier/Pro and Shimafugi Kingfisher development board stack,
- Universal Flash Storage support for the Renesas Spider development
board,
- External Power Sequence Controller (PWC) support for the RZ/V2M SoC
and the RZ/V2M Evaluation Kit 2.0,
- IOMMU support for MMC on the R-Car S4-8 SoC,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCY9Oc1QAKCRCKwlD9ZEnx
cMRKAP0S0VgkOJU9n+qrDdFNYeCAwLkJbcpWMsc4xy/dxt1gIQEAxbnJpGcmdAis
qiY67N7RU8mST1R7QACUEcvygxvqLwI=
=dAM5
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX+vEACgkQmmx57+YA
GNk6hA//Xbr/6Ey1bGx6jweljSEvLpOZkMCKiprOlJ7aaKM3SXfO2BK447zADtar
D9ooowc/IHBt4DNltVsAol5dm6QgQjcrs4+S04qFsdPtEtEmy59JS7e4m3BWKlTe
AJucF5A8g9HACAYs3zq6iEK8gGnJU2qW1ysiU03ypf9ctfDsir8eWgzCV0P3lgmr
1Rb29ZG0m661ucDNFM5tGOMpJ3yFGgAx1YnNtdn2XMOs3txFZ9hS0lPAOaBd7Wmj
hBDxJPWye7BG3zAo8vCYPDZcvDgl4iGKpmqHJ+p5fA5tD/od/tpyM/ih94pzv9iW
8yqpaIUNpwZ7VD1wITVxWXUOqubNyXo5f5dqWwjcOkp2toc+xn2gJFPD3ffsjghT
YmvRlglaOUHt09Koinb0SYrNBhGnN2qtYYfZzvRWJZmAhT/gzH16/ezuoI9DMy26
cwO8DsXMLA9QKxKVyzq9Y+9gKRXj6dtJhEjUheax/AfeW2q4Bs9fVG4bSw9LLYb4
vSVRIgBhojWvCA/t0vt1tmK+Nw5abm+m3Mfiq8E6rmR5yWqRmoN3mHaUNs4XOllI
sGd4NtO1uqM/SbovLMkccw4NaU0wUdcnYtKsem7dl1Jo5yWUbg8EGh6jRXdtILEt
SLRrc5NkG4kEbGRqSQ9ieINdw3bWUn2kOLbKcWFDwtqzkq6Ucqk=
=YAr2
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.3-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT updates for v6.3 (take two)
- High Performance mode (1.8 GHz) support for the Cortex-A76 CPU cores
on R-Car V4H,
- GPIO interrupt support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK
development board,
- USB Function support for the RZ/N1D SoC,
- Generic Sound Card driver examples for the Renesas R-Car Starter Kit
Premier/Pro and Shimafugi Kingfisher development board stack,
- Universal Flash Storage support for the Renesas Spider development
board,
- External Power Sequence Controller (PWC) support for the RZ/V2M SoC
and the RZ/V2M Evaluation Kit 2.0,
- IOMMU support for MMC on the R-Car S4-8 SoC,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.3-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (25 commits)
arm64: dts: renesas: r8a779f0: Add iommus to MMC node
arm64: dts: renesas: v2mevk2: Add PWC support
arm64: dts: renesas: r9a09g011: Add PWC support
arm64: dts: renesas: r9a09g011: Reword ethernet status
arm64: dts: renesas: r8a774[be]1-beacon: Sync aliases with RZ/G2M
arm64: dts: renesas: beacon-renesom: Fix audio clock rate
arm64: dts: renesas: beacon-renesom: Update Ethernet PHY ID
arm64: dts: renesas: beacon-renesom: Fix gpio expander reference
arm64: dts: renesas: spider-cpu: Enable UFS device
arm64: dts: renesas: Add ulcb{-kf} Simple Audio Card MIX + TDM Split dtsi
arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card MIX + TDM Split dtsi
arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card2 MIX + TDM Split dtsi
arm64: dts: renesas: Add ulcb{-kf} Simple Audio Card dtsi
arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card2 dtsi
arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card dtsi
arm64: dts: renesas: #sound-dai-cells is used when simple-card
ARM: dts: renesas: #sound-dai-cells is used when simple-card
arm64: dts: renesas: eagle: Add SCIF_CLK support
ARM: dts: r9a06g032: Add the USBF controller node
arm64: dts: renesas: rzg2ul-smarc-som: Add PHY interrupt support for ETH{0/1}
...
Link: https://lore.kernel.org/r/cover.1674815099.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
struct snd_soc_dobj only needs pointer to the unload function, instead
however, there is pointer to all topology operations. Change code to use
the function pointer instead of pointer to structure containing all
operations.
Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20230127231111.937721-12-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Functions removing bytes, enum and mixer kcontrols are identical. Unify
them under one function and use it to free associated kcontrols.
Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20230127231111.937721-11-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Caller already checks if hdr_pos is behind EOF, before calling
soc_tplg_valid_header(), so there is no need to recheck it again. This
also allows to remove behaviour of return 0 - forcing the caller to
break out of while loop.
Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20230127231111.937721-10-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Function soc_tplg_dapm_complete() detects an error and logs it, but
doesn't return failure to the caller, fix it by returning the error.
Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20230127231111.937721-9-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Instead of passing address of structure, the containing structure is
cast to target structure. While it works - the expected structure is the
first field of containing one - it is bad practice, fix this by passing
pointer to structure field.
Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20230127231111.937721-8-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
There is no need to forward declare functions if their use is after
their definition.
Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20230127231111.937721-7-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Those are the only functions missing soc_tplg_ prefix, add it for
consistency.
Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20230127231111.937721-6-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Functions other than soc_valid_header have soc_tplg_ prefix. Rename
function to follow convention in file.
Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20230127231111.937721-5-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Topology is being abbreviated to "tplg", not "tplc", however, few
functions have typo in name, fix it.
Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20230127231111.937721-4-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The constant is unused, so it can be safely removed.
Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20230127231111.937721-3-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This introduces support for the new Snapdragon 8 Gen 2 (SM8550)
platform. In addition to the adding support for the MTP on this
platform, support the following devices is introduced:
- GPLUS FL8005A
- Google Zombie with LTE and NVMe
- Google Zombie with NVMe
- Lenovo Tab P11
- Motorola G5 Plus
- Motorola G7 Power
- Motorola Moto G6
- Samsung Galaxy J5 (2016)
- Samsung Galaxy Tab A 8.0
- Samsung Galaxy Tab A 9.7
- Xiaomi Mi A1
- Xiaomi Mi A2 Lite
- Xiaomi Redmi 5 Plus
- Xiaomi Redmi Note 4X
On IPQ8074 the PCIe PHY register regions and PHY clock names are
corrected.
On MSM8916 DMA for the I2C controllers are introduced and blsp_dma is
unconditionally enabled. Per-sensor calibration data is provided for the
thermal sensor (tsens) block. The GPLUS FL8005A device is introduced and
gains support for touchscreen and flash LED. An additional Samsung
Galaxy J5 variant is added, and support is added for hall sensor and
MUIC.
Per-sensor calibration information is introduced for the thermal sensor
on MSM8956 as well.
On MSM8996, GPLL0 is added as a possible Kryo clock controller input, a
carveout is added to get modem metadata out of System RAM. Missing bus
clocks are added for agnoc2.
SDHCI1 is enabled on the Sony Xperia Tone platform and USB is limited to
high-speed, to make USB work.
MSM8998 gains the same modem carveout as other platforms, and the
description of the clock hierarchy is improved.
On QCS404 the clock hierarchy description is improved, the CDSP PAS node
is adjusted to match the binding and the thermal sensor (tsens) gains
per-sensor calibration information.
On SC7180 the Data Capture and Compare block is intorduced, and a
carveout for the modem metadata is introduced, to get this out of System
RAM. Pazquel360 gains touchscreen support, the regulator off-on-time is
adjusted for the Trogdor eDP and touchscreen.
Data lane and frequency properties are introduced for the DisplayPort
links.
SC7280 also gets Data Capture and Compare support, as well as the
dedicated modem metadata region. Herobrine gains DP audio support.
IPA description is updated so that it's only active on boards with a
modem.
On SC8280XP the display subsystem is introduced, currently with support
for most of the DisplayPort controllers. GPR, SoundWire and LPASS is
introduced, for audio support. Missing I2C and SPI controllers are
introduced.
Support for EDP is introduced for the CRD, the Lenovo ThinkPad X13s and
the SA8295P ADP automotive board. The SA8540P Ride platform enables one
i2c and pcie controllers.
A CMA region is defined for the CRD and X13s, to avoid allocation issues
from the NVMe support.
Fairphone FP3 gains NFC support and the Sony Xperia Nile platform gains
a description of simplefb.
SDM670 gains QFPROM definition.
SDM845 gains a carveout for the modem metadata and support for the Data
Capture and Compare block is introduced. Lenovo Yoga C630 firmware
paths are aligned with all other Qualcomm platforms.
On SM6125 apss SMMU is introduced and streams are defined for USB and
SDHCI controllers. GPI DMA description is introduced, as well as missing
SPI and I2C serial engines.
On Sony Xperia 10 IIa regulator definitions are improved, SDHCI2 is
introduced, and I2C and related GPI DMA blocks are enabled.
On SM6350 IPA is introduced. DDR and L3 scaling is introduced based on
CPUfreq.
Fairphone FP4, on SM7225 also has IPA enabled, and the Flash LED is
enabled as well.
On SM8150 the display subsystem is introduced, with clock controller,
DPU and two DSI controllers. The Data Capture and Compare block is
introduced.
For the Sony Xperia Kumano platform, GPIO keys and NFC support is
introduced.
For SM8350 PCIe is introduced, as is the display subsystem with display
clock controller, DPU and two DSI controllers. #interconnect-cells is
changed to 2, to align with other platforms and allow for active-only
votes. The display is enabled and the LT9611uxc found on the SM8350
Hardware Development Kit board is described, to provide HDMI output.
On SM8450 the display subsystem is introduced, with DPU and two DSI
controllers. GIC-ITS support is introduced for both PCIe0 and PCIe1.
SPMI bus support is introduced and pmics are wired up across the various
devices.
The display subsystem is enabled and the LT9611uxc is described to
provide HDMI output on the SM8450 Hardware Development Kit.
On Sony Xperia Nagara platform, GPIO keys and GPIO line names are
introduced. As is the SLG51000 PMIC and camera regulators are defined.
Support for SM8550 is introduced, with support for storage, USB,
remoteprocs, PCIe, low-speed buses, crypto and display subsystem. These
blocks are enabled on the MTP.
Lastly, the work continue to align Devicetree source with bindings
across all platforms.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmPS4ZcVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FRwEP/2QtUk6NbjqnxdzEXYlwb8WCVnH+
IZgdKWB2JLezXWCiKiKzmQVKVkTHXuuM7PHhojuO3Ye98/wPVA2nL79AL+jA2Ict
k54SwCQ0PP9PpuptH351eXE/sh60nP97zsZ82V7oLfN/HdP5yAjR6Kc/iSpcdQZm
nWNrHchuKAmpb6AitI7xGxy6D5quWh/8SgfI8sJ9SDxsOMhWXptV/Jgqy+nmOAJY
FOMb7Y83sWgOXP77lW3T5+vfMkgPGtLD3EicMB/4HEMyDAVnWgRVzfvJ1qJsEv27
I2K+cmqPCGcXJ9H1sYcvjXF/l0k1VqBXZMQZah2Ox/BnrBlt61iKGOHXZFPiYLt3
Sg2fwqKaCNo/TdR37ZCLM5EEmqq94pD5llGVOW6JZzoExWrEgFNRdVqjIfqqNaUq
+7aU7eUS2EfmiIyRPX7B3F33vz9v18fU1Z7b2n8qI/kH9rRpQAIfhJrpbTgSf9vL
hPQ7ukkBqpzYryKaSmpgmkRCHGrWE97XZn3U1Gb8Fk7fW90jAWQVAYQHD8xowJ8F
NxPv2E3YbgFxsFls6miVPYd1n88mN0QGJUZvQBYxtDahtw/BA9Ti62cYw1GH3lIx
fT/lficEsX/oNLaKaHo3C8160iX0XQMeWYRzZOEs00MfStVjgtNsPxB7yhNf7e1Q
MSnwJcsJzHMB29Zu
=I+bB
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX9fAACgkQmmx57+YA
GNkFhQ/7BuSIIp1HwWB6zbAj6ex9LMlTFShJISmw6QhK9eBiEophMw3NAiP/zU3M
CgHp8jRK02/hHK7q113I0zVvPwz44BX8LtGmtiodnSAygzb68JALhoP3r6K53gdo
+6VJYmTiQ0Ft5BVzlBKlqX67Yp5IefvJv5enqE31OI7o8tTHCOnh7ldLqTqp1Iep
QMrTmqY5wyYOyIBxNYMtI+TZWOabjVz3ftx7atqc9FoRco6Q2nhyM1TFoFbf4KQD
EOyN2lsDsy5h+A4l70MIn2A0+jA9W/d9P1JMEA0Xzd5WvWa66HKxuMxnfJRlXuD9
nTYSBBqpMKXqKh3EbmhiXNuCML4Ia6o9yWpzi2Y3h5wfOv5AmM+JGyPTyzBDS3ZR
bvm0IX3G/m7kuS+4pPD0P0+If281q2oR/JjXSOn1Y8Ew/6ACW8o3sIUh2xGIY6Gv
OPL1l0CKokhB8Fmcw352oN51m6IQGAVVggqaSp7/HP76M99h/I32cn2Zzz7tvz/y
ClxAcW5iV3H7cFCNeJVTjzrEZv+LIjmHDEgSFtYuUeNmFUurkTcsFryBm9mTaD8u
mx1HpqbRUMMTuAmvzLhRlLhHwSuTn1OmB8+1ObUHSxcgKKw+T4u6iz40qRFCzmVl
129xys8RtAXjShu0j2lEntCUMqeMWDpIOTaUqrBzFWnW0fBa/Vs=
=E5w0
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 Devicetree updates for v6.3
This introduces support for the new Snapdragon 8 Gen 2 (SM8550)
platform. In addition to the adding support for the MTP on this
platform, support the following devices is introduced:
- GPLUS FL8005A
- Google Zombie with LTE and NVMe
- Google Zombie with NVMe
- Lenovo Tab P11
- Motorola G5 Plus
- Motorola G7 Power
- Motorola Moto G6
- Samsung Galaxy J5 (2016)
- Samsung Galaxy Tab A 8.0
- Samsung Galaxy Tab A 9.7
- Xiaomi Mi A1
- Xiaomi Mi A2 Lite
- Xiaomi Redmi 5 Plus
- Xiaomi Redmi Note 4X
On IPQ8074 the PCIe PHY register regions and PHY clock names are
corrected.
On MSM8916 DMA for the I2C controllers are introduced and blsp_dma is
unconditionally enabled. Per-sensor calibration data is provided for the
thermal sensor (tsens) block. The GPLUS FL8005A device is introduced and
gains support for touchscreen and flash LED. An additional Samsung
Galaxy J5 variant is added, and support is added for hall sensor and
MUIC.
Per-sensor calibration information is introduced for the thermal sensor
on MSM8956 as well.
On MSM8996, GPLL0 is added as a possible Kryo clock controller input, a
carveout is added to get modem metadata out of System RAM. Missing bus
clocks are added for agnoc2.
SDHCI1 is enabled on the Sony Xperia Tone platform and USB is limited to
high-speed, to make USB work.
MSM8998 gains the same modem carveout as other platforms, and the
description of the clock hierarchy is improved.
On QCS404 the clock hierarchy description is improved, the CDSP PAS node
is adjusted to match the binding and the thermal sensor (tsens) gains
per-sensor calibration information.
On SC7180 the Data Capture and Compare block is intorduced, and a
carveout for the modem metadata is introduced, to get this out of System
RAM. Pazquel360 gains touchscreen support, the regulator off-on-time is
adjusted for the Trogdor eDP and touchscreen.
Data lane and frequency properties are introduced for the DisplayPort
links.
SC7280 also gets Data Capture and Compare support, as well as the
dedicated modem metadata region. Herobrine gains DP audio support.
IPA description is updated so that it's only active on boards with a
modem.
On SC8280XP the display subsystem is introduced, currently with support
for most of the DisplayPort controllers. GPR, SoundWire and LPASS is
introduced, for audio support. Missing I2C and SPI controllers are
introduced.
Support for EDP is introduced for the CRD, the Lenovo ThinkPad X13s and
the SA8295P ADP automotive board. The SA8540P Ride platform enables one
i2c and pcie controllers.
A CMA region is defined for the CRD and X13s, to avoid allocation issues
from the NVMe support.
Fairphone FP3 gains NFC support and the Sony Xperia Nile platform gains
a description of simplefb.
SDM670 gains QFPROM definition.
SDM845 gains a carveout for the modem metadata and support for the Data
Capture and Compare block is introduced. Lenovo Yoga C630 firmware
paths are aligned with all other Qualcomm platforms.
On SM6125 apss SMMU is introduced and streams are defined for USB and
SDHCI controllers. GPI DMA description is introduced, as well as missing
SPI and I2C serial engines.
On Sony Xperia 10 IIa regulator definitions are improved, SDHCI2 is
introduced, and I2C and related GPI DMA blocks are enabled.
On SM6350 IPA is introduced. DDR and L3 scaling is introduced based on
CPUfreq.
Fairphone FP4, on SM7225 also has IPA enabled, and the Flash LED is
enabled as well.
On SM8150 the display subsystem is introduced, with clock controller,
DPU and two DSI controllers. The Data Capture and Compare block is
introduced.
For the Sony Xperia Kumano platform, GPIO keys and NFC support is
introduced.
For SM8350 PCIe is introduced, as is the display subsystem with display
clock controller, DPU and two DSI controllers. #interconnect-cells is
changed to 2, to align with other platforms and allow for active-only
votes. The display is enabled and the LT9611uxc found on the SM8350
Hardware Development Kit board is described, to provide HDMI output.
On SM8450 the display subsystem is introduced, with DPU and two DSI
controllers. GIC-ITS support is introduced for both PCIe0 and PCIe1.
SPMI bus support is introduced and pmics are wired up across the various
devices.
The display subsystem is enabled and the LT9611uxc is described to
provide HDMI output on the SM8450 Hardware Development Kit.
On Sony Xperia Nagara platform, GPIO keys and GPIO line names are
introduced. As is the SLG51000 PMIC and camera regulators are defined.
Support for SM8550 is introduced, with support for storage, USB,
remoteprocs, PCIe, low-speed buses, crypto and display subsystem. These
blocks are enabled on the MTP.
Lastly, the work continue to align Devicetree source with bindings
across all platforms.
* tag 'qcom-arm64-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (320 commits)
arm64: dts: qcom: sc7280: Add a carveout for modem metadata
arm64: dts: qcom: sc7180: Add a carveout for modem metadata
arm64: dts: qcom: sdm845: Add a carveout for modem metadata
arm64: dts: qcom: msm8998: Add a carveout for modem metadata
arm64: dts: qcom: msm8996: Add a carveout for modem metadata
arm64: dts: qcom: ipq8074: correct PCIe QMP PHY output clock names
arm64: dts: qcom: ipq8074: fix Gen3 PCIe node
arm64: dts: qcom: ipq8074: set Gen2 PCIe pcie max-link-speed
arm64: dts: qcom: ipq8074: correct Gen2 PCIe ranges
arm64: dts: qcom: ipq8074: fix Gen3 PCIe QMP PHY
arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY
arm64: dts: qcom: sdm845-db845c: drop label from I2C controllers
arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input
arm64: dts: qcom: sm8450: Allow both GIC-ITS and internal MSI controller
arm64: dts: qcom: sm8550-mtp: Add USB PHYs and HC nodes
arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes
arm64: dts: qcom: sm8250: drop unused properties from tx-macro
arm64: dts: qcom: sm8250: drop unused clock-frequency from wsa-macro
arm64: dts: qcom: align OPP table node name with DT schema
arm64: dts: qcom: rename mdp nodes to display-controller
...
Link: https://lore.kernel.org/r/20230126202528.3691539-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
CONFIG_VFIO_MDEV cannot be selected when VFIO itself is
disabled, otherwise we get a link failure:
WARNING: unmet direct dependencies detected for VFIO_MDEV
Depends on [n]: VFIO [=n]
Selected by [y]:
- SAMPLE_VFIO_MDEV_MTTY [=y] && SAMPLES [=y]
- SAMPLE_VFIO_MDEV_MDPY [=y] && SAMPLES [=y]
- SAMPLE_VFIO_MDEV_MBOCHS [=y] && SAMPLES [=y]
/home/arnd/cross/arm64/gcc-13.0.1-nolibc/x86_64-linux/bin/x86_64-linux-ld: samples/vfio-mdev/mdpy.o: in function `mdpy_remove':
mdpy.c:(.text+0x1e1): undefined reference to `vfio_unregister_group_dev'
/home/arnd/cross/arm64/gcc-13.0.1-nolibc/x86_64-linux/bin/x86_64-linux-ld: samples/vfio-mdev/mdpy.o: in function `mdpy_probe':
mdpy.c:(.text+0x149e): undefined reference to `_vfio_alloc_device'
Fixes: 8bf8c5ee1f ("vfio-mdev: turn VFIO_MDEV into a selectable symbol")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20230126211211.1762319-1-arnd@kernel.org
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Microchip:
A vendor prefix for Aldec and both a binding and Devicetree for the
Aldec TySoM devkit for PolarFire SoC. This Devicetree corresponds to
what they are shipping in the SDK for rev2 boards.
StarFive:
Just the binding for the new StarFive JH7110 SoC and its first-party
SDC the VisionFive 2.
Other:
I was expecting the Devicetree for the aforementioned board to be ready
for this window, as the pinctrl driver had seem some review prior to
v6.2 and both it & the base clock drivers are heavily based on the
existing drivers for the JH7110.
That didn't come to be.. Christmas, the RISC-V Summit in December and
the Lunar New Year all playing a part perhaps.
Because of that, both Palmer and I have the Kconfig.socs work in our
branches, although in hindsight it probably wasn't needed here as I
only added the TySoM Devicetree & the conflict would've been trivial.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY9EPgwAKCRB4tDGHoIJi
0l9kAQDJHyrjfXMooRHSFXRUsJFYeN8MpYvD1CLavdrD+Pu+KQD/c1sApjfZrKjo
ItyEL37F2QJOAFY1rAxdB7d6ppsUEAQ=
=sN4y
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX9PcACgkQmmx57+YA
GNn4Xg/+MykVFbZuQZbFuzD9DNA3BnHJuJL+5Uz1Ywy9H+Katl4hQGRLlt4WtRzC
fWuteoPmNwvsbxuDRQ3sDC2oqRFVFD45u/q7qQ4ce+dKDbL2qpnbgxdmXVXdJrgL
e9Wb9V01j8vLimNvFspicnaajFwDEC1uGLbVaZ+RKEk6GxxlJEJqydUsa2FVbQIf
QDMEtR967fI3CUZ2wvzplJDDGBBKZbXxuZ/tOaTwEGPKFxbzQ5CBP7CFkbfEEjTZ
kbcHsfLloKLL1/11oBeR6aPhY1WQvecBHO9WZ3ANR+/+2GT9SLdPbCWQN+uWM9ZI
B5/SvtvJhzyP6HG+ErX/Pc8NPjm6AKMoo6j8fLuy8pASJF+H3tV9bn9mj4ld6B1S
Vz8D1/hoh7OIuEaRDdfzW8xHQS6qQF58MRS3J8+I3xTUs4ZP6JifnOdIcrbXYvup
+SFRgtoewV4wMxPshM+5FsVqsE4xSnvdwZeuxIjqpFY/CvlubFJdT9FBx8tx+v+G
rC7MtoggznsQi1BDShGbu0xNAmE6iJcv9mranFm6NQUXC5/1SObIA9RFb0aBBJoQ
DsU1rDqWndh9bILZkoikpPQ0uZWwAOFRpp44CSZ6/YtYPDku99YWozxqCeGGw4gN
V18SjBXgL9YZfQKH3Z0biOdv6m2vLJKoj5hxgzu0KFxbCFlrl+A=
=SCZP
-----END PGP SIGNATURE-----
Merge tag 'riscv-dt-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into arm/dt
RISC-V Devicetrees for v6.3-mw0
Microchip:
A vendor prefix for Aldec and both a binding and Devicetree for the
Aldec TySoM devkit for PolarFire SoC. This Devicetree corresponds to
what they are shipping in the SDK for rev2 boards.
StarFive:
Just the binding for the new StarFive JH7110 SoC and its first-party
SDC the VisionFive 2.
Other:
I was expecting the Devicetree for the aforementioned board to be ready
for this window, as the pinctrl driver had seem some review prior to
v6.2 and both it & the base clock drivers are heavily based on the
existing drivers for the JH7110.
That didn't come to be.. Christmas, the RISC-V Summit in December and
the Lunar New Year all playing a part perhaps.
Because of that, both Palmer and I have the Kconfig.socs work in our
branches, although in hindsight it probably wasn't needed here as I
only added the TySoM Devicetree & the conflict would've been trivial.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: microchip: add the Aldec TySoM's devicetree
dt-bindings: riscv: microchip: document the Aldec TySoM
dt-bindings: vendor-prefixes: Add entry for Aldec
RISC-V: stop directly selecting drivers for SOC_CANAAN
RISC-V: stop selecting SiFive clock and serial drivers directly
RISC-V: stop selecting the PolarFire SoC clock driver
RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO
RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN
RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board
Link: https://lore.kernel.org/r/Y9LP+Za1h0fkBa58@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces support for Acer Iconia Talk S A1-724
The Samsung Galaxy Tab 4 10.1 gains ADSP and backlight support.
The Xperia Z2 Tablet gets charging enabled and the touchscreen is given
a little bit more time to start up.
APQ8064 and MSM8974 gains improvements in clock hierarchy. APQ8064
thermal sensor (tsens) driver gains per-censor calibration data.
Lastly a set of patches that improves DT binding compliance.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmPSvIoVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FUC8QAK22GnSpj06z446YMwQ9/unEkzOq
uKDuDmRUbLtxmMjtZNXTBHOWiDKojagURR8zqUlRuwrCw2z+EEkbpttC13UJx8fV
jhXJ9Ha7GoMK5ZNopQeVx5/0zyraAlxRJsN3A+QJlCNFlumXRADLQrKRqOFeDuY6
/ny1Q+lDXI4uUfHS6VFDIUEyN1n2XziYwuzgI4Kjr0H8SxFBgZjjEyHlUnXcCxrQ
owb+0JtOiSBLIlqy9Dk8c28W3VXk9rgTn8EzqyPlpslo698gcZ+v5wFSRyWFG+uX
w4lFqBTkmBR/vLvnYU/aF2UOHBWsxjNn+L8XWuqcOgVChzVRkWkigqJkULjSTq6T
0s0txudV4T6+DN3aTfIJI6160kl+4p7BI9TKpn9Y1PABWDIKEvYCSVdWUfYUZS/0
li8cNU/lbE93Bmp59BUx1BfP1am/QVqcP+NX6EieARTB5thRXuLMcLgyz43budxa
bnyS5cPkoD9kKFp+JGToemEGSixebUDrecXImLJiiLRr3CPDY74oVOYH5IwoFAbi
VsUGMmVJhsBrvd0DIdEAooY/qRfSOGV9ICXpTJ+JbIS+19W0fSGFh2+4G3FZlCph
8iVuxFb/7H1da/4+omiydvVIYvtrPtxNkBxnn6N8JvUz3WHHQvEp4FxiN3wgPblh
NyKVzJ5j3r32VZ6E
=vojt
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX9IQACgkQmmx57+YA
GNnkYBAApu+D/x4GBliw94fgQc7ZdgXCyT7olpx5GhaMq7WuRE9AZtS7A+HgU8CP
bXZm1aWoifAbTpnos4SMXxt0+ykvxDKrGXPxbM+/yYmM/VPbF0zBln6Qy+MhlYJz
mi5OGKsjnAwVIzAuuQiZVv2+RQxIkZT5fkLg3bHDZUnexiHduDhrMB1mTiLHctPm
tp6om28B2Vsbc3zlHnUo984qJ3mjQg/nm/s0lf7hCNsXV8r9IhM3YQl8uVRXan3s
WdO7v4FKYX+gE87KTHs/iXoot28IXasi7w+qFTI4XwH+M2kcF/cWseptAyUefisi
aHwg755zC4PEEFSru9CUGztbVfUNkoqOqC78f9kM6WtQS4509P1cmfa5+0f8jKm5
zUGUbvAUVPKzwFqLrJI0SPGWvjFp3t1555WpkkZy/iu/OHw/ybuYBACSxOQGk1As
xxj8CYOV9fvIagpM5EUTYoOVP8fkd38qYxiVzgwHSMpnp8kOSsAJb8JvnkGOpn9h
qXaZvxXx2Iz+aW0JTudr4Vz++IcdAsDV00MQCbw1OvqH3AioJgv2rnpIIOL7Qa8r
mhE62DJVfZcIhUZcgNmMEbBIENtB/21R29v2atMz6Sw5gop+xEycfBVbu38avWKn
f5OaTMMxjrFAwX0T9v0aBJ6Ph0TYildxXwt+i6MPN+El/oZVDfo=
=UZEm
-----END PGP SIGNATURE-----
Merge tag 'qcom-dts-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM DT updates for v6.3
This introduces support for Acer Iconia Talk S A1-724
The Samsung Galaxy Tab 4 10.1 gains ADSP and backlight support.
The Xperia Z2 Tablet gets charging enabled and the touchscreen is given
a little bit more time to start up.
APQ8064 and MSM8974 gains improvements in clock hierarchy. APQ8064
thermal sensor (tsens) driver gains per-censor calibration data.
Lastly a set of patches that improves DT binding compliance.
* tag 'qcom-dts-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (50 commits)
ARM: dts: qcom: msm8226: add RPMCC node
ARM: dts: qcom: apq8084: add clocks and clock-names to gcc device
ARM: dts: qcom: align OPP table node name with DT schema
ARM: dts: qcom: rename mdp nodes to display-controller
ARM: dts: qcom-msm8974: rename mdss node to display-subsystem
ARM: dts: qcom-msm8974: add SoC specific compat string to mdp5 node
dt-bindings: qcom: Document samsung,gt58 and gt510
dt-bindings: qcom: Document bindings for msm8916-samsung-j5x
ARM: dts: qcom: use qcom,gsi-loader for IPA
ARM: dts: qcom-apq8084: specify per-sensor calibration cells
ARM: dts: qcom-msm8974: specify per-sensor calibration cells
dt-bindings: arm: qcom: Document MSM8939 SoC binding
ARM: dts: qcom: msm8974: add xo clock to rpm clock controller
dt-bindings: qcom: Document msm8916-gplus-fl8005a
dt-bindings: vendor-prefixes: Add GPLUS
ARM: dts: qcom: apq8026-samsung-matisse-wifi: Add display backlight
dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11
ARM: dts: qcom: add missing space before {
dt-bindings: arm: qcom: add board-id/msm-id for MSM8956, SDM636 and SM4250
dt-bindings: arm: qcom: Add zombie with NVMe
...
Link: https://lore.kernel.org/r/20230126174725.3681745-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Emails to Brijesh Singh bounce ("550 5.1.10
RESOLVER.ADR.RecipientNotFound; Recipient not found by SMTP address
lookup").
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
Link: https://lore.kernel.org/r/20230127105935.99174-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Assuming that both Kconfig options, BLK_CGROUP and IOSCHED_BFQ are set, we
most likely want cgroup support for BFQ too (BFQ_GROUP_IOSCHED), so let's
make it default y.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230130121240.159456-1-ulf.hansson@linaro.org
Signed-off-by: Jens Axboe <axboe@kernel.dk>
lp3943 is a platform driver that doesn't use any symbol provided in
<linux/i2c.h>. So drop the include.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
It is possible that current chip->ecc.engine_type value does not match to
configured HW value (if HW ECC checking and generating is enabled or not).
This can happen with old U-Boot bootloader version which either does not
initialize NAND (and let it in some default unusable state) or initialize
NAND with different parameters than what is specified in kernel DTS file.
So if kernel chose to use some chip->ecc.engine_type settings (e.g. from
DTS file) then do not depend on bootloader HW configuration and configures
HW ECC settings according to chip->ecc.engine_type value.
BR_DECC must be set to BR_DECC_CHK_GEN when HW is doing ECC (both
generating and checking), or to BR_DECC_OFF when HW is not doing ECC.
This change fixes usage of SW ECC support in case bootloader explicitly
enabled HW ECC support and kernel DTS file has specified to use SW ECC.
(Of course this works only in case when NAND is not a boot device and both
bootloader and kernel are loaded from different location, e.g. FLASH NOR.)
Fixes: f6424c22aa ("mtd: rawnand: fsl_elbc: Make SW ECC work")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20230128134111.32559-1-pali@kernel.org
When compiling scan.c with C=1, Sparse complains with:
sparse: expected unsigned short [usertype] val
sparse: got restricted __le16 [usertype] pan_id
sparse: sparse: cast from restricted __le16
sparse: expected unsigned long long [usertype] val
sparse: got restricted __le64 [usertype] extended_addr
sparse: sparse: cast from restricted __le64
The tool is right, both pan_id and extended_addr already are rightfully
defined as being __le16 and __le64 on both sides of the operations and
do not require extra endianness handling.
Fixes: 3accf47627 ("mac802154: Handle basic beaconing")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20230130154306.114265-1-miquel.raynal@bootlin.com
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
- Merge of immutable bindings branch with Reset & power domain binding
- Addition of NNA power domain for A311D SoC
- meson_sm.txt conversionto dt-schema
- mark amlogic,meson-gx-pwrc bindings as deprecated
- fix of meson_sm driver by using NULL instead of 0
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmPXxmwACgkQd9zb2sjI
SdFUhg/9FVN0zGzhu/jtUgJ0gi1/c651aF4rojhq3H6xNGMGHAvFuzP2s2cZMUBd
VG3E2hEM8AhYo0HZF4IVABZ7SlzY2YsimHR0ZoOrE6X719KuEFlYCV4HWqs4OyV2
NNR5A4m1N4qCNBH7aSpdgN4JeBqRZUycVnRIAAM2RpqXHQIRyJCja2QLL8LULg8w
fuepmu29Sb/Yi7GA4yIJTUkCKtijAg+q7P0kuiTpE5od6Vm43n9ITzIAHVJXbRlU
4Lg6/19j1UflZA8t8CXnn8+nySa/E/owOA82YrY2m+/SG9ZMm97n9syj17weTuyJ
UPzjKnKnqRYQIcOlfxIBH9NvC46/TJJSGkPQ8lwCid8s8kq29KXiTuIAMXNPrfAB
KTrQRVjb92aMR5+cwiEe810ViyU27L9TIkqy2nvj7dEaa36p9W1D1QULgZiDccPj
vgPFSu1SiGO549PxeXnIMKTXh5T/06mXdBjKzSFamYiBr7Y8gc606YNW9poPY12s
yLwW7UiqG4q3CC9tLvFeX69JSPvIQDxZvVtlppHN0pmzP0U7iMy9KxUu93iK6xtO
eWIL63jsZTF3RR+xbawiJtBQxMMPvfxzELJCWhISdYvwK9OekATDRd5aqovdyWSU
71HQBgaBbCHcyfmaqzkMjdBJm/rOJiDJvJhIl3Pd8BOg8bLgZ+M=
=+uBi
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX6/MACgkQmmx57+YA
GNmH3g/9GBO61b8NJMndoPrYXFKCAL7Zf9tej/d5pjILi97PVV42nFRxXKY3xJaS
UEXgy/XRjR0PWYl65d6rzh9Moq95jd0HLq5gBOkeBhsKqfFXX9nJGXf9BT4IkJfj
OBvcpB2BxbtQouuo3Qj6w8WSV7nXYZSCrQIXrDfqxkn0LkZSGBBp6VPtlpe1An4i
CTOgRQ7iNyofsG/VUG1ySqubhNznUMkpydiy7T6mk9/JIaz+1s4b92ybpiHGyknB
YYCBv8LXi+/z/s/SxOLcvfRJN5mPpLjwfFX705mel7+GY0JTDG97UJSAUiB2if6q
CazVP9fkUEP+fbRn+o9K/HbfpkDchlBYnaij0Ai+mGHGJUWCs746GR8+oTedvzvp
ehRVXfcY4eGyrhYA6IoVx8WxX0m8xeyikwkWsEd6wwA5y661ARKLnddLIdk6byEZ
NvGSk3NHKc/dt6SOXHFG9HhF1dTOFVoTwXjNu5yOvqfgregwZf08j/vk2n5V/14t
rmn1F6FJhuyizFlAfMYlzr4U9QfBZ3fe4drYDPl0NbYBlw6jR0QJ8gofTYi4f5S6
HTgYxbsQ8U54d2LCJlkbLLDw9egxC3GaqMznTj7QcwDv8djHJqGyxaKvTKwZri2p
p0DtKPdqHYkyjj/qF+chk8ZLM4/Ik1l8olwbyptyvosHhBMWwFM=
=1+2i
-----END PGP SIGNATURE-----
Merge tag 'amlogic-drivers-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers
Amlogic Drivers changes for v6.3:
- Merge of immutable bindings branch with Reset & power domain binding
- Addition of NNA power domain for A311D SoC
- meson_sm.txt conversionto dt-schema
- mark amlogic,meson-gx-pwrc bindings as deprecated
- fix of meson_sm driver by using NULL instead of 0
* tag 'amlogic-drivers-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
firmware: meson_sm: stop using 0 as NULL pointer
dt-bindings: power: amlogic,meson-gx-pwrc: mark bindings as deprecated
dt-bindings: firmware: convert meson_sm.txt to dt-schema
soc: amlogic: meson-pwrc: Add NNA power domain for A311D
dt-bindings: power: Add G12A NNA power domain
dt-bindings: reset: meson-g12a: Add missing NNA reset
Link: https://lore.kernel.org/r/ec9552d8-96df-a677-ab94-9723f5c30f1c@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A couple of cleanups to drop device_driver owner setting from i.MX93
PD and SRC driver.
- A series from Lucas Stach to add high performance PLL clock support
for imx8mp-blk-ctrl driver.
- A couple of changes to set LCDIF panic read hurry level for i.MX8M
blk-ctrl drivers.
- Use devm_platform_get_and_ioremap_resource() for imx-weim bus driver.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmPXFdYUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM61cAf/UKUhyKCvkT3Da5CsUXUZLHNFYr3W
bsrgNfn5Ffw+0DqiwiZkvA/OMEZBcck4YIQEqw4DVRYhozMNCyvOODvmWpK4Q67+
gcvWNs0o4hsJ0kAuGJUjg8QEwSSgf8ikX2KK2wMptWtNPu/z2sBo+fvQ6RTAt1un
mt63yO4v3/i8IVtCWEXQZqLcR5gVpSC6xigjRtELXkBn+tHqPBpuwUCSzrKle6XT
qn8k8AB87qu5onaFupd4/ZEIfkG05e8jyMqPAFd7YjMA6taC6q5zJJdOdV6N2uJq
TADXu46u2STI86faGLoqqqpZ3iUdSMOhwu7Iu+vpI6Lx1vyZvZcZFJ0KhA==
=ghuX
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX67gACgkQmmx57+YA
GNnXWw//ZSu+ASCEP9gzi0a0QakKC2mNWeohXcEPr1O+Pr5OuYmkhQ+cqpz004Tg
FzVpSN5Lv+WC0UNeE4wRu0Evuxo7DjVy/7hc03xzI1plq42D8Vq2FXFv5l4jpIBQ
cYqgFpeNCcjHQXL2OVkjp+P30nvqC8LaXAUi6E0S+k2EOqwM6qq/thVDngnDjg98
NygZLmUdrtY0SVtx6QR9iP3ZfTqo/fyDUcL6bTfx2lTBkqRp23vFMxsGSkp6Bpwy
ovLWwdCWOGc/sCV2rOBgqh12DZBs+0GATOiO9/RPmUZC1c5byUpbO/5STxbbdrIE
DYSG7e8yOndjHXfNb94mdA2kaC+J3Eyoa8WXohTF+udyughH2Xun33NX6pVp3F4z
hYjMBpqGW6ThIsuGSyqYDDDZj3KVtqBToMBZrQhbBam4Qvh/2IO89Q56l/Ni+N8n
vgce0f/JIeN+QotQdHD9yt7fsSmb9wYSCecyppTl+cNdmAKSYugGqMgytYFm3XnK
Ed8Ds5eucbHvnow0KxxKsq9EV4eMPBL0bkufBqhSMXs0I4EHnF19n/5O1zr4VinI
2AhHL2SF/OAxhMPB7zKIyXnRdTXcuRKnQY7MS2Q5G4hucfg/uRT9psrv35Gbb37q
RQ2zRmM90fnCBT4g4v+jLtXp9LMScLz/8XG6XjtHqVG3ls2/5dc=
=+Uo3
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/drivers
i.MX drivers change for 6.3:
- A couple of cleanups to drop device_driver owner setting from i.MX93
PD and SRC driver.
- A series from Lucas Stach to add high performance PLL clock support
for imx8mp-blk-ctrl driver.
- A couple of changes to set LCDIF panic read hurry level for i.MX8M
blk-ctrl drivers.
- Use devm_platform_get_and_ioremap_resource() for imx-weim bus driver.
* tag 'imx-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: imx8mp-blk-ctrl: set HDMI LCDIF panic read hurry level
soc: imx: imx93-src: No need to set device_driver owner
soc: imx: imx93-pd: No need to set device_driver owner
soc: imx: imx8m-blk-ctrl: set LCDIF panic read hurry level
soc: imx: imx8mp-blk-ctrl: expose high performance PLL clock
soc: imx: imx8mp-blk-ctrl: add instance specific probe function
soc: imx: add Kconfig symbols for blk-ctrl drivers
bus: imx-weim: use devm_platform_get_and_ioremap_resource()
Link: https://lore.kernel.org/r/20230130023947.11780-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The 'partition' node name pattern is missing start and end anchors, so
anything is allowed before or after the regex pattern. There's no in tree
users needing that, so add anchors to the pattern.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Pratyush Yadav <ptyadav@amazon.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20230120020454.3225796-1-robh@kernel.org
PCI passthrough to VMs does not work with AMD FCH AHCI adapters: the guest
OS fails to correctly probe devices attached to the controller due to FIS
communication failures:
ata4: softreset failed (1st FIS failed)
...
ata4.00: qc timeout after 5000 msecs (cmd 0xec)
ata4.00: failed to IDENTIFY (I/O error, err_mask=0x4)
Forcing the "bus" reset method before unbinding & binding the adapter to
the vfio-pci driver solves this issue, e.g.:
echo "bus" > /sys/bus/pci/devices/<ID>/reset_method
gives a working guest OS, indicating that the default FLR reset method
doesn't work correctly.
Apply quirk_no_flr() to AMD FCH AHCI devices to work around this issue.
Link: https://lore.kernel.org/r/20230128013951.523247-1-damien.lemoal@opensource.wdc.com
Reported-by: Niklas Cassel <niklas.cassel@wdc.com>
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
Correct spelling problems for Documentation/firmware-guide/ as reported
by codespell.
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The DSDTs of CHT devices using the Dollar Cove TI PMIC, all use
LDO1 - LDO14 names for the DSDT power opregion field names.
Add comments with these fields to make it easier to see which PMIC
registers are being set by ACPI code using these.
Note that LDO4 is missing and the mapped registers jump from 0x43
to 0x45 to match. This matches with how the fields are declared
in the DSDT where LDO4 is skipped too. Note there is no hole in
the field addresses, LDO4 is simply just not defined on either side.
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This converts pwm-mediatek.txt to mediatek,mt2712-pwm.yaml schema;
while at it, the clock names were clarified as previously they were
documented as "pwmX-Y", but valid names are "pwmN" only.
Also, the example was changed to use "mediatek,mt2712-pwm" instead
for consistency with the schema filename.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
On the Dell Inspiron 3505, the battery model name
is represented as a hex string containing seven numbers,
causing it to be larger than the current maximum string
length (32).
Increase this length to 64 to avoid truncating the string
in such cases. Also introduce a common define for the length.
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
If a buffer containing ASCII characters is not NUL-terminated
(which is perfectly legal according to the ACPI specification),
the ACPI battery driver might not honor its length.
Fix this by limiting the amount of data to be copied to
the buffer length while also using strscpy() to make sure
that the resulting string is always NUL-terminated.
Also replace strncpy() vs strscpy().
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Jason Gunthorpe