Commit Graph

948892 Commits (94dea151bf3651c01acb12a38ca75ba9d26ea4da)

Author SHA1 Message Date
Peilin Ye 2f2a7ffad5 AX.25: Fix out-of-bounds read in ax25_connect()
Checks on `addr_len` and `fsa->fsa_ax25.sax25_ndigis` are insufficient.
ax25_connect() can go out of bounds when `fsa->fsa_ax25.sax25_ndigis`
equals to 7 or 8. Fix it.

This issue has been reported as a KMSAN uninit-value bug, because in such
a case, ax25_connect() reaches into the uninitialized portion of the
`struct sockaddr_storage` statically allocated in __sys_connect().

It is safe to remove `fsa->fsa_ax25.sax25_ndigis > AX25_MAX_DIGIS` because
`addr_len` is guaranteed to be less than or equal to
`sizeof(struct full_sockaddr_ax25)`.

Reported-by: syzbot+c82752228ed975b0a623@syzkaller.appspotmail.com
Link: https://syzkaller.appspot.com/bug?id=55ef9d629f3b3d7d70b69558015b63b48d01af66
Signed-off-by: Peilin Ye <yepeilin.cs@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 17:56:40 -07:00
Colin Ian King bb809a047e lan743x: remove redundant initialization of variable current_head_index
The variable current_head_index is being initialized with a value that
is never read and it is being updated later with a new value.  Replace
the initialization of -1 with the latter assignment.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 17:55:35 -07:00
Claudiu Manoil 26cb7085c8 enetc: Remove the mdio bus on PF probe bailout
For ENETC ports that register an external MDIO bus,
the bus doesn't get removed on the error bailout path
of enetc_pf_probe().

This issue became much more visible after recent:
commit 07095c025a ("net: enetc: Use DT protocol information to set up the ports")
Before this commit, one could make probing fail on the error
path only by having register_netdev() fail, which is unlikely.
But after this commit, because it moved the enetc_of_phy_get()
call up in the probing sequence, now we can trigger an mdiobus_free()
bug just by forcing enetc_alloc_msix() to return error, i.e. with the
'pci=nomsi' kernel bootarg (since ENETC relies on MSI support to work),
as the calltrace below shows:

kernel BUG at /home/eiz/work/enetc/net/drivers/net/phy/mdio_bus.c:648!
Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
[...]
Hardware name: LS1028A RDB Board (DT)
pstate: 80000005 (Nzcv daif -PAN -UAO BTYPE=--)
pc : mdiobus_free+0x50/0x58
lr : devm_mdiobus_free+0x14/0x20
[...]
Call trace:
 mdiobus_free+0x50/0x58
 devm_mdiobus_free+0x14/0x20
 release_nodes+0x138/0x228
 devres_release_all+0x38/0x60
 really_probe+0x1c8/0x368
 driver_probe_device+0x5c/0xc0
 device_driver_attach+0x74/0x80
 __driver_attach+0x8c/0xd8
 bus_for_each_dev+0x7c/0xd8
 driver_attach+0x24/0x30
 bus_add_driver+0x154/0x200
 driver_register+0x64/0x120
 __pci_register_driver+0x44/0x50
 enetc_pf_driver_init+0x24/0x30
 do_one_initcall+0x60/0x1c0
 kernel_init_freeable+0x1fc/0x274
 kernel_init+0x14/0x110
 ret_from_fork+0x10/0x34

Fixes: ebfcb23d62 ("enetc: Add ENETC PF level external MDIO support")
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 17:51:13 -07:00
Claudiu Manoil c6dd6488ac enetc: Remove the imdio bus on PF probe bailout
enetc_imdio_remove() is missing from the enetc_pf_probe()
bailout path. Not surprisingly because enetc_setup_serdes()
is registering the imdio bus for internal purposes, and it's
not obvious that enetc_imdio_remove() currently performs the
teardown of enetc_setup_serdes().
To fix this, define enetc_teardown_serdes() to wrap
enetc_imdio_remove() (improve code maintenance) and call it
on bailout and remove paths.

Fixes: 975d183ef0 ("net: enetc: Initialize SerDes for SGMII and USXGMII protocols")
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 17:32:07 -07:00
Wang Hai 7979a7d2ab net: qed: Remove unneeded cast from memory allocation
Remove casting the values returned by memory allocation function.

Coccinelle emits WARNING: casting value returned by memory allocation
unction to (struct roce_destroy_qp_req_output_params *) is useless.

This issue was detected by using the Coccinelle software.

Signed-off-by: Wang Hai <wanghai38@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 17:28:54 -07:00
Vladimir Oltean fb16d465f7 net: phy: fix check in get_phy_c45_ids
After the patch below, the iteration through the available MMDs is
completely short-circuited, and devs_in_pkg remains set to the initial
value of zero.

Due to devs_in_pkg being zero, the rest of get_phy_c45_ids() is
short-circuited too: the following loop never reaches below this point
either (it executes "continue" for every device in package, failing to
retrieve PHY ID for any of them):

	/* Now probe Device Identifiers for each device present. */
	for (i = 1; i < num_ids; i++) {
		if (!(devs_in_pkg & (1 << i)))
			continue;

So c45_ids->device_ids remains populated with zeroes. This causes an
Aquantia AQR412 PHY (same as any C45 PHY would, in fact) to be probed by
the Generic PHY driver.

The issue seems to be a case of submitting partially committed work (and
therefore testing something other than was submitted).

The intention of the patch was to delay exiting the loop until one more
condition is reached (the devs_in_pkg read from hardware is either 0, OR
mostly f's). So fix the patch to reflect that.

Tested with traffic on a LS1028A-QDS, the PHY is now probed correctly
using the Aquantia driver. The devs_in_pkg bit field is set to
0xe000009a, and the MMDs that are present have the following IDs:

[    5.600772] libphy: get_phy_c45_ids: device_ids[1]=0x3a1b662
[    5.618781] libphy: get_phy_c45_ids: device_ids[3]=0x3a1b662
[    5.630797] libphy: get_phy_c45_ids: device_ids[4]=0x3a1b662
[    5.654535] libphy: get_phy_c45_ids: device_ids[7]=0x3a1b662
[    5.791723] libphy: get_phy_c45_ids: device_ids[29]=0x3a1b662
[    5.804050] libphy: get_phy_c45_ids: device_ids[30]=0x3a1b662
[    5.816375] libphy: get_phy_c45_ids: device_ids[31]=0x0

[    7.690237] mscc_felix 0000:00:00.5: PHY [0.5:00] driver [Aquantia AQR412] (irq=POLL)
[    7.704739] mscc_felix 0000:00:00.5: PHY [0.5:01] driver [Aquantia AQR412] (irq=POLL)
[    7.718918] mscc_felix 0000:00:00.5: PHY [0.5:02] driver [Aquantia AQR412] (irq=POLL)
[    7.733044] mscc_felix 0000:00:00.5: PHY [0.5:03] driver [Aquantia AQR412] (irq=POLL)

Fixes: bba238ed03 ("net: phy: continue searching for C45 MMDs even if first returned ffff:ffff")
Reported-by: Colin King <colin.king@canonical.com>
Reported-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 17:01:36 -07:00
Richard Sailer 749c08f820 net: dccp: Add SIOCOUTQ IOCTL support (send buffer fill)
This adds support for the SIOCOUTQ IOCTL to get the send buffer fill
of a DCCP socket, like UDP and TCP sockets already have.

Regarding the used data field: DCCP uses per packet sequence numbers,
not per byte, so sequence numbers can't be used like in TCP. sk_wmem_queued
is not used by DCCP and always 0, even in test on highly congested paths.
Therefore this uses sk_wmem_alloc like in UDP.

Signed-off-by: Richard Sailer <richard_siegfried@systemli.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 17:00:37 -07:00
David S. Miller 09a0d326b9 Merge branch 'Add-DSA-yaml-binding'
Kurt Kanzenbach says:

====================
Add DSA yaml binding

as discussed [1] [2] it makes sense to add a DSA yaml binding. This is the
second version and contains now two ways of specifying the switch ports: Either
by "ports" or by "ethernet-ports". That is why the third patch also adjusts the
DSA core for it.

Tested in combination with the hellcreek.yaml file.

Changes since v1:

 * Use select to not match unrelated switches
 * Allow ethernet-port(s)
 * List ethernet-controller properties
 * Include better description
 * Let dsa.txt refer to dsa.yaml

Thanks,
Kurt

[1] - https://lkml.kernel.org/netdev/449f0a03-a91d-ae82-b31f-59dfd1457ec5@gmail.com/
[2] - https://lkml.kernel.org/netdev/20200710090618.28945-1-kurt@linutronix.de/
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 16:56:44 -07:00
Kurt Kanzenbach 85e05d263e net: dsa: of: Allow ethernet-ports as encapsulating node
Due to unified Ethernet Switch Device Tree Bindings allow for ethernet-ports as
encapsulating node as well.

Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 16:56:43 -07:00
Kurt Kanzenbach 5a18bb14c0 dt-bindings: net: dsa: Let dsa.txt refer to dsa.yaml
The DSA bindings have been converted to YAML. Therefore, the old text style
documentation should refer to that one.

The text file can be removed completely once all the existing DSA switch
bindings have been converted as well.

Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 16:56:43 -07:00
Kurt Kanzenbach bce58590d1 dt-bindings: net: dsa: Add DSA yaml binding
For future DSA drivers it makes sense to add a generic DSA yaml binding which
can be used then. This was created using the properties from dsa.txt. It
includes the ports and the dsa,member property.

Suggested-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 16:56:43 -07:00
Thomas Gleixner 74f8555166 EFI fixes for v5.8-rc4:
- Fix the layering violation in the use of the EFI runtime services
   availability mask in users of the 'efivars' abstraction
 - Revert build fix for GCC v4.8 which is no longer supported
 - Some fixes for build issues found by Atish while working on RISC-V support
 - Avoid --whole-archive when linking the stub on arm64
 - Some x86 EFI stub cleanups from Arvind
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Merge tag 'efi-urgent-for-v5.8-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi into efi/urgent

Pull EFI fixes from Ard Biesheuvel:

 - Fix the layering violation in the use of the EFI runtime services
   availability mask in users of the 'efivars' abstraction
 - Revert build fix for GCC v4.8 which is no longer supported
 - Some fixes for build issues found by Atish while working on RISC-V support
 - Avoid --whole-archive when linking the stub on arm64
 - Some x86 EFI stub cleanups from Arvind
2020-07-23 00:46:44 +02:00
Jon Derrick ec0160891e irqdomain/treewide: Free firmware node after domain removal
Commit 711419e504 ("irqdomain: Add the missing assignment of
domain->fwnode for named fwnode") unintentionally caused a dangling pointer
page fault issue on firmware nodes that were freed after IRQ domain
allocation. Commit e3beca48a4 fixed that dangling pointer issue by only
freeing the firmware node after an IRQ domain allocation failure. That fix
no longer frees the firmware node immediately, but leaves the firmware node
allocated after the domain is removed.

The firmware node must be kept around through irq_domain_remove, but should be
freed it afterwards.

Add the missing free operations after domain removal where where appropriate.

Fixes: e3beca48a4 ("irqdomain/treewide: Keep firmware node unconditionally allocated")
Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>	# drivers/pci
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/1595363169-7157-1-git-send-email-jonathan.derrick@intel.com
2020-07-23 00:08:52 +02:00
Dmitry Safonov ef2ff0f5d6 x86/dumpstack: Show registers dump with trace's log level
show_trace_log_lvl() provides x86 platform-specific way to unwind
backtrace with a given log level. Unfortunately, registers dump(s) are
not printed with the same log level - instead, KERN_DEFAULT is always
used.

Arista's switches uses quite common setup with rsyslog, where only
urgent messages goes to console (console_log_level=KERN_ERR), everything
else goes into /var/log/ as the console baud-rate often is indecently
slow (9600 bps).

Backtrace dumps without registers printed have proven to be as useful as
morning standups. Furthermore, in order to introduce KERN_UNSUPPRESSED
(which I believe is still the most elegant way to fix raciness of sysrq[1])
the log level should be passed down the stack to register dumping
functions. Besides, there is a potential use-case for printing traces
with KERN_DEBUG level [2] (where registers dump shouldn't appear with
higher log level).

After all preparations are done, provide log_lvl parameter for
show_regs_if_on_stack() and wire up to actual log level used as
an argument for show_trace_log_lvl().

[1]: https://lore.kernel.org/lkml/20190528002412.1625-1-dima@arista.com/
[2]: https://lore.kernel.org/linux-doc/20190724170249.9644-1-dima@arista.com/

Signed-off-by: Dmitry Safonov <dima@arista.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Petr Mladek <pmladek@suse.com>
Link: https://lkml.kernel.org/r/20200629144847.492794-4-dima@arista.com
2020-07-22 23:56:54 +02:00
Dmitry Safonov 44e215352c x86/dumpstack: Add log_lvl to __show_regs()
show_trace_log_lvl() provides x86 platform-specific way to unwind
backtrace with a given log level. Unfortunately, registers dump(s) are
not printed with the same log level - instead, KERN_DEFAULT is always
used.

Arista's switches uses quite common setup with rsyslog, where only
urgent messages goes to console (console_log_level=KERN_ERR), everything
else goes into /var/log/ as the console baud-rate often is indecently
slow (9600 bps).

Backtrace dumps without registers printed have proven to be as useful as
morning standups. Furthermore, in order to introduce KERN_UNSUPPRESSED
(which I believe is still the most elegant way to fix raciness of sysrq[1])
the log level should be passed down the stack to register dumping
functions. Besides, there is a potential use-case for printing traces
with KERN_DEBUG level [2] (where registers dump shouldn't appear with
higher log level).

Add log_lvl parameter to __show_regs().
Keep the used log level intact to separate visible change.

[1]: https://lore.kernel.org/lkml/20190528002412.1625-1-dima@arista.com/
[2]: https://lore.kernel.org/linux-doc/20190724170249.9644-1-dima@arista.com/

Signed-off-by: Dmitry Safonov <dima@arista.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Petr Mladek <pmladek@suse.com>
Link: https://lkml.kernel.org/r/20200629144847.492794-3-dima@arista.com
2020-07-22 23:56:53 +02:00
Dmitry Safonov fd07f802a7 x86/dumpstack: Add log_lvl to show_iret_regs()
show_trace_log_lvl() provides x86 platform-specific way to unwind
backtrace with a given log level. Unfortunately, registers dump(s) are
not printed with the same log level - instead, KERN_DEFAULT is always
used.

Arista's switches uses quite common setup with rsyslog, where only
urgent messages goes to console (console_log_level=KERN_ERR), everything
else goes into /var/log/ as the console baud-rate often is indecently
slow (9600 bps).

Backtrace dumps without registers printed have proven to be as useful as
morning standups. Furthermore, in order to introduce KERN_UNSUPPRESSED
(which I believe is still the most elegant way to fix raciness of sysrq[1])
the log level should be passed down the stack to register dumping
functions. Besides, there is a potential use-case for printing traces
with KERN_DEBUG level [2] (where registers dump shouldn't appear with
higher log level).

Add log_lvl parameter to show_iret_regs() as a preparation to add it
to __show_regs() and show_regs_if_on_stack().

[1]: https://lore.kernel.org/lkml/20190528002412.1625-1-dima@arista.com/
[2]: https://lore.kernel.org/linux-doc/20190724170249.9644-1-dima@arista.com/

Signed-off-by: Dmitry Safonov <dima@arista.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Petr Mladek <pmladek@suse.com>
Link: https://lkml.kernel.org/r/20200629144847.492794-2-dima@arista.com
2020-07-22 23:56:53 +02:00
Thomas Gleixner d181d2da01 x86/dumpstack: Dump user space code correctly again
H.J. reported that post 5.7 a segfault of a user space task does not longer
dump the Code bytes when /proc/sys/debug/exception-trace is enabled. It
prints 'Code: Bad RIP value.' instead.

This was broken by a recent change which made probe_kernel_read() reject
non-kernel addresses.

Update show_opcodes() so it retrieves user space opcodes via
copy_from_user_nmi().

Fixes: 98a23609b1 ("maccess: always use strict semantics for probe_kernel_read")
Reported-by: H.J. Lu <hjl.tools@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/87h7tz306w.fsf@nanos.tec.linutronix.de
2020-07-22 23:47:48 +02:00
Josh Poimboeuf 039a7a30ec x86/stacktrace: Fix reliable check for empty user task stacks
If a user task's stack is empty, or if it only has user regs, ORC
reports it as a reliable empty stack.  But arch_stack_walk_reliable()
incorrectly treats it as unreliable.

That happens because the only success path for user tasks is inside the
loop, which only iterates on non-empty stacks.  Generally, a user task
must end in a user regs frame, but an empty stack is an exception to
that rule.

Thanks to commit 71c9582528 ("x86/unwind/orc: Fix error handling in
__unwind_start()"), unwind_start() now sets state->error appropriately.
So now for both ORC and FP unwinders, unwind_done() and !unwind_error()
always means the end of the stack was successfully reached.  So the
success path for kthreads is no longer needed -- it can also be used for
empty user tasks.

Reported-by: Wang ShaoBo <bobo.shaobowang@huawei.com>
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Wang ShaoBo <bobo.shaobowang@huawei.com>
Link: https://lkml.kernel.org/r/f136a4e5f019219cbc4f4da33b30c2f44fa65b84.1594994374.git.jpoimboe@redhat.com
2020-07-22 23:47:47 +02:00
Josh Poimboeuf 372a8eaa05 x86/unwind/orc: Fix ORC for newly forked tasks
The ORC unwinder fails to unwind newly forked tasks which haven't yet
run on the CPU.  It correctly reads the 'ret_from_fork' instruction
pointer from the stack, but it incorrectly interprets that value as a
call stack address rather than a "signal" one, so the address gets
incorrectly decremented in the call to orc_find(), resulting in bad ORC
data.

Fix it by forcing 'ret_from_fork' frames to be signal frames.

Reported-by: Wang ShaoBo <bobo.shaobowang@huawei.com>
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Wang ShaoBo <bobo.shaobowang@huawei.com>
Link: https://lkml.kernel.org/r/f91a8778dde8aae7f71884b5df2b16d552040441.1594994374.git.jpoimboe@redhat.com
2020-07-22 23:47:47 +02:00
J. Bruce Fields 9affa43581 nfsd4: fix NULL dereference in nfsd/clients display code
We hold the cl_lock here, and that's enough to keep stateid's from going
away, but it's not enough to prevent the files they point to from going
away.  Take fi_lock and a reference and check for NULL, as we do in
other code.

Reported-by: NeilBrown <neilb@suse.de>
Fixes: 78599c42ae ("nfsd4: add file to display list of client's opens")
Reviewed-by: NeilBrown <neilb@suse.de>
Signed-off-by: J. Bruce Fields <bfields@redhat.com>
2020-07-22 16:47:14 -04:00
Jonathan Cameron 068c29a248 PCI/ERR: Clear PCIe Device Status errors only if OS owns AER
pcie_clear_device_status() resets the error bits in the PCIe Device Status
Register (PCI_EXP_DEVSTA).

Previously we did this unconditionally, but on ACPI systems, the _OSC AER
bit negotiates control of the AER capability.  Per sec 4.5.1 of the System
Firmware Intermediary _OSC and DPC Updates ECN [1], this bit also covers
other error enable/status bits including the following:

  Correctable Error Reporting Enable
  Non-Fatal Error Reporting Enable
  Fatal Error Reporting Enable
  Unsupported Request Reporting Enable

These bits are all in the PCIe Device Control register (the ECN omitted
"Reporting", but I think that's a typo), so by implication the _OSC AER bit
also applies to the error status bits in the PCIe Device Status register:

  Correctable Error Detected
  Non-Fatal Error Detected
  Fatal Error Detected
  Unsupported Request Detected

Clear the PCIe Device Status error bits only when the OS controls the AER
capability and related error enable/status bits.  If platform firmware
controls the AER capability, firmware is responsible for clearing these
bits.

One call path leading here is:

  ghes_do_proc
    ghes_handle_aer
      aer_recover_queue
        schedule_work(&aer_recover_work)
  ...
  aer_recover_work_func
    pcie_do_recovery
      pcie_clear_device_status

[1] System Firmware Intermediary (SFI) _OSC and DPC Updates ECN, Feb 24,
    2020, affecting PCI Firmware Specification, Rev. 3.2
    https://members.pcisig.com/wg/PCI-SIG/document/14076
[bhelgaas: commit log, move test from pcie_clear_device_status() to callers]
Link: https://lore.kernel.org/r/20200622113523.891666-1-Jonathan.Cameron@huawei.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-07-22 15:41:03 -05:00
Arnd Bergmann 5644f690b9 Samsung mach/soc changes for v5.9
1. Restore big.LITTLE cpuidle support on Exynos542x boards.
 2. Cleanups and minor fixes.
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Merge tag 'samsung-soc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc

Samsung mach/soc changes for v5.9

1. Restore big.LITTLE cpuidle support on Exynos542x boards.
2. Cleanups and minor fixes.

* tag 'samsung-soc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: s3c24xx: Replace HTTP links with HTTPS ones
  ARM: s3c24xx: leds: Convert to use GPIO descriptors
  ARM: exynos: MCPM: Restore big.LITTLE cpuidle support
  ARM: exynos: clear L310_AUX_CTRL_FULL_LINE_ZERO in default l2c_aux_val

Link: https://lore.kernel.org/r/20200721180900.13844-4-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:38:40 +02:00
Bjorn Helgaas 600a5b4fc8 PCI/ERR: Rename pci_aer_clear_device_status() to pcie_clear_device_status()
pci_aer_clear_device_status() clears the error bits in the PCIe Device
Status Register (PCI_EXP_DEVSTA).  Every PCIe device has this register,
regardless of whether it supports AER.

Rename pci_aer_clear_device_status() to pcie_clear_device_status() to make
clear that it is PCIe-specific but not AER-specific.  Move it to
drivers/pci/pci.c, again since it's not AER-specific.  No functional change
intended.

Link: https://lore.kernel.org/r/20200717195619.766662-1-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-07-22 15:38:35 -05:00
Arnd Bergmann 18517746d7 Qualcomm driver updates for v5.9
For RPMh this fixes an issue where ktime was used during suspend, allows
 the driver to be used on ARM targets and some minor cleanups.
 
 It adds support for the latest format version in the socinfo driver and
 adds identifiers for SM8250 and SDM630.
 
 SMD-RPM gains compatibles for MSM8994 and MSM8936 and the Qualcomm SCM
 gains compatibles MSM8994 and IPQ8074.
 
 The GENI core code gains interconnect path voting and performance level
 support, with subsequent patches integrating this with the SPI, I2C,
 UART and QSPI drivers.
 
 Following this the KGDB support for the GENI serial driver is improved,
 the performance related to chip-select is improved for SPI and QSPI.
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Merge tag 'qcom-drivers-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.9

For RPMh this fixes an issue where ktime was used during suspend, allows
the driver to be used on ARM targets and some minor cleanups.

It adds support for the latest format version in the socinfo driver and
adds identifiers for SM8250 and SDM630.

SMD-RPM gains compatibles for MSM8994 and MSM8936 and the Qualcomm SCM
gains compatibles MSM8994 and IPQ8074.

The GENI core code gains interconnect path voting and performance level
support, with subsequent patches integrating this with the SPI, I2C,
UART and QSPI drivers.

Following this the KGDB support for the GENI serial driver is improved,
the performance related to chip-select is improved for SPI and QSPI.

* tag 'qcom-drivers-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (35 commits)
  soc: qcom: geni: Fix NULL pointer dereference
  tty: serial: qcom-geni-serial: Drop the icc bw votes in suspend for console
  serial: qcom_geni_serial: Always use 4 bytes per TX FIFO word
  serial: qcom_geni_serial: Make kgdb work even if UART isn't console
  spi: spi-geni-qcom: Get rid of most overhead in prepare_message()
  spi: spi-geni-qcom: Set the clock properly at runtime resume
  spi: spi-geni-qcom: Avoid clock setting if not needed
  spi: spi-qcom-qspi: Set an autosuspend delay of 250 ms
  spi: spi-qcom-qspi: Avoid clock setting if not needed
  spi: spi-qcom-qspi: Use OPP API to set clk/perf state
  firmware: qcom_scm: Add msm8994 compatible
  firmware: qcom_scm: Fix legacy convention SCM accessors
  <linux/of.h>: add stub for of_get_next_parent() to fix qcom build error
  dt-bindings: firmware: qcom: Add compatible for IPQ8074 SoC
  spi: spi-geni-qcom: Use OPP API to set clk/perf state
  tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state
  spi: spi-qcom-qspi: Add interconnect support
  spi: spi-geni-qcom: Add interconnect support
  spi: spi-geni-qcom: Combine the clock setting code
  tty: serial: qcom_geni_serial: Add interconnect support
  ...

Link: https://lore.kernel.org/r/20200721044812.3429652-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:36:18 +02:00
Arnd Bergmann e2837df668 i.MX drivers change for 5.9:
- Update SCU irq code to call pm_system_wakeup() in general MU IRQ
   handler, so that system can be waked up when MU IRQ arrives.
 - Move i.MX SCU soc driver into imx firmware folder to get it
   initialized from i.MX SCU firmware driver.
 - Clean up soc-imx-scu driver a bit by using devm_kasprintf().
 - Correct postfix setting for cm40 power domain in scu-pd driver.
 - Add resource management support for IMX_SCU firmware driver.
 - Add more cm4 resources to i.MX SCU power domain driver.
 - Select ARM_GIC_V3 from SOC_IMX8M for being able to use GICv3 driver
   in AARCH32 mode Linux on AARCH64 hardware.
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Merge tag 'imx-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers change for 5.9:

- Update SCU irq code to call pm_system_wakeup() in general MU IRQ
  handler, so that system can be waked up when MU IRQ arrives.
- Move i.MX SCU soc driver into imx firmware folder to get it
  initialized from i.MX SCU firmware driver.
- Clean up soc-imx-scu driver a bit by using devm_kasprintf().
- Correct postfix setting for cm40 power domain in scu-pd driver.
- Add resource management support for IMX_SCU firmware driver.
- Add more cm4 resources to i.MX SCU power domain driver.
- Select ARM_GIC_V3 from SOC_IMX8M for being able to use GICv3 driver
  in AARCH32 mode Linux on AARCH64 hardware.

* tag 'imx-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: select ARM_GIC_V3 for i.MX8M
  firmware: imx: Move i.MX SCU soc driver into imx firmware folder
  firmware: imx: scu-pd: add more cm4 resources
  firmware: imx: add resource management api
  firmware: imx: scu-pd: fix cm40 power domain
  soc: imx: scu: use devm_kasprintf
  firmware: imx: make sure MU irq can wake up system from suspend mode

Link: https://lore.kernel.org/r/20200720085536.24138-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:35:21 +02:00
Arnd Bergmann 9e586c8431 Reset controller updates for v5.9
This tag moves the reset-simple header out of drivers/reset for use by
 drivers outside of drivers/reset, adds a .reset() callback to
 reset-simple, converts i.MX reset bindings to json-schema, fixes a
 compile warning in the reset-intel-gw driver, and replaces some HTTP
 links with HTTPS ones in comments.
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Merge tag 'reset-for-v5.9' of git://git.pengutronix.de/pza/linux into arm/drivers

Reset controller updates for v5.9

This tag moves the reset-simple header out of drivers/reset for use by
drivers outside of drivers/reset, adds a .reset() callback to
reset-simple, converts i.MX reset bindings to json-schema, fixes a
compile warning in the reset-intel-gw driver, and replaces some HTTP
links with HTTPS ones in comments.

* tag 'reset-for-v5.9' of git://git.pengutronix.de/pza/linux:
  reset: Replace HTTP links with HTTPS ones
  reset: intel: fix a compile warning about REG_OFFSET redefined
  dt-bindings: reset: Convert i.MX7 reset to json-schema
  dt-bindings: reset: Convert i.MX reset to json-schema
  reset: simple: Add reset callback
  reset: Move reset-simple header out of drivers/reset

Link: https://lore.kernel.org/r/b718f052e38abbaac599d80645376b75e54aa5bd.camel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:34:14 +02:00
Marek Szyprowski 00067ca533 soc: samsung: exynos-regulator-coupler: Add simple voltage coupler for Exynos5800
Add a simple custom voltage regulator coupler for Exynos5800 SoCs, which
require coupling between "vdd_arm" and "vdd_int" regulators. This coupler
ensures that the voltage values don't go below the bootloader-selected
operation point during the boot process until the clients set their
constraints. It is achieved by assuming minimal voltage value equal to
the current value if no constraints are set. This also ensures proper
voltage balancing if any of the client driver is missing.

The balancing code comes from the regulator/core.c with the additional
logic for handling regulators without client constraints applied added.

Link: https://lore.kernel.org/r/20200721180900.13844-5-krzk@kernel.org
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:33:57 +02:00
Lars Povlsen 39c8378a1c dt-bindings: clock: sparx5: Add bindings include file
The Sparx5 support 9 different clock outputs. This include file has
defines for each supported clock ordinal.

Link: https://lore.kernel.org/r/20200615133242.24911-8-lars.povlsen@microchip.com
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:28:45 +02:00
Lars Povlsen 2ce39f20d0 dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock
This add the DT bindings documentation for the Sparx5 SoC DPLL clock

Link: https://lore.kernel.org/r/20200615133242.24911-7-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:28:43 +02:00
Lars Povlsen 14bc6703b3 arm64: dts: sparx5: Add pinctrl support
This add pinctrl support to the Microchip Sparx5 SoC.

Link: https://lore.kernel.org/r/20200615133242.24911-5-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:28:40 +02:00
Lars Povlsen 6694aee00a arm64: dts: sparx5: Add basic cpu support
This adds the basic DT structure for the Microchip Sparx5 SoC, and the
reference boards, pcb125, pcb134 and pcb135. The two latter have a
NAND vs a eMMC centric variant (as a mount option).

Link: https://lore.kernel.org/r/20200615133242.24911-4-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:28:38 +02:00
Lars Povlsen 31a91c87a4 arm64: sparx5: Add support for Microchip 2xA53 SoC
This adds support for the Microchip Sparx5 ARMv8-based SoC family of
TSN-capable gigabit switches.

Link: https://lore.kernel.org/r/20200615133242.24911-3-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:28:35 +02:00
Lars Povlsen 85032207c8 dt-bindings: arm: sparx5: Add documentation for Microchip Sparx5 SoC
This adds the main Sparx5 SoC DT documentation file, with information
abut the supported board types.

Link: https://lore.kernel.org/r/20200615133242.24911-2-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:28:33 +02:00
Jens Axboe ef67744e7a Merge branch 'md-next' of https://git.kernel.org/pub/scm/linux/kernel/git/song/md into for-5.9/drivers
Pull MD for 5.9 from Song.

* 'md-next' of https://git.kernel.org/pub/scm/linux/kernel/git/song/md:
  md/raid10: avoid deadlock on recovery.
  raid: md_p.h: drop duplicated word in a comment
  md-cluster: fix rmmod issue when md_cluster convert bitmap to none
  md-cluster: fix safemode_delay value when converting to clustered bitmap
  md/raid5: support config stripe_size by sysfs entry
  md/raid5: set default stripe_size as 4096
  md/raid456: convert macro STRIPE_* to RAID5_STRIPE_*
  raid5: remove the meaningless check in raid5_make_request
  raid5: put the comment of clear_batch_ready to the right place
  raid5: call clear_batch_ready before set STRIPE_ACTIVE
  md: raid10: Fix compilation warning
  md: raid5: Fix compilation warning
  md: raid5-cache: Remove set but unused variable
  md: Fix compilation warning
2020-07-22 14:11:38 -06:00
Lubomir Rintel 67598a474f ARM: dts: mmp3-dell-ariel: Enable the GPU
Enable the 2D (GC300) and the 3D (GC2000) GPUs cores.

Link: https://lore.kernel.org/r/20200718205019.184927-14-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:25 +02:00
Lubomir Rintel d896b86e09 ARM: dts: mmp3: Add the GPU
There's a GC2000 3D core accompanied by a GC300 2D core.

Link: https://lore.kernel.org/r/20200718205019.184927-13-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:22 +02:00
Lubomir Rintel cbcb5b33df ARM: dts: mmp2-olpc-xo-1-75: Enable the GPU
Enable the 3D + 2D (GC860) GPU core.

Link: https://lore.kernel.org/r/20200718205019.184927-12-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:20 +02:00
Lubomir Rintel b4c2abb681 ARM: dts: mmp2: Add the GPU
There's a GC860 2D + 3D core.

Link: https://lore.kernel.org/r/20200718205019.184927-11-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:17 +02:00
Lubomir Rintel d1e6f7c9f0 ARM: dts: mmp2-olpc-xo-1-75: Enable audio support
This enables the audio SRAM, DMA engine, I2S interface, and codec, hooks
them together and adds a audio-graph-card instance.

It also removes the jack gpios from the gpio-keys instance, because the
audio jack driver registers an input device.

Link: https://lore.kernel.org/r/20200718205019.184927-10-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:15 +02:00
Lubomir Rintel 3f2326312a ARM: dts: mmp2: Add SSPA nodes
There are two I2S-capable audio serial port blocks.

Link: https://lore.kernel.org/r/20200718205019.184927-9-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:12 +02:00
Lubomir Rintel 5fd71502e2 ARM: dts: mmp2: Add Audio Clock controller
This device generates the audio codec master clock and bit clock.

Link: https://lore.kernel.org/r/20200718205019.184927-8-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:10 +02:00
Lubomir Rintel f3f202bb56 ARM: dts: mmp2: Add DMA nodes
There is a 16-channel peripheral DMA controller along with two-channel
audio DMA engines.

Link: https://lore.kernel.org/r/20200718205019.184927-7-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:07 +02:00
Lubomir Rintel f2023d9d10 ARM: dts: mmp2: Add Audio SRAM
This memory is region is where the two-channel audio DMA can pump sound
samples into the SSPA's internal FIFO.

Link: https://lore.kernel.org/r/20200718205019.184927-6-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:04 +02:00
Lubomir Rintel f45a04a5ec ARM: dts: mmp2: Extend the MPMU reg range
The ACGR register is at the offset of 0x1024, beyond the 4k originally
assigned to the MPMU range.

Link: https://lore.kernel.org/r/20200718205019.184927-5-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:02 +02:00
Lubomir Rintel 1267340fe5 ARM: dts: mmp2: Add #power-domain-cells to /clocks
The power management unit, described by the soc_clocks node, controls the
power to the peripherals by the means of power domains with a single
cell -- the domain number.

Link: https://lore.kernel.org/r/20200718205019.184927-4-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:04:59 +02:00
Lubomir Rintel f45200b67e ARM: dts: mmp2-olpc-xo-1-75: Delete #address-cells from ssp3
On the XO-1.75, this node represents a bus interface that operates in slave
mode and thus is only able to accommodate a single subnode; no address
cells are necessary.

The Documentation/devicetree/bindings/spi/spi-controller.yaml binding
prefers that we drop the property instead of setting it to zero.

This fixes a DT validation error:

  arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@d4037000:
      { ... } is valid under each of {'required': ['spi-slave']},
                                     {'required': ['#address-cells']}

We also need to drop #size-cells:

  arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@d4037000:
      '#address-cells' is a dependency of '#size-cells'

Link: https://lore.kernel.org/r/20200718205019.184927-3-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:04:57 +02:00
Lubomir Rintel 9dbf272cf4 ARM: dts: mmp2-olpc-xo-1-75: Fix camera I2C node validation
mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: $nodename:0:
      'camera_i2c' does not match '^i2c(@.*)?'
  mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'sda-gpios' is a required property
  mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'scl-gpios' is a required property

The "gpios" property actually was documented as deprecated, but got dropped
in commit 0175ce4a58 ("dt-bindings: i2c: Convert i2c-gpio binding to
json-schema"). It's probably best kept forgotten though.

Link: https://lore.kernel.org/r/20200718205019.184927-2-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:04:54 +02:00
Arnd Bergmann 6b848e263a Ux500 DTS changes for the v5.9 kernel series:
- Add touchkey to the Samsung Golden.
 - Fix up the supply nodes for the AB8500 PWM devices.
 - Fix up the cache controller node names.
 - Fix the Samsing Skomer accelerometer mounting matrix.
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Merge tag 'ux500-dts-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt

Ux500 DTS changes for the v5.9 kernel series:

- Add touchkey to the Samsung Golden.
- Fix up the supply nodes for the AB8500 PWM devices.
- Fix up the cache controller node names.
- Fix the Samsing Skomer accelerometer mounting matrix.

* tag 'ux500-dts-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: dts: ux500-skomer: Correct accel mounting matrix
  ARM: dts: ste: Align L2 cache-controller nodename with dtschema
  ARM: dts: ux500: Supply nodes for the other 2 AB8500 PWM devices
  ARM: dts: ux500: samsung-golden: Add touchkey

Link: https://lore.kernel.org/r/CACRpkdZZgZ1LeOK5zFj5Z6Mh=RVz37hZ-7Z4DQNGC1uaiEVTeA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:03:24 +02:00
Vladimir Oltean 8bb849d67f net: mscc: ocelot: fix non-initialized CPU port on VSC7514
The VSC7514 is marketed as a 10-port switch, however it has 11 physical
ports (0->10) in the block diagram:
https://www.microsemi.com/product-directory/ethernet-switches/3992-vsc7514
(also in the device tree at arch/mips/boot/dts/mscc/ocelot.dtsi)

Additionally, by architecture it has one more entry in the analyzer
block, situated right after the physical ports, for the CPU port module.
This is not a physical port, it only represents a channel for frame
injection and extraction. That entry for the CPU port is at index 11 in
the analyzer.

When the register groups for QSYS_SWITCH_PORT_MODE, SYS_PORT_MODE and
SYS_PAUSE_CFG are declared to be replicated 11 times, the 11th entry in
the array of regfields is not initialized, so the CPU port module is not
initialized either.

The documentation of QSYS_SWITCH_PORT_MODE for VSC7514 also says that
this register group is replicated 12 times, so this patch is simply
reflecting that and not introducing any further inconsistency.

Fixes: 886e1387c7 ("net: mscc: ocelot: convert QSYS_SWITCH_PORT_MODE and SYS_PORT_MODE to regfields")
Fixes: 541132f096 ("net: mscc: ocelot: convert SYS_PAUSE_CFG register access to regfield")
Reported-by: Bryan Whitehead <bryan.whitehead@microchip.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 13:02:09 -07:00
Arnd Bergmann b61010a1ec STM32 DT updates for v5.9, round 1
Highlights:
 ----------
 
 MCU part:
  -Enable stmpe811 on stm32f429
  -Enable l3gd20-gyro on stm32f429
  -Enable panel-ilitek-9341 on stm32f429
  -Fixes for yaml validation (leds, nodes names,
   remove useless bindings ...)
  -Add stm32xxx compatibles for syscon nodes
 
 MPU part:
  -Add support for usb role switch to dwc2
  -Add stm32xxx compatibles for syscon nodes
  -Update uart4 pin configuration for low power mode
   used by dkx and ed1 ST boards
  -Fix uart nodes ordering and uart7_pins_a comments
  -Add the support of uart instances available on STM32MP157 boards:
   - usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
   - uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
   - usart2 on stm32mp157c-dk2
  -Configure I2C5 on stm32mp15 DK boards
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Merge tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.9, round 1

Highlights:
----------

MCU part:
 -Enable stmpe811 on stm32f429
 -Enable l3gd20-gyro on stm32f429
 -Enable panel-ilitek-9341 on stm32f429
 -Fixes for yaml validation (leds, nodes names,
  remove useless bindings ...)
 -Add stm32xxx compatibles for syscon nodes

MPU part:
 -Add support for usb role switch to dwc2
 -Add stm32xxx compatibles for syscon nodes
 -Update uart4 pin configuration for low power mode
  used by dkx and ed1 ST boards
 -Fix uart nodes ordering and uart7_pins_a comments
 -Add the support of uart instances available on STM32MP157 boards:
  - usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
  - uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
  - usart2 on stm32mp157c-dk2
 -Configure I2C5 on stm32mp15 DK boards

* tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (38 commits)
  ARM: dts: stm32: enable usb-role-switch on USB OTG on stm32mp15xx-dkx
  ARM: dts: stm32: Add compatibles for syscon for stm32mp151
  ARM: dts: stm32: Add compatibles for syscon for stm32h743
  ARM: dts: stm32: Add compatibles for syscon for stm32f746
  ARM: dts: stm32: Add compatibles for syscon for stm32f426
  dt-bindings: arm: stm32: Add compatibles for syscon nodes
  ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl
  ARM: dts: stm32: configure i2c5 support on stm32mp15xx-dkx
  ARM: dts: stm32: add usart2 node to stm32mp157c-dk2
  ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boards
  ARM: dts: stm32: add usart3 node to stm32mp157c-ev1
  ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boards
  ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl
  ARM: dts: stm32: cosmetic updates in stm32mp15-pinctrl
  ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl
  ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl
  ARM: dts: stm32: Update UART4 pin states on stm32mp15xx-dkx
  ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
  ARM: dts: stm32: update uart4 pin configuration for low power on stm32mp157
  dt-bindings: usb: dwc2: Fix issues for stm32mp15x SoC
  ...

Link: https://lore.kernel.org/r/8a9bb27b-fc08-126a-11f7-01354e8577e1@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:02:00 +02:00