Commit Graph

6 Commits (ba65a4e7120a616d9c592750d9147f6dcafedffa)

Author SHA1 Message Date
Stephen Boyd 1413717ad0
clk: qcom: Mark camcc_sm7150_hws static
This isn't used outside this file. Mark it static.

Fixes: 9f0532da42 ("clk: qcom: Add Camera Clock Controller driver for SM7150")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-30 12:04:10 -08:00
Luca Weiss 415aad75c7 clk: qcom: camcc-sm7150: Fix PLL config of PLL2
The 'Agera' PLLs (with clk_agera_pll_configure) do not take some of the
parameters that are provided in the vendor driver. Instead the upstream
configuration should provide the final user_ctl value that is written to
the USER_CTL register.

Fix the config so that the PLL is configured correctly.

Fixes: 9f0532da42 ("clk: qcom: Add Camera Clock Controller driver for SM7150")
Suggested-by: Taniya Das <taniya.das@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251021-agera-pll-fixups-v1-2-8c1d8aff4afc@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-22 16:59:49 -05:00
Vladimir Zapolskiy 37cf953a12 clk: qcom: camcc-sm7150: Specify Titan GDSC power domain as a parent to IPEx and BPS
When a consumer turns on/off a power domain dependent on another power
domain in hardware, the parent power domain shall be turned on/off by
the power domain provider as well, and to get it the power domain hardware
hierarchy shall be described in the CAMCC driver.

Establish the power domain hierarchy with a Titan GDSC set as a parent of
other GDSC power domains provided by the SM7150 camera clock controller,
including IPE0/1 and BPS ones.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20251021234450.2271279-5-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-22 15:45:29 -05:00
Krzysztof Kozlowski 691621dfad clk: qcom: Drop unused header includes
Drivers should include only headers they use so drop:
1. of.h and of_address.h: When no OF call is used (of_device_id is
   coming from mod_devicetable.h).
2. clk.h, property.h and reset-controller.h: No calls to clock consumer
   or reset framework, no fwnode/property calls.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250212-b4-clk-qcom-clean-v3-2-499f37444f5d@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-02-14 09:15:27 -06:00
Luo Jie 9f93a0a428 clk: qcom: common: commonize qcom_cc_really_probe
The previous wrapper qcom_cc_really_probe takes the platform
device as parameter, which is limited to platform driver.

As for qca8k clock controller driver, which is registered as
the MDIO device, which also follows the qcom clock framework.

To commonize qcom_cc_really_probe, updating it to take the
struct device as parameter, so that the qcom_cc_really_probe
can be utilized by the previous platform device and the new
added MDIO device.

Also update the current clock controller drivers to take
&pdev->dev as parameter when calling qcom_cc_really_probe.

Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://lore.kernel.org/r/20240605124541.2711467-4-quic_luoj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:04:26 -05:00
Danila Tikhonov 9f0532da42 clk: qcom: Add Camera Clock Controller driver for SM7150
Add support for the camera clock controller found on SM7150.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Link: https://lore.kernel.org/r/20240505201038.276047-7-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27 12:01:56 -05:00