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3 Commits (c942fddf8793b2013be8c901b47d0a8dc02bf99f)

Author SHA1 Message Date
Praveen Kumar Vegivada b7c5005378 mfd: arizona: Mark AIFx_TX_BCLK_RATE as readable for cs47l24 
This register is used in the AIF code but is missing from the register
tables.

Signed-off-by: Praveen Kumar Vegivada <praveen.vegivada@cirrus.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
 2016-11-21 13:00:18 +00:00
Charles Keepax 21aca3bf0d mfd: cs47l24: Fix defaults array based on testing 
My automated test is back and now can check defaults against the actual
hardware. This patch updates the defaults array for the differences
detected and removes a couple of completely unused registers.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
 2016-03-16 08:50:22 +00:00
Richard Fitzgerald ea1f333990 mfd: arizona: Support Cirrus Logic CS47L24 and WM1831 
This patch adds the regmap configuration tables and
core MFD handling for the CS47L24 and WM1831 codecs.

Note that compared to the other Arizona codecs, these devices
do not have an LDO1 or micsupp regulators, extcon driver, or
the DCVDD isolation control.

Signed-off-by: Richard Fitzgerald <rf@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
 2015-12-04 08:46:39 +00:00