2 Commits (edcef667070f7dbddca403e6331c86940407dae0)

Author	SHA1	Message	Date
Haibo Xu	d0b94bcbb0	KVM: riscv: selftests: Add sstc timer test ... Add a KVM selftests to validate the Sstc timer functionality. The test was ported from arm64 arch timer test. Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org>	2024-03-06 20:53:29 +05:30
Haibo Xu	c20dd9e069	KVM: arm64: selftests: Split arch_timer test code ... Split the arch-neutral test code out of aarch64/arch_timer.c and put them into a common arch_timer.c. This is a preparation to share timer test codes in riscv. Suggested-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org>	2024-02-26 10:13:58 +05:30